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arm64: dts: rockchip: rk3588: Fix clk for dedicated i2s

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These controllers use the same clk for tx/rx.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ie9a0adb950cdc584761c1079cb45e58d5eafccfb
This commit is contained in:
Sugar Zhang
2021-11-13 14:24:25 +08:00
committed by Tao Huang
parent fae7bbff82
commit cb239e6eff
2 changed files with 12 additions and 12 deletions
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12
arch/arm64/boot/dts/rockchip/rk3588.dtsi
View File

@@ -135,8 +135,8 @@
compatible = "rockchip,rk3588-i2s-tdm";
reg = <0x0 0xfddf4000 0x0 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru MCLK_I2S6_8CH_TX>, <&cru HCLK_I2S6_8CH>;
clock-names = "mclk_tx", "hclk";
clocks = <&cru MCLK_I2S6_8CH_TX>, <&cru MCLK_I2S6_8CH_TX>, <&cru HCLK_I2S6_8CH>;
clock-names = "mclk_tx", "mclk_rx", "hclk";
dmas = <&dmac2 4>;
dma-names = "tx";
power-domains = <&power RK3588_PD_VO1>;
@@ -151,8 +151,8 @@
compatible = "rockchip,rk3588-i2s-tdm";
reg = <0x0 0xfddf8000 0x0 0x1000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru MCLK_I2S7_8CH_RX>, <&cru HCLK_I2S7_8CH>;
clock-names = "mclk_rx", "hclk";
clocks = <&cru MCLK_I2S7_8CH_RX>, <&cru MCLK_I2S7_8CH_RX>, <&cru HCLK_I2S7_8CH>;
clock-names = "mclk_tx", "mclk_rx", "hclk";
dmas = <&dmac2 21>;
dma-names = "rx";
power-domains = <&power RK3588_PD_VO1>;
@@ -167,8 +167,8 @@
compatible = "rockchip,rk3588-i2s-tdm";
reg = <0x0 0xfde00000 0x0 0x1000>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru MCLK_I2S10_8CH_RX>, <&cru HCLK_I2S10_8CH>;
clock-names = "mclk_rx", "hclk";
clocks = <&cru MCLK_I2S10_8CH_RX>, <&cru MCLK_I2S10_8CH_RX>, <&cru HCLK_I2S10_8CH>;
clock-names = "mclk_tx", "mclk_rx", "hclk";
dmas = <&dmac2 24>;
dma-names = "rx";
power-domains = <&power RK3588_PD_VO1>;

12
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@@ -1897,8 +1897,8 @@
compatible = "rockchip,rk3588-i2s-tdm";
reg = <0x0 0xfddc0000 0x0 0x1000>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru MCLK_I2S4_8CH_TX>, <&cru HCLK_I2S4_8CH>;
clock-names = "mclk_tx", "hclk";
clocks = <&cru MCLK_I2S4_8CH_TX>, <&cru MCLK_I2S4_8CH_TX>, <&cru HCLK_I2S4_8CH>;
clock-names = "mclk_tx", "mclk_rx", "hclk";
dmas = <&dmac2 0>;
dma-names = "tx";
power-domains = <&power RK3588_PD_VO0>;
@@ -1926,8 +1926,8 @@
compatible = "rockchip,rk3588-i2s-tdm";
reg = <0x0 0xfddf0000 0x0 0x1000>;
interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru MCLK_I2S5_8CH_TX>, <&cru HCLK_I2S5_8CH>;
clock-names = "mclk_tx", "hclk";
clocks = <&cru MCLK_I2S5_8CH_TX>, <&cru MCLK_I2S5_8CH_TX>, <&cru HCLK_I2S5_8CH>;
clock-names = "mclk_tx", "mclk_rx", "hclk";
dmas = <&dmac2 2>;
dma-names = "tx";
power-domains = <&power RK3588_PD_VO1>;
@@ -1942,8 +1942,8 @@
compatible = "rockchip,rk3588-i2s-tdm";
reg = <0x0 0xfddfc000 0x0 0x1000>;
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru MCLK_I2S9_8CH_RX>, <&cru HCLK_I2S9_8CH>;
clock-names = "mclk_rx", "hclk";
clocks = <&cru MCLK_I2S9_8CH_RX>, <&cru MCLK_I2S9_8CH_RX>, <&cru HCLK_I2S9_8CH>;
clock-names = "mclk_tx", "mclk_rx", "hclk";
dmas = <&dmac2 23>;
dma-names = "rx";
power-domains = <&power RK3588_PD_VO1>;