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osd: update osd freescaler reg every hwc cmd [1/1]

Browse Source 
PD#SWPL-17309

Problem:
do switch resolution test, sc regs miss-set caused display garbage

Solution:
update osd freescaler reg every hwc cmd

Verify:
ac214

Change-Id: I4c09094a477442b6f9f7bd782f9360d98eff299c
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
This commit is contained in:
Pengcheng Chen
2019-11-26 14:25:12 +08:00
committed by Chris KIM
parent e2b1cd2717
commit cb9997dac2
1 changed files with 5 additions and 3 deletions
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8
drivers/amlogic/media/osd/osd_hw.c
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@@ -6381,6 +6381,7 @@ static void generate_blend_din_table(struct hw_osd_blending_s *blending)
blending->din_reoder_sel;
}
#ifdef FREESCAL_CHECK
static bool is_freescale_para_changed(u32 index)
{
static int first[HW_OSD_COUNT - 1] = {1};
@@ -6405,6 +6406,7 @@ static bool is_freescale_para_changed(u32 index)
first[index] = 0;
return freescale_update;
}
#endif
static int osd_setting_blending_scope(u32 index)
{
@@ -8625,7 +8627,7 @@ static int osd_setting_order(u32 output_index)
if (osd_hw.enable[i]) {
struct hw_osd_reg_s *osd_reg = &hw_osd_reg_array[i];
update = is_freescale_para_changed(i);
/* update = is_freescale_para_changed(i); */
if (!osd_hw.osd_afbcd[i].enable)
canvas_config(osd_hw.fb_gem[i].canvas_idx,
osd_hw.fb_gem[i].addr,
@@ -8663,10 +8665,10 @@ static int osd_setting_order(u32 output_index)
osd_hw.reg[OSD_FREESCALE_COEF].update_func(i);
if (update || osd_update_window_axis) {
osd_set_scan_mode(i);
osd_hw.reg[DISP_FREESCALE_ENABLE]
.update_func(i);
osd_update_window_axis = false;
}
osd_hw.reg[DISP_FREESCALE_ENABLE]
.update_func(i);
if (osd_hw.premult_en[i] && !osd_hw.blend_bypass)
VSYNCOSD_WR_MPEG_REG_BITS(
osd_reg->osd_mali_unpack_ctrl, 0x1, 28, 1);