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arm64: dts: rockchip: rk3588s: Add hdmi0 node

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Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Icd526df71c979fb517484294784bdcc6321db746
This commit is contained in:
Algea Cao
2021-10-27 17:31:25 +08:00
committed by Tao Huang
parent a791135553
commit cbeddf3300
1 changed files with 58 additions and 0 deletions
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58
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@@ -1288,6 +1288,7 @@
vp0_out_hdmi0: endpoint@2 {
reg = <2>;
remote-endpoint = <&hdmi0_in_vp0>;
};
};
@@ -1308,6 +1309,7 @@
vp1_out_hdmi0: endpoint@2 {
reg = <2>;
remote-endpoint = <&hdmi0_in_vp1>;
};
};
@@ -1328,6 +1330,7 @@
vp2_out_hdmi0: endpoint@2 {
reg = <2>;
remote-endpoint = <&hdmi0_in_vp2>;
};
vp2_out_dsi0: endpoint@3 {
@@ -1587,6 +1590,61 @@
};
};
hdmi0: hdmi@fde80000 {
compatible = "rockchip,rk3588-dw-hdmi";
reg = <0x0 0xfde80000 0x0 0x20000>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_HDMITX0>,
<&cru CLK_HDMIHDP0>,
<&cru CLK_HDMITX0_EARC>,
<&cru CLK_HDMITX0_REF>;
clock-names = "pclk", "hpd", "earc", "ref";
resets = <&cru SRST_HDMITX0_REF>, <&cru SRST_HDMIHDP0>;
reset-names = "ref", "hdp";
power-domains = <&power RK3588_PD_VO1>;
reg-io-width = <4>;
rockchip,grf = <&sys_grf>;
rockchip,vo1_grf = <&vo1_grf>;
phys = <&hdptxphy0>;
phy-names = "hdmi";
pinctrl-names = "default";
pinctrl-0 = <&hdmim0_pins>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
hdmi0_in: port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
hdmi0_in_vp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&vp0_out_hdmi0>;
status = "disabled";
};
hdmi0_in_vp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&vp1_out_hdmi0>;
status = "disabled";
};
hdmi0_in_vp2: endpoint@2 {
reg = <2>;
remote-endpoint = <&vp2_out_hdmi0>;
status = "disabled";
};
};
};
};
edp0: edp@fdec0000 {
compatible = "rockchip,rk3588-edp";
reg = <0x0 0xfdec0000 0x0 0x1000>;