vdac: optimize the vdac controlling [1/1]

PD#SWPL-8385

Problem:
no cvbsout on ab311

Solution:
1.optimize the vdac controlling
2.enable cvbsout in ab311 dts

Verify:
ab311

Change-Id: Ib046e760eca1c9ad3ae30749c546aff538504b33
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
This commit is contained in:
Evoke Zhang
2019-07-22 18:27:14 +08:00
committed by Luke Go
parent 2a7ea49a40
commit cc5f68676d
21 changed files with 836 additions and 551 deletions

View File

@@ -933,7 +933,7 @@
cvbsout {
compatible = "amlogic, cvbsout-txlx";
dev_name = "cvbsout";
status = "disabled";
status = "okay";
clocks = <&clkc CLKID_VCLK2_ENCI
&clkc CLKID_VCLK2_VENCI0
&clkc CLKID_VCLK2_VENCI1

View File

@@ -932,7 +932,7 @@
cvbsout {
compatible = "amlogic, cvbsout-txlx";
dev_name = "cvbsout";
status = "disabled";
status = "okay";
clocks = <&clkc CLKID_VCLK2_ENCI
&clkc CLKID_VCLK2_VENCI0
&clkc CLKID_VCLK2_VENCI1

View File

@@ -20,6 +20,7 @@
#include <uapi/linux/dvb/frontend.h>
#include <linux/amlogic/aml_atvdemod.h>
#include <linux/amlogic/media/vout/vdac_dev.h>
#include "drivers/media/tuners/tuner-i2c.h"
#include "drivers/media/dvb-core/dvb_frontend.h"
@@ -144,7 +145,7 @@ int atv_demod_enter_mode(struct dvb_frontend *fe)
}
err_code = adc_set_pll_cntl(1, ADC_EN_ATV_DEMOD, NULL);
vdac_enable(1, 1);
vdac_enable(1, VDAC_MODULE_AVOUT_ATV);
usleep_range(2000, 2100);
atvdemod_clk_init();
/* err_code = atvdemod_init(); */
@@ -196,7 +197,7 @@ int atv_demod_leave_mode(struct dvb_frontend *fe)
amlatvdemod_devp->agc_pin = NULL;
}
vdac_enable(0, 1);
vdac_enable(0, VDAC_MODULE_AVOUT_ATV);
adc_set_pll_cntl(0, ADC_EN_ATV_DEMOD, NULL);
if (is_meson_txlx_cpu() || is_meson_txhd_cpu() || is_meson_tl1_cpu()
|| is_meson_tm2_cpu())

View File

@@ -56,6 +56,7 @@
#include <linux/dma-contiguous.h>
#include <linux/amlogic/media/frame_provider/tvin/tvin.h>
#include <linux/amlogic/media/vout/vdac_dev.h>
MODULE_PARM_DESC(debug_aml, "\n\t\t Enable frontend debug information");
@@ -2995,7 +2996,7 @@ static bool enter_mode(enum aml_fe_n_mode_t mode)
/*-------------------*/
/* must enable the adc ref signal for demod, */
/*vdac_enable(1, 0x2);*/
/*vdac_enable(1, VDAC_MODULE_DTV_DEMOD);*/
dtvdemod_vdac_enable(1);/*on*/
dtvdd_devp->en_detect = 0;/**/
dtvdd_devp->n_mode = mode;
@@ -3112,7 +3113,7 @@ static int leave_mode(enum aml_fe_n_mode_t mode)
adc_set_pll_cntl(0, 0x8, NULL);
demod_mode_para = UNKNOWN;
/* should disable the adc ref signal for demod */
/*vdac_enable(0, 0x2);*/
/*vdac_enable(0, VDAC_MODULE_DTV_DEMOD);*/
dtvdemod_vdac_enable(0);/*off*/
dtvdemod_set_agc_pinmux(0);
msleep(200);
@@ -3627,10 +3628,10 @@ static void dtvdemod_vdac_enable(bool on)
{
if (on) {
vdac_clk_gate_ctrl(1);
vdac_enable(1, 0x02);
vdac_enable(1, VDAC_MODULE_DTV_DEMOD);
} else {
vdac_clk_gate_ctrl(0);
vdac_enable(0, 0x02);
vdac_enable(0, VDAC_MODULE_DTV_DEMOD);
}
}

View File

@@ -285,7 +285,6 @@ extern struct amldtvdemod_device_s *dtvdd_devp; /**/
/*int M6_Demod_Dtmb_Init(struct aml_fe_dev *dev);*/
int convert_snr(int in_snr);
extern int vdac_enable_check_dtv(void);
extern unsigned int ats_thread_flg;

View File

@@ -21,8 +21,6 @@
#include <linux/device.h> /**/
extern void vdac_enable(bool on, unsigned int module_sel);
/*dma_alloc_from_contiguous*/
struct page *aml_dma_alloc_contiguous(struct device *dev, int count,
unsigned int order);

View File

@@ -50,6 +50,7 @@
/*#include <linux/amlogic/amports/vframe_provider.h>*/
/*#include <linux/amlogic/amports/vframe_receiver.h>*/
#include <linux/amlogic/media/frame_provider/tvin/tvin.h>
#include <linux/amlogic/media/vout/vdac_dev.h>
/*#include <linux/amlogic/amports/vframe.h>*/
#include <linux/of_gpio.h>
#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND
@@ -312,7 +313,7 @@ int hdmirx_dec_open(struct tvin_frontend_s *fe, enum tvin_port_e port)
devp->param.port = port;
/* should enable the adc ref signal for audio pll */
/* vdac_enable(1, 0x10); */
/* vdac_enable(1, VDAC_MODULE_AUDIO_OUT); */
hdmirx_open_port(port);
rx.open_fg = 1;
rx_pr("%s port:%x ok nosignal:%d\n", __func__, port, rx.no_signal);
@@ -371,7 +372,7 @@ void hdmirx_dec_close(struct tvin_frontend_s *fe)
*/
/* For txl,also need to keep bandgap always on:SWPL-1224 */
/* if (rx.chip_id == CHIP_ID_TXL) */
/* vdac_enable(0, 0x10); */
/* vdac_enable(0, VDAC_MODULE_AUDIO_OUT); */
/* open_flage = 0; */
rx.open_fg = 0;
devp = container_of(fe, struct hdmirx_dev_s, frontend);

View File

@@ -562,7 +562,6 @@ extern unsigned int *pd_fifo_buf;
/* for other modules */
extern int External_Mute(int mute_flag);
extern void vdac_enable(bool on, unsigned int module_sel);
extern int rx_is_hdcp22_support(void);
extern int hdmirx_get_connect_info(void);
#endif

View File

@@ -142,6 +142,8 @@ static struct tvafe_user_param_s tvafe_user_param = {
/*4 is the test result@20171101 on fluke-54200 and DVD*/
.skip_vf_num = 4,
.avout_en = 1,
};
struct tvafe_user_param_s *tvafe_get_user_param(void)

View File

@@ -77,6 +77,7 @@ struct tvafe_user_param_s {
unsigned int force_vs_th_flag;
unsigned int nostd_stable_cnt;
unsigned int skip_vf_num;
unsigned int avout_en;
};
/* tvafe device structure */

View File

@@ -195,9 +195,17 @@ static void tvafe_state(struct tvafe_dev_s *devp)
user_param->cutwindow_val_vs_ve);
tvafe_pr_info("auto_adj_en:%d\n", user_param->auto_adj_en);
tvafe_pr_info("nostd_vs_th:0x%x\n", user_param->nostd_vs_th);
tvafe_pr_info("force_vs_th_flag:0x%x\n", user_param->force_vs_th_flag);
tvafe_pr_info("nostd_stable_cnt:0x%x\n", user_param->nostd_stable_cnt);
tvafe_pr_info("skip_vf_num:0x%x\n", user_param->skip_vf_num);
tvafe_pr_info("nostd_no_vs_th:0x%x\n", user_param->nostd_no_vs_th);
tvafe_pr_info("nostd_vs_cntl:0x%x\n", user_param->nostd_vs_cntl);
tvafe_pr_info("nostd_vloop_tc:0x%x\n", user_param->nostd_vloop_tc);
tvafe_pr_info("force_vs_th_flag:%d\n", user_param->force_vs_th_flag);
tvafe_pr_info("nostd_stable_cnt:%d\n", user_param->nostd_stable_cnt);
tvafe_pr_info("nostd_dmd_clp_step:0x%x\n",
user_param->nostd_dmd_clp_step);
tvafe_pr_info("skip_vf_num:%d\n", user_param->skip_vf_num);
tvafe_pr_info("try_fmt_max_atv:%d\n", try_fmt_max_atv);
tvafe_pr_info("try_fmt_max_av:%d\n", try_fmt_max_av);
tvafe_pr_info("avout_en:%d\n", user_param->avout_en);
tvafe_pr_info("tvafe version : %s\n", TVAFE_VER);
}
@@ -397,6 +405,25 @@ static ssize_t tvafe_store(struct device *dev,
}
pr_info("[tvafe..]%s: skip_vf_num = %d\n",
__func__, user_param->skip_vf_num);
} else if (!strncmp(buff, "try_fmt_max_atv",
strlen("try_fmt_max_atv"))) {
if (kstrtouint(parm[1], 10, &try_fmt_max_atv) < 0)
goto tvafe_store_err;
pr_info("[tvafe..]%s: set try_fmt_max_atv = %d\n",
__func__, try_fmt_max_atv);
} else if (!strncmp(buff, "try_fmt_max_av",
strlen("try_fmt_max_av"))) {
if (kstrtouint(parm[1], 10, &try_fmt_max_av) < 0)
goto tvafe_store_err;
pr_info("[tvafe..]%s: set try_fmt_max_av = %d\n",
__func__, try_fmt_max_av);
} else if (!strncmp(buff, "avout_en", strlen("avout_en"))) {
if (parm[1]) {
if (kstrtouint(parm[1], 16, &user_param->avout_en) < 0)
goto tvafe_store_err;
}
pr_info("[tvafe..]%s: avout_en = 0x%x\n",
__func__, user_param->avout_en);
} else if (!strncmp(buff, "dbg_print", strlen("dbg_print"))) {
if (parm[1]) {
if (kstrtouint(parm[1], 16, &tvafe_dbg_print) < 0)
@@ -442,7 +469,9 @@ static const char *tvafe_debug_usage_str = {
"\n"
" echo skip_vf_num val(d) > /sys/class/tvafe/tvafe0/debug;set skip_vf_num for vdin\n"
"\n"
" echo dbg_print val(h) > /sys/class/tvafe/tvafe0/debug;enable debug print\n"
" echo avout_en val(d) > /sys/class/tvafe/tvafe0/debug;set avout\n"
"\n"
" echo print val(h) > /sys/class/tvafe/tvafe0/debug;enable debug print\n"
" bit[0]: normal debug info\n"
" bit[4]: vsync isr debug info\n"
" bit[8]: smr debug info\n"

View File

@@ -23,6 +23,7 @@
/*#include <mach/am_regs.h>*/
#include <linux/amlogic/media/frame_provider/tvin/tvin.h>
#include <linux/amlogic/media/vout/vdac_dev.h>
#include "../tvin_global.h"
#include "../tvin_format_table.h"
#include "tvafe.h"
@@ -532,7 +533,10 @@ void tvafe_set_ddemod_default(void)
W_HIU_REG(HHI_DADC_CNTL3, 0x00082183);
/*W_HIU_REG(HHI_VDAC_CNTL0, 0x00000200);*/
W_HIU_BIT(HHI_VDAC_CNTL0, 1, 9, 1);
/*W_HIU_BIT(HHI_VDAC_CNTL0, 1, 9, 1);*/
/* remove vdac reg write, make sure it write in vdac driver,
* because multi module use it
*/
} else if (tvafe_cpu_type() == CPU_TYPE_TXHD) {
W_HIU_REG(HHI_DADC_CNTL, 0x00102038);
@@ -557,7 +561,10 @@ void tvafe_set_ddemod_default(void)
W_HIU_REG(HHI_DADC_CNTL3, 0x08300b83);
//HHI_VDAC_CNTL1
W_HIU_REG(0xbc, 0x0);
/*W_HIU_REG(0xbc, 0x0);*/
/* remove vdac reg write, make sure it write in vdac driver,
* because multi module use it
*/
}
}
@@ -572,23 +579,16 @@ void tvafe_enable_avout(enum tvin_port_e port, bool enable)
if (enable) {
tvafe_clk_gate_ctrl(1);
if (port == TVIN_PORT_CVBS3) {
vdac_enable(1, 0x1);
/* clock delay control */
W_HIU_BIT(HHI_VIID_CLK_DIV, 1, 19, 1);
/* vdac_clock_mux form atv demod */
W_HIU_BIT(HHI_VID_CLK_CNTL2, 1, 8, 1);
W_HIU_BIT(HHI_VID_CLK_CNTL2, 1, 4, 1);
/* vdac_clk gated clock control */
W_VCBUS_BIT(VENC_VDAC_DACSEL0, 1, 5, 1);
vdac_enable(1, VDAC_MODULE_AVOUT_ATV);
} else {
W_APB_REG(TVFE_ATV_DMD_CLP_CTRL, 0);
vdac_enable(1, 0x4);
vdac_enable(1, VDAC_MODULE_AVOUT_AV);
}
} else {
if (port == TVIN_PORT_CVBS3)
vdac_enable(0, 0x1);
vdac_enable(0, VDAC_MODULE_AVOUT_ATV);
else
vdac_enable(0, 0x4);
vdac_enable(0, VDAC_MODULE_AVOUT_AV);
tvafe_clk_gate_ctrl(0);
}
}
@@ -968,14 +968,12 @@ EXPORT_SYMBOL(tvafe_adc_get_pll_flag);
/*
* tvafe init the whole module
*/
static bool enableavout = true;
module_param(enableavout, bool, 0644);
MODULE_PARM_DESC(enableavout, "disable av out when load adc reg");
void tvafe_init_reg(struct tvafe_cvd2_s *cvd2,
struct tvafe_cvd2_mem_s *mem, enum tvin_port_e port,
struct tvafe_pin_mux_s *pinmux)
{
unsigned int module_sel = ADC_EN_TVAFE;
struct tvafe_user_param_s *user_param = tvafe_get_user_param();
if (port == TVIN_PORT_CVBS3)
module_sel = ADC_EN_ATV_DEMOD;
@@ -1003,7 +1001,7 @@ void tvafe_init_reg(struct tvafe_cvd2_s *cvd2,
tvafe_set_cvbs_default(cvd2, mem, port, pinmux);
/*turn on/off av out*/
tvafe_enable_avout(port, enableavout);
tvafe_enable_avout(port, user_param->avout_en);
/* CDAC_CTRL_RESV2<1>=0 */
}

View File

@@ -186,9 +186,6 @@ extern void tvafe_set_apb_bus_err_ctrl(void);
extern void tvafe_enable_module(bool enable);
extern void tvafe_enable_avout(enum tvin_port_e port, bool enable);
/* vdac ctrl,adc/dac ref signal,cvbs out signal*/
/* module index: atv demod:0x01; dtv demod:0x02; tvafe:0x4; dac:0x8*/
void vdac_enable(bool on, unsigned int module_sel);
extern void adc_set_pll_reset(void);
extern int tvafe_adc_get_pll_flag(void);
extern int tvafe_cpu_type(void);

View File

@@ -249,7 +249,7 @@ static void cvbs_cntl_output(unsigned int open)
vdac_set_ctrl0_ctrl1(cntl0, cntl1);
/* must enable adc bandgap, the adc ref signal for demod */
vdac_enable(0, 0x8);
vdac_enable(0, VDAC_MODULE_CVBS_OUT);
} else if (open == 1) { /* open */
cntl0 = info->cvbs_data->cntl0_val;
@@ -259,7 +259,7 @@ static void cvbs_cntl_output(unsigned int open)
vdac_set_ctrl0_ctrl1(cntl0, cntl1);
/*vdac ctrl for cvbsout/rf signal,adc bandgap*/
vdac_enable(1, 0x8);
vdac_enable(1, VDAC_MODULE_CVBS_OUT);
}
}

View File

@@ -151,6 +151,8 @@
#define HHI_DIF_CSI_PHY_CNTL5 0xdd
#define HHI_LVDS_TX_PHY_CNTL0 0xde
#define HHI_LVDS_TX_PHY_CNTL1 0xdf
#define HHI_LVDS_TX_PHY_CNTL0_TL1 0x9a
#define HHI_LVDS_TX_PHY_CNTL1_TL1 0x9b
#define HHI_VID2_PLL_CNTL 0xe0
#define HHI_VID2_PLL_CNTL2 0xe1
#define HHI_VID2_PLL_CNTL3 0xe2

View File

@@ -105,6 +105,9 @@ static void cvbs_set_vid1_clk(unsigned int src_pll)
/* vclk: 27M */
/* [31:28]=0 enci_clk_sel, select vclk_div1 */
cvbs_out_hiu_setb(HHI_VID_CLK_DIV, 0, 28, 4);
/* [31:28]=0 vdac_clk_sel, select vclk_div1 */
/* [19]=0 disable atv_demod clk for vdac */
cvbs_out_hiu_setb(HHI_VIID_CLK_DIV, 0, 19, 1);
cvbs_out_hiu_setb(HHI_VIID_CLK_DIV, 0, 28, 4);
/* release vclk_div_reset and enable vclk_div */
cvbs_out_hiu_setb(HHI_VID_CLK_DIV, 1, VCLK_XD_EN, 2);
@@ -150,6 +153,9 @@ static void cvbs_set_vid2_clk(unsigned int src_pll)
/* vclk: 27M */
/* [31:28]=8 enci_clk_sel, select vclk2_div1 */
cvbs_out_hiu_setb(HHI_VID_CLK_DIV, 8, 28, 4);
/* [31:28]=8 vdac_clk_sel, select vclk2_div1 */
/* [19]=0 disable atv_demod clk for vdac */
cvbs_out_hiu_setb(HHI_VIID_CLK_DIV, 0, 19, 1);
cvbs_out_hiu_setb(HHI_VIID_CLK_DIV, 8, 28, 4);
/* release vclk2_div_reset and enable vclk2_div */
cvbs_out_hiu_setb(HHI_VIID_CLK_DIV, 1, VCLK2_XD_EN, 2);
@@ -214,8 +220,7 @@ void set_vmode_clk(void)
}
if (ret)
pr_info("[error]:hdmi_pll lock failed\n");
} else if (cvbs_cpu_type() == CVBS_CPU_TYPE_TL1 ||
cvbs_cpu_type() == CVBS_CPU_TYPE_TM2) {
} else if (cvbs_cpu_type() == CVBS_CPU_TYPE_TL1) {
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL0, 0x202f04f7);
udelay(100);
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL0, 0x302f04f7);
@@ -236,6 +241,29 @@ void set_vmode_clk(void)
ret = pll_wait_lock(HHI_TCON_PLL_CNTL0, 31);
if (ret)
pr_info("[error]:tl1 tcon_pll lock failed\n");
} else if (cvbs_cpu_type() == CVBS_CPU_TYPE_TM2) {
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL0, 0x202f04f7);
udelay(100);
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL0, 0x302f04f7);
udelay(100);
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL1, 0x10110000);
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL2, 0x00001108);
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL3, 0x10051400);
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL4, 0x010100c0);
udelay(100);
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL4, 0x038300c0);
udelay(100);
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL0, 0x342f04f7);
udelay(100);
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL0, 0x142f04f7);
udelay(100);
cvbs_out_hiu_write(HHI_TCON_PLL_CNTL2, 0x00003008);
udelay(100);
ret = pll_wait_lock(HHI_TCON_PLL_CNTL0, 31);
if (ret)
pr_info("[error]:tl1 tcon_pll lock failed\n");
/* mux tcon pll */
cvbs_out_hiu_setb(HHI_LVDS_TX_PHY_CNTL1_TL1, 0, 29, 1);
} else {
pr_info("config eqafter gxl hdmi pll\n");
cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x4000027b);

View File

@@ -1,3 +1,3 @@
obj-$(CONFIG_AMLOGIC_VDAC) += vdac_dev.o
obj-$(CONFIG_AMLOGIC_VDAC) += vdac_dev.o vdac_config.o
ccflags-y += -Idrivers/amlogic/display/

View File

@@ -0,0 +1,189 @@
/*
* drivers/amlogic/media/vout/vdac/vdac_config.c
*
* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
#include <linux/platform_device.h>
#include <linux/of_device.h>
#include "vdac_dev.h"
static struct meson_vdac_ctrl_s vdac_ctrl_enable_gxl[] = {
{HHI_VDAC_CNTL0, 0, 9, 1},
{HHI_VDAC_CNTL0, 1, 10, 1},
{HHI_VDAC_CNTL0, 1, 0, 1},
{HHI_VDAC_CNTL1, 0, 3, 1},
{VDAC_REG_MAX, 0, 0, 0},
};
static struct meson_vdac_ctrl_s vdac_ctrl_enable_txl[] = {
{HHI_VDAC_CNTL0, 1, 9, 1},
{HHI_VDAC_CNTL0, 1, 10, 1},
{HHI_VDAC_CNTL0, 1, 0, 1},
{HHI_VDAC_CNTL1, 1, 3, 1},
{VDAC_REG_MAX, 0, 0, 0},
};
static struct meson_vdac_ctrl_s vdac_ctrl_enable_txlx[] = {
{HHI_VDAC_CNTL0, 1, 9, 1},
{HHI_VDAC_CNTL0, 1, 10, 1},
{HHI_VDAC_CNTL0, 1, 0, 1},
{HHI_VDAC_CNTL0, 0, 13, 1}, /* bandgap */
{HHI_VDAC_CNTL1, 1, 3, 1},
{VDAC_REG_MAX, 0, 0, 0},
};
static struct meson_vdac_ctrl_s vdac_ctrl_enable_g12ab[] = {
{HHI_VDAC_CNTL0_G12A, 0, 9, 1},
{HHI_VDAC_CNTL0_G12A, 1, 0, 1},
{HHI_VDAC_CNTL1_G12A, 0, 3, 1},
{VDAC_REG_MAX, 0, 0, 0},
};
static struct meson_vdac_ctrl_s vdac_ctrl_enable_tl1[] = {
{HHI_VDAC_CNTL0_G12A, 0, 9, 1},
{HHI_VDAC_CNTL0_G12A, 1, 0, 1},
{HHI_VDAC_CNTL1_G12A, 0, 3, 1},
{HHI_VDAC_CNTL1_G12A, 0, 7, 1}, /* bandgap */
{HHI_VDAC_CNTL1_G12A, 1, 6, 1}, /* bypass avout */
{HHI_VDAC_CNTL1_G12A, 1, 8, 1}, /* bypass avout */
{VDAC_REG_MAX, 0, 0, 0},
};
/* ********************************************************* */
static struct meson_vdac_data meson_gx_l_m_vdac_data = {
.cpu_id = VDAC_CPU_GX_L_M,
.name = "meson-gx_l_m-vdac",
.reg_cntl0 = HHI_VDAC_CNTL0,
.reg_cntl1 = HHI_VDAC_CNTL1,
.ctrl_table = vdac_ctrl_enable_gxl,
};
static struct meson_vdac_data meson_txl_vdac_data = {
.cpu_id = VDAC_CPU_TXL,
.name = "meson-txl-vdac",
.reg_cntl0 = HHI_VDAC_CNTL0,
.reg_cntl1 = HHI_VDAC_CNTL1,
.ctrl_table = vdac_ctrl_enable_txl,
};
static struct meson_vdac_data meson_txlx_vdac_data = {
.cpu_id = VDAC_CPU_TXLX,
.name = "meson-txlx-vdac",
.reg_cntl0 = HHI_VDAC_CNTL0,
.reg_cntl1 = HHI_VDAC_CNTL1,
.ctrl_table = vdac_ctrl_enable_txlx,
};
static struct meson_vdac_data meson_gxlx_vdac_data = {
.cpu_id = VDAC_CPU_GXLX,
.name = "meson-gxlx-vdac",
.reg_cntl0 = HHI_VDAC_CNTL0,
.reg_cntl1 = HHI_VDAC_CNTL1,
.ctrl_table = vdac_ctrl_enable_txl,
};
static struct meson_vdac_data meson_g12ab_vdac_data = {
.cpu_id = VDAC_CPU_G12AB,
.name = "meson-g12ab-vdac",
.reg_cntl0 = HHI_VDAC_CNTL0_G12A,
.reg_cntl1 = HHI_VDAC_CNTL1_G12A,
.ctrl_table = vdac_ctrl_enable_g12ab,
};
static struct meson_vdac_data meson_tl1_vdac_data = {
.cpu_id = VDAC_CPU_TL1,
.name = "meson-tl1-vdac",
.reg_cntl0 = HHI_VDAC_CNTL0_G12A,
.reg_cntl1 = HHI_VDAC_CNTL1_G12A,
.ctrl_table = vdac_ctrl_enable_tl1,
};
static struct meson_vdac_data meson_sm1_vdac_data = {
.cpu_id = VDAC_CPU_SM1,
.name = "meson-sm1-vdac",
.reg_cntl0 = HHI_VDAC_CNTL0_G12A,
.reg_cntl1 = HHI_VDAC_CNTL1_G12A,
.ctrl_table = vdac_ctrl_enable_g12ab,
};
static struct meson_vdac_data meson_tm2_vdac_data = {
.cpu_id = VDAC_CPU_TM2,
.name = "meson-tm2-vdac",
.reg_cntl0 = HHI_VDAC_CNTL0_G12A,
.reg_cntl1 = HHI_VDAC_CNTL1_G12A,
.ctrl_table = vdac_ctrl_enable_tl1,
};
const struct of_device_id meson_vdac_dt_match[] = {
{
.compatible = "amlogic, vdac-gxl",
.data = &meson_gx_l_m_vdac_data,
}, {
.compatible = "amlogic, vdac-gxm",
.data = &meson_gx_l_m_vdac_data,
}, {
.compatible = "amlogic, vdac-txl",
.data = &meson_txl_vdac_data,
}, {
.compatible = "amlogic, vdac-txlx",
.data = &meson_txlx_vdac_data,
}, {
.compatible = "amlogic, vdac-gxlx",
.data = &meson_gxlx_vdac_data,
}, {
.compatible = "amlogic, vdac-g12a",
.data = &meson_g12ab_vdac_data,
}, {
.compatible = "amlogic, vdac-g12b",
.data = &meson_g12ab_vdac_data,
}, {
.compatible = "amlogic, vdac-tl1",
.data = &meson_tl1_vdac_data,
}, {
.compatible = "amlogic, vdac-sm1",
.data = &meson_sm1_vdac_data,
}, {
.compatible = "amlogic, vdac-tm2",
.data = &meson_tm2_vdac_data,
},
{}
};
struct meson_vdac_data *aml_vdac_config_probe(struct platform_device *pdev)
{
const struct of_device_id *match;
struct meson_vdac_data *data;
match = of_match_device(meson_vdac_dt_match, &pdev->dev);
if (match == NULL) {
pr_err("%s, no matched table\n", __func__);
return NULL;
}
data = (struct meson_vdac_data *)match->data;
if (data) {
pr_info("%s: cpu_id:%d, name:%s\n", __func__,
data->cpu_id, data->name);
}
return data;
}

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@@ -0,0 +1,69 @@
/*
* drivers/amlogic/media/vout/vdac/vdac_dev.h
*
* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
#ifndef _VDAC_DEV_H_
#define _VDAC_DEV_H_
#define HHI_VDAC_CNTL0 0xbd
#define HHI_VDAC_CNTL1 0xbe
#define HHI_VDAC_CNTL0_G12A 0xbb
#define HHI_VDAC_CNTL1_G12A 0xbc
#define HHI_VIID_CLK_DIV 0x4a
#define HHI_VIID_CLK_CNTL 0x4b
#define HHI_VIID_DIVIDER_CNTL 0x4c
#define HHI_VID_CLK_CNTL2 0x65
#define HHI_VID_DIVIDER_CNTL 0x66
#define VENC_VDAC_DACSEL0 0x1b78
#define VDAC_CTRL_MAX 10
enum vdac_cpu_type {
VDAC_CPU_GX_L_M = 0,
VDAC_CPU_TXL = 1,
VDAC_CPU_TXLX = 2,
VDAC_CPU_GXLX = 3,
VDAC_CPU_G12AB = 4,
VDAC_CPU_TL1 = 5,
VDAC_CPU_SM1 = 6,
VDAC_CPU_TM2 = 7,
VDAC_CPU_MAX,
};
#define VDAC_REG_MAX 0xffff
struct meson_vdac_data {
enum vdac_cpu_type cpu_id;
const char *name;
unsigned int reg_cntl0;
unsigned int reg_cntl1;
struct meson_vdac_ctrl_s *ctrl_table;
};
struct meson_vdac_ctrl_s {
unsigned int reg;
unsigned int val;
unsigned int bit;
unsigned int len;
};
extern const struct of_device_id meson_vdac_dt_match[];
struct meson_vdac_data *aml_vdac_config_probe(struct platform_device *pdev);
#endif

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@@ -15,28 +15,19 @@
*
*/
#ifndef _VDAC_DEV_H_
#define _VDAC_DEV_H_
#ifndef _INC_VDAC_DEV_H_
#define _INC_VDAC_DEV_H_
enum vdac_cpu_type {
VDAC_CPU_GXTVBB = 0,
VDAC_CPU_GX_L_M = 1,
VDAC_CPU_TXL = 2,
VDAC_CPU_TXLX = 3,
VDAC_CPU_GXLX = 4,
VDAC_CPU_TXHD = 5,
VDAC_CPU_G12AB = 6,
VDAC_CPU_TL1 = 7,
VDAC_CPU_SM1 = 8,
VDAC_CPU_TM2 = 9,
VDAC_CPU_MAX,
};
struct meson_vdac_data {
enum vdac_cpu_type cpu_id;
const char *name;
};
#define VDAC_MODULE_MASK (0x1f)
#define VDAC_MODULE_AVOUT_ATV (1 << 0) /*0x1*/
#define VDAC_MODULE_DTV_DEMOD (1 << 1) /*0x2*/
#define VDAC_MODULE_AVOUT_AV (1 << 2) /*0x4*/
#define VDAC_MODULE_CVBS_OUT (1 << 3) /*0x8*/
#define VDAC_MODULE_AUDIO_OUT (1 << 4) /*0x10*/
extern void vdac_set_ctrl0_ctrl1(unsigned int ctrl0, unsigned int ctrl1);
extern void vdac_enable(bool on, unsigned int module_sel);
extern int vdac_enable_check_dtv(void);
extern int vdac_enable_check_cvbs(void);
#endif