media: add codec support for SM1 [1/1]

PD#SWPL-2867

Problem:
bringup codec for SM1.

Solution:
add the register ops for SM1

Verify:
Verified on SM1-AC200

Change-Id: I31db8f0b5816d67664e8161b3dc73574909afe31
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
This commit is contained in:
Jian Cao
2019-03-19 19:26:04 +08:00
committed by Jianxiong Pan
parent 00fa4a0b2c
commit ccf5b07b04

View File

@@ -32,6 +32,7 @@
MESON_CPU_MAJOR_ID_G12A, \
MESON_CPU_MAJOR_ID_G12B, \
MESON_CPU_MAJOR_ID_TL1, \
MESON_CPU_MAJOR_ID_SM1, \
0}
#define REGISTER_FOR_GXCPU {\
MESON_CPU_MAJOR_ID_GXBB, \
@@ -44,6 +45,7 @@
MESON_CPU_MAJOR_ID_G12A, \
MESON_CPU_MAJOR_ID_G12B, \
MESON_CPU_MAJOR_ID_TL1, \
MESON_CPU_MAJOR_ID_SM1, \
0}
int codec_apb_read(unsigned int reg)
{