Merge "audio: correct the 958 clock setting after dd+ pass through" into amlogic-4.9-dev

This commit is contained in:
Jianxin Pan
2018-09-27 07:31:05 -07:00
committed by Gerrit Code Review

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@@ -115,11 +115,12 @@ void aml_spdif_play(int samesrc)
flag_samesrc = samesrc;
aml_set_spdif_clk(48000 * 512, samesrc);
}
if (IEC958_mode_codec == 4 || IEC958_mode_codec == 5 ||
IEC958_mode_codec == 7 || IEC958_mode_codec == 8) {
pr_info("set 4x audio clk for 958\n");
div = 1;
} else if (samesrc) {
// if (IEC958_mode_codec == 4 || IEC958_mode_codec == 5 ||
// IEC958_mode_codec == 7 || IEC958_mode_codec == 8) {
// pr_info("set 4x audio clk for 958\n");
// div = 1;
// } else if (samesrc) {
if (samesrc) {
pr_debug("share the same clock\n");
div = 2;
} else {