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arm64: dts: Update cache properties for mediatek

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The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).

Update the Device Trees accordingly.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Link: https://lore.kernel.org/r/20221107155825.1644604-13-pierre.gondois@arm.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Pierre Gondois
2022-11-07 16:57:05 +01:00
committed by Matthias Brugger
parent 9abf2313ad
commit ce459b1da7
3 changed files with 9 additions and 0 deletions
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3
arch/arm64/boot/dts/mediatek/mt8186.dtsi
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@@ -198,16 +198,19 @@
l2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&l3_0>;
};
l2_1: l2-cache1 {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&l3_0>;
};
l3_0: l3-cache {
compatible = "cache";
cache-level = <3>;
};
};

3
arch/arm64/boot/dts/mediatek/mt8192.dtsi
View File

@@ -169,16 +169,19 @@
l2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&l3_0>;
};
l2_1: l2-cache1 {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&l3_0>;
};
l3_0: l3-cache {
compatible = "cache";
cache-level = <3>;
};
idle-states {

3
arch/arm64/boot/dts/mediatek/mt8195.dtsi
View File

@@ -213,16 +213,19 @@
l2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&l3_0>;
};
l2_1: l2-cache1 {
compatible = "cache";
cache-level = <2>;
next-level-cache = <&l3_0>;
};
l3_0: l3-cache {
compatible = "cache";
cache-level = <3>;
};
};