arm64: dts: rockchip: rk3588-vehicle\*maxim\*: Fix pins default pinctrls

Set all default pins to expected input/output values to
prevent glitch during probe.

Change-Id: I29e882f47b8ab1e4d89e29cc1525187a434cba53
Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
This commit is contained in:
Cody Xie
2023-10-31 14:44:36 +08:00
committed by Tao Huang
parent 18df0d10b7
commit ce8fb3bb30
9 changed files with 31 additions and 27 deletions

View File

@@ -720,15 +720,15 @@
&pinctrl {
max96712-dcphy0 {
max96712_dcphy0_pwdn: max96712-dcphy0-pwdn {
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
};
max96712_dcphy0_errb: max96712-dcphy0-errb {
rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
max96712_dcphy0_lock: max96712-dcphy0-lock {
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
};
};

View File

@@ -490,15 +490,15 @@
&pinctrl {
max96712-dcphy1 {
max96712_dcphy1_pwdn: max96712-dcphy1-pwdn {
rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_output_low>;
};
max96712_dcphy1_errb: max96712-dcphy1-errb {
rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
max96712_dcphy1_lock: max96712-dcphy1-lock {
rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
};
};

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@@ -732,15 +732,15 @@
&pinctrl {
max96712-dphy0 {
max96712_dphy0_pwdn: max96712-dphy0-pwdn {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>;
};
max96712_dphy0_errb: max96712-dphy0-errb {
rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
max96712_dphy0_lock: max96712-dphy0-lock {
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
};
};

View File

@@ -636,15 +636,15 @@
&pinctrl {
max96712-dphy3 {
max96712_dphy3_pwdn: max96712-dphy3-pwdn {
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_output_low>;
};
max96712_dphy3_errb: max96712-dphy3-errb {
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
max96712_dphy3_lock: max96712-dphy3-lock {
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
};
};

View File

@@ -148,15 +148,15 @@
&pinctrl {
max96712-dphy3 {
max96712_dphy3_power: max96712-dphy3-power {
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_output_low>;
};
max96712_dphy3_errb: max96712-dphy3-errb {
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
max96712_dphy3_lock: max96712-dphy3-lock {
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
};
};

View File

@@ -732,15 +732,15 @@
&pinctrl {
max96722-dphy0 {
max96722_dphy0_pwdn: max96722-dphy0-pwdn {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>;
};
max96722_dphy0_errb: max96722-dphy0-errb {
rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
max96722_dphy0_lock: max96722-dphy0-lock {
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
};
};

View File

@@ -502,15 +502,15 @@
&pinctrl {
max96722-dphy3 {
max96722_dphy3_pwdn: max96722-dphy3-pwdn {
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_output_low>;
};
max96722_dphy3_errb: max96722-dphy3-errb {
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
max96722_dphy3_lock: max96722-dphy3-lock {
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
};
};

View File

@@ -149,15 +149,15 @@
&pinctrl {
max96722-dphy0 {
max96722_dphy0_power: max96722-dphy0-power {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>;
};
max96722_dphy0_errb: max96722-dphy0-errb {
rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
max96722_dphy0_lock: max96722-dphy0-lock {
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
};
};

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@@ -456,6 +456,10 @@
};
&pinctrl {
pinctrl-names = "init";
pinctrl-0 = <&max96712_dphy3_pwdn
&max96712_dphy3_errb
&max96712_dphy3_lock>;
bl {
bl0_enable_pin: bl0-enable-pin {
@@ -489,15 +493,15 @@
max96712-dphy3 {
max96712_dphy3_pwdn: max96712-dphy3-pwdn {
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_output_low>;
};
max96712_dphy3_errb: max96712-dphy3-errb {
rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
max96712_dphy3_lock: max96712-dphy3-lock {
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none_smt>;
};
};