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Merge tag 'dra7-core-support-minus-dt' of git://github.com/rrnayak/linux into omap-for-v3.12/soc

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DRA7xx based SoC core support
This commit is contained in:
Tony Lindgren
2013-08-14 01:01:41 -07:00
parent d4e4ab86bc 8dd21c9319
commit cf470a1b1a
15 changed files with 86 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
Documentation/devicetree/bindings/arm/omap/omap.txt
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@@ -59,3 +59,6 @@ Boards:
- AM43x EPOS EVM
compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43"
- DRA7 EVM: Software Developement Board for DRA7XX
compatible = "ti,dra7-evm", "ti,dra7"

2
arch/arm/Kconfig
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@@ -1600,7 +1600,7 @@ config LOCAL_TIMERS
config ARCH_NR_GPIO
int
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5
default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || SOC_DRA7XX
default 392 if ARCH_U8500
default 352 if ARCH_VT8500
default 288 if ARCH_SUNXI

1
arch/arm/configs/omap2plus_defconfig
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@@ -306,3 +306,4 @@ CONFIG_TI_DAVINCI_MDIO=y
CONFIG_TI_DAVINCI_CPDMA=y
CONFIG_TI_CPSW=y
CONFIG_AT803X_PHY=y
CONFIG_SOC_DRA7XX=y

1
arch/arm/mach-omap1/include/mach/soc.h
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@@ -195,6 +195,7 @@ IS_OMAP_TYPE(1710, 0x1710)
#define cpu_is_omap34xx() 0
#define cpu_is_omap44xx() 0
#define soc_is_omap54xx() 0
#define soc_is_dra7xx() 0
#define soc_is_am33xx() 0
#define cpu_class_is_omap1() 1
#define cpu_class_is_omap2() 0

12
arch/arm/mach-omap2/Kconfig
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@@ -118,7 +118,7 @@ config ARCH_OMAP2PLUS_TYPICAL
select I2C
select I2C_OMAP
select MENELAUS if ARCH_OMAP2
select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
select NEON if CPU_V7
select PM_RUNTIME
select REGULATOR
select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
@@ -132,9 +132,17 @@ config SOC_HAS_OMAP2_SDRC
config SOC_HAS_REALTIME_COUNTER
bool "Real time free running counter"
depends on SOC_OMAP5
depends on SOC_OMAP5 || SOC_DRA7XX
default y
config SOC_DRA7XX
bool "TI DRA7XX"
select ARM_ARCH_TIMER
select CPU_V7
select ARM_GIC
select HAVE_SMP
select COMMON_CLK
comment "OMAP Core Type"
depends on ARCH_OMAP2

6
arch/arm/mach-omap2/Makefile
View File

@@ -23,6 +23,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common)
obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common)
obj-$(CONFIG_SOC_OMAP5) += prm44xx.o $(hwmod-common) $(secure-common)
obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common)
obj-$(CONFIG_SOC_DRA7XX) += prm44xx.o $(hwmod-common) $(secure-common)
ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
obj-y += mcbsp.o
@@ -39,6 +40,7 @@ omap-4-5-common = omap4-common.o omap-wakeupgen.o
obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y) sleep44xx.o
obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) $(smp-y) sleep44xx.o
obj-$(CONFIG_SOC_AM43XX) += $(omap-4-5-common)
obj-$(CONFIG_SOC_DRA7XX) += $(omap-4-5-common) $(smp-y)
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec)
@@ -87,6 +89,7 @@ obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o
obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o
obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o
obj-$(CONFIG_SOC_DRA7XX) += omap-mpuss-lowpower.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o
@@ -114,6 +117,7 @@ omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \
vc44xx_data.o vp44xx_data.o
obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common)
obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common)
obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common)
# OMAP voltage domains
voltagedomain-common := voltage.o vc.o vp.o
@@ -143,6 +147,7 @@ obj-$(CONFIG_SOC_AM33XX) += powerdomains33xx_data.o
obj-$(CONFIG_SOC_AM43XX) += $(powerdomain-common)
obj-$(CONFIG_SOC_OMAP5) += $(powerdomain-common)
obj-$(CONFIG_SOC_OMAP5) += powerdomains54xx_data.o
obj-$(CONFIG_SOC_DRA7XX) += $(powerdomain-common)
# PRCM clockdomain control
clockdomain-common += clockdomain.o
@@ -160,6 +165,7 @@ obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o
obj-$(CONFIG_SOC_AM43XX) += $(clockdomain-common)
obj-$(CONFIG_SOC_OMAP5) += $(clockdomain-common)
obj-$(CONFIG_SOC_OMAP5) += clockdomains54xx_data.o
obj-$(CONFIG_SOC_DRA7XX) += $(clockdomain-common)
# Clock framework
obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o

18
arch/arm/mach-omap2/board-generic.c
View File

@@ -222,3 +222,21 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
.dt_compat = am43_boards_compat,
MACHINE_END
#endif
#ifdef CONFIG_SOC_DRA7XX
static const char *dra7xx_boards_compat[] __initdata = {
"ti,dra7",
NULL,
};
DT_MACHINE_START(DRA7XX_DT, "Generic DRA7XX (Flattened Device Tree)")
.reserve = omap_reserve,
.smp = smp_ops(omap4_smp_ops),
.map_io = omap5_map_io,
.init_early = dra7xx_init_early,
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
.init_time = omap5_realtime_timer_init,
.dt_compat = dra7xx_boards_compat,
MACHINE_END
#endif

1
arch/arm/mach-omap2/common.h
View File

@@ -110,6 +110,7 @@ void omap3630_init_late(void);
void am35xx_init_late(void);
void ti81xx_init_late(void);
int omap2_common_pm_late_init(void);
void dra7xx_init_early(void);
#ifdef CONFIG_SOC_BUS
void omap_soc_device_init(void);

4
arch/arm/mach-omap2/id.c
View File

@@ -61,7 +61,7 @@ int omap_type(void)
val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
} else if (cpu_is_omap44xx()) {
val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
} else if (soc_is_omap54xx()) {
} else if (soc_is_omap54xx() || soc_is_dra7xx()) {
val = omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS);
val &= OMAP5_DEVICETYPE_MASK;
val >>= 6;
@@ -116,7 +116,7 @@ static u16 tap_prod_id;
void omap_get_die_id(struct omap_die_id *odi)
{
if (cpu_is_omap44xx() || soc_is_omap54xx()) {
if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0);
odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1);
odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2);

20
arch/arm/mach-omap2/io.c
View File

@@ -251,7 +251,7 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
};
#endif
#ifdef CONFIG_SOC_OMAP5
#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
static struct map_desc omap54xx_io_desc[] __initdata = {
{
.virtual = L3_54XX_VIRT,
@@ -333,7 +333,7 @@ void __init omap4_map_io(void)
}
#endif
#ifdef CONFIG_SOC_OMAP5
#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
void __init omap5_map_io(void)
{
iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
@@ -653,6 +653,22 @@ void __init omap5_init_early(void)
}
#endif
#ifdef CONFIG_SOC_DRA7XX
void __init dra7xx_init_early(void)
{
omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE));
omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(DRA7XX_CM_CORE_AON_BASE),
OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap_prm_base_init();
omap_cm_base_init();
}
#endif
void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
struct omap_sdrc_params *sdrc_cs1)
{

4
arch/arm/mach-omap2/omap54xx.h
View File

@@ -30,4 +30,8 @@
#define OMAP54XX_CTRL_BASE 0x4a002800
#define OMAP54XX_SAR_RAM_BASE 0x4ae26000
#define DRA7XX_CM_CORE_AON_BASE 0x4a005000
#define DRA7XX_CTRL_BASE 0x4a003400
#define DRA7XX_TAP_BASE 0x4ae0c000
#endif /* __ASM_SOC_OMAP555554XX_H */

2
arch/arm/mach-omap2/omap_hwmod.c
View File

@@ -4113,7 +4113,7 @@ void __init omap_hwmod_init(void)
soc_ops.assert_hardreset = _omap2_assert_hardreset;
soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
} else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
} else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
soc_ops.enable_module = _omap4_enable_module;
soc_ops.disable_module = _omap4_disable_module;
soc_ops.wait_target_ready = _omap4_wait_target_ready;

17
arch/arm/mach-omap2/soc.h
View File

@@ -8,6 +8,7 @@
* Written by Tony Lindgren <tony.lindgren@nokia.com>
*
* Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
* Added DRA7xxx specific defines - Sricharan R<r.sricharan@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -35,6 +36,7 @@
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#include <linux/of.h>
/*
* Test if multicore OMAP support is needed
@@ -105,6 +107,15 @@
# endif
#endif
#ifdef CONFIG_SOC_DRA7XX
# ifdef OMAP_NAME
# undef MULTI_OMAP2
# define MULTI_OMAP2
# else
# define OMAP_NAME DRA7XX
# endif
#endif
/*
* Omap device type i.e. EMU/HS/TST/GP/BAD
*/
@@ -233,6 +244,7 @@ IS_AM_SUBCLASS(437x, 0x437)
#define cpu_is_omap447x() 0
#define soc_is_omap54xx() 0
#define soc_is_omap543x() 0
#define soc_is_dra7xx() 0
#if defined(MULTI_OMAP2)
# if defined(CONFIG_ARCH_OMAP2)
@@ -379,6 +391,11 @@ IS_OMAP_TYPE(3430, 0x3430)
# define soc_is_omap543x() is_omap543x()
#endif
#if defined(CONFIG_SOC_DRA7XX)
#undef soc_is_dra7xx
#define soc_is_dra7xx() (of_machine_is_compatible("ti,dra7"))
#endif
/* Various silicon revisions for omap2 */
#define OMAP242X_CLASS 0x24200024
#define OMAP2420_REV_ES1_0 OMAP242X_CLASS

3
arch/arm/mach-omap2/timer.c
View File

@@ -594,7 +594,8 @@ OMAP_SYS_GP_TIMER_INIT(3, 2, "timer_sys_ck", NULL,
1, "timer_sys_ck", "ti,timer-alwon");
#endif
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
defined(CONFIG_SOC_DRA7XX)
static OMAP_SYS_32K_TIMER_INIT(4, 1, "timer_32k_ck", "ti,timer-alwon",
2, "sys_clkin_ck", NULL);
#endif

2
arch/arm/plat-omap/Kconfig
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@@ -106,7 +106,7 @@ config OMAP_32K_TIMER
This timer saves power compared to the OMAP_MPU_TIMER, and has
support for no tick during idle. The 32KHz timer provides less
intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
currently only available for OMAP16XX, 24XX, 34XX and OMAP4/5.
currently only available for OMAP16XX, 24XX, 34XX, OMAP4/5 and DRA7XX.
On OMAP2PLUS this value is only used for CONFIG_HZ and
CLOCK_TICK_RATE compile time calculation.