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usb: dwc2: fix the port cannot suspend when a HUB is connected

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This patch fix the port cannot suspend when a HUB is connected. The
DWC2 IP on Rockchip SOCs does not support clock gating and Current
code places the port suspend within the dwc2_host_enter_clock_gating
function, which results in the port being unable to suspend.

Change-Id: I40fe73d116a30fec6c01a8c3c988653a48175f7f
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com>
This commit is contained in:
Jianwei Zheng
2024-07-23 16:20:52 +08:00
committed by Tao Huang
parent b0a05407cd
commit d036e8956b
1 changed files with 6 additions and 2 deletions
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8
drivers/usb/dwc2/hcd.c
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@@ -3327,7 +3327,8 @@ int dwc2_port_suspend(struct dwc2_hsotg *hsotg, u16 windex)
* If not hibernation nor partial power down are supported,
* clock gating is used to save power.
*/
if (!hsotg->params.no_clock_gating)
if (!hsotg->params.no_clock_gating ||
IS_REACHABLE(CONFIG_ARCH_ROCKCHIP))
dwc2_host_enter_clock_gating(hsotg);
break;
}
@@ -4392,7 +4393,8 @@ static int _dwc2_hcd_suspend(struct usb_hcd *hcd)
* If not hibernation nor partial power down are supported,
* clock gating is used to save power.
*/
if (!hsotg->params.no_clock_gating) {
if (!hsotg->params.no_clock_gating ||
IS_REACHABLE(CONFIG_ARCH_ROCKCHIP)) {
dwc2_host_enter_clock_gating(hsotg);
/* After entering suspend, hardware is not accessible */
@@ -5921,11 +5923,13 @@ void dwc2_host_enter_clock_gating(struct dwc2_hsotg *hsotg)
dwc2_writel(hsotg, pcgctl, PCGCTL);
udelay(5);
#ifndef CONFIG_ARCH_ROCKCHIP
/* Set the Gate hclk as suspend is received. */
pcgctl = dwc2_readl(hsotg, PCGCTL);
pcgctl |= PCGCTL_GATEHCLK;
dwc2_writel(hsotg, pcgctl, PCGCTL);
udelay(5);
#endif
hsotg->bus_suspended = true;
hsotg->lx_state = DWC2_L2;