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vpp: sm1: add vpp and sr support [1/1]

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PD#SWPL-6101

Problem:
Need vpp and sr supprt for sm1

Solution:
add support for sm1

Verify:
test pass on sm1 ac200

Change-Id: I038ceba52a0b47512767e851d0047a3ee36e351c
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
This commit is contained in:
Brian Zhu
2019-03-20 00:13:20 +08:00
committed by Luke Go
parent c00bcbfa05
commit d0825a20bf
2 changed files with 30 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/amlogic/media/video_sink/video.c
View File

@@ -3403,8 +3403,8 @@ static void pip_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
}
if (is_meson_txlx_cpu()
|| is_meson_g12a_cpu()
|| is_meson_g12b_cpu())
|| cpu_after_eq(
MESON_CPU_MAJOR_ID_G12A))
VSYNC_WR_MPEG_REG_BITS(
VIU_VD2_FMT_CTRL + cur_dev->viu_off,
1, 29, 1);
@@ -4391,8 +4391,8 @@ static void viu_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
}
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
if ((is_meson_txlx_cpu()
|| is_meson_g12a_cpu()
|| is_meson_g12b_cpu())
|| cpu_after_eq(
MESON_CPU_MAJOR_ID_G12A))
&& is_dolby_vision_on()
&& is_dolby_vision_stb_mode()
&& (vf->source_type ==
@@ -4853,8 +4853,8 @@ static void vd2_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
}
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
if ((is_meson_txlx_cpu()
|| is_meson_g12a_cpu()
|| is_meson_g12b_cpu())
|| cpu_after_eq(
MESON_CPU_MAJOR_ID_G12A))
&& is_dolby_vision_on()
&& is_dolby_vision_stb_mode()
&& (vf->source_type ==
@@ -7779,8 +7779,8 @@ SET_FILTER:
VSYNC_WR_MPEG_REG_BITS(
VIU_MISC_CTRL1,
1, 16, 1); /* bypass core1 */
else if (is_meson_g12a_cpu()
|| is_meson_g12b_cpu())
else if (cpu_after_eq(
MESON_CPU_MAJOR_ID_G12A))
VSYNC_WR_MPEG_REG_BITS(
DOLBY_PATH_CTRL, 1, 0, 1);
}
@@ -12224,7 +12224,7 @@ static int __init video_early_init(void)
WRITE_VCBUS_REG_BITS(
SRSHARP1_SHARP_SYNC_CTRL, 1, 8, 1);
}
if (is_meson_g12b_cpu())
if (cpu_after_eq(MESON_CPU_MAJOR_ID_G12B))
WRITE_VCBUS_REG_BITS(
SRSHARP0_SHARP_SYNC_CTRL, 1, 0, 1);
return 0;
@@ -12383,8 +12383,7 @@ static int __init video_init(void)
}
#endif
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()
|| is_meson_tl1_cpu()) {
if (cpu_after_eq(MESON_CPU_MAJOR_ID_G12A)) {
cur_dev->viu_off = 0x3200 - 0x1a50;
legacy_vpp = false;
}
@@ -12514,9 +12513,8 @@ static int __init video_init(void)
init_waitqueue_head(&amvideo_trick_wait);
init_waitqueue_head(&amvideo_sizechange_wait);
#if 1 /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */
INIT_WORK(&vpu_delay_work, do_vpu_delay_work);
#endif
#ifdef CONFIG_AM_VOUT
vout_hook();

28
drivers/amlogic/media/video_sink/vpp.c
View File

@@ -1733,7 +1733,10 @@ int vpp_set_super_scaler_regs(
}
/*ve input size setting*/
if (is_meson_txhd_cpu() || is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
if (is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu() ||
is_meson_sm1_cpu() ||
(is_meson_tl1_cpu() &&
((scaler_path_sel == PPS_CORE0_CORE1) ||
(scaler_path_sel == PPS_CORE0_POSTBLEND_CORE1))))
@@ -1746,8 +1749,8 @@ int vpp_set_super_scaler_regs(
if (tmp_data != tmp_data2)
VSYNC_WR_MPEG_REG(VPP_VE_H_V_SIZE, tmp_data);
/*chroma blue stretch size setting*/
if (is_meson_txlx_cpu() || is_meson_txhd_cpu() || is_meson_g12a_cpu() ||
is_meson_g12b_cpu() || is_meson_tl1_cpu()) {
if (is_meson_txlx_cpu() || is_meson_txhd_cpu()
|| (cpu_after_eq(MESON_CPU_MAJOR_ID_G12A))) {
tmp_data = (((vpp_postblend_out_width & 0x1fff) << 16) |
(vpp_postblend_out_height & 0x1fff));
VSYNC_WR_MPEG_REG(VPP_OUT_H_V_SIZE, tmp_data);
@@ -1928,8 +1931,10 @@ static void vpp_set_super_scaler(
next_frame_par->supscl_path = CORE1_BEFORE_PPS;
else
next_frame_par->supscl_path = CORE1_AFTER_PPS;
} else if (is_meson_txhd_cpu() || is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
} else if (is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu() ||
is_meson_sm1_cpu()) {
next_frame_par->supscl_path = CORE0_BEFORE_PPS;
} else
next_frame_par->supscl_path = CORE0_PPS_CORE1;
@@ -2152,7 +2157,8 @@ static void vpp_set_super_scaler(
}
} else if (is_meson_txhd_cpu()
|| is_meson_g12a_cpu()
|| is_meson_g12b_cpu()) {
|| is_meson_g12b_cpu()
|| is_meson_sm1_cpu()) {
if (sr_path == CORE0_BEFORE_PPS)
next_frame_par->sr0_position = 1;
else if (sr_path == CORE0_AFTER_PPS)
@@ -3096,8 +3102,10 @@ void vpp_super_scaler_support(void)
if (is_meson_gxlx_cpu()) {
sr_support &= ~SUPER_CORE0_SUPPORT;
sr_support |= SUPER_CORE1_SUPPORT;
} else if (is_meson_txhd_cpu() || is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
} else if (is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu() ||
is_meson_sm1_cpu()) {
sr_support |= SUPER_CORE0_SUPPORT;
sr_support &= ~SUPER_CORE1_SUPPORT;
} else if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
@@ -3112,7 +3120,9 @@ void vpp_super_scaler_support(void)
sr_support &= ~SUPER_CORE0_SUPPORT;
sr_support &= ~SUPER_CORE1_SUPPORT;
}
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
if (is_meson_g12a_cpu() ||
is_meson_g12b_cpu() ||
is_meson_sm1_cpu()) {
sr_reg_offt = 0xc00;
sr_reg_offt2 = 0x00;
} else if (is_meson_tl1_cpu()) {