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phy: rockchip: usbdp: use correct flag to init phy mode

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If the rockchip,dp-lane-mux property is config in dts, it mean
DP function is used, but the USB function may not be used. It
may be cause cmn ana lcpll lock timeout when initialize phy but
USB function is not used. So just init the phy mode with USB
function when u3-port node is enabled.

If the rockchip,dp-lane-mux property is not in dts, it mean
USB function is used, but the DP function is depend on DP Alt
mode support by sink. If not sink device is disconnected and
force to access DPTX controller register after initialize phy,
The DP function should config, if not config the DPTX controller
register can't be access. So if dp-port node is enabled, init
the phy mode with DP function.

Change-Id: I8aa7ab41d962a50dcdf6dffcf27070a6c6112efe
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
This commit is contained in:
Zhang Yubing
2024-06-19 11:38:16 +08:00
committed by Tao Huang
parent b6e19cb5c8
commit d0e8f174dd
1 changed files with 2 additions and 1 deletions
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3
drivers/phy/rockchip/phy-rockchip-usbdp.c
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@@ -945,7 +945,6 @@ static int udphy_parse_lane_mux_data(struct rockchip_udphy *udphy, struct device
udphy->mode = UDPHY_MODE_DP;
udphy->dp_lanes = num_lanes;
if (num_lanes == 1 || num_lanes == 2) {
udphy->mode |= UDPHY_MODE_USB;
udphy->flip = udphy->lane_mux_sel[0] == PHY_LANE_MUX_DP ? true : false;
}
@@ -1570,6 +1569,7 @@ static int rockchip_udphy_probe(struct platform_device *pdev)
}
if (device_property_present(dev, "svid")) {
udphy->mode |= UDPHY_MODE_DP;
ret = udphy_setup_typec_mux(udphy);
if (ret)
return ret;
@@ -1592,6 +1592,7 @@ static int rockchip_udphy_probe(struct platform_device *pdev)
phy_set_bus_width(phy, udphy->dp_lanes);
phy->attrs.max_link_rate = udphy_dp_get_max_link_rate(udphy, child_np);
} else if (of_node_name_eq(child_np, "u3-port")) {
udphy->mode |= UDPHY_MODE_USB;
phy = devm_phy_create(dev, child_np, &rockchip_u3phy_ops);
if (IS_ERR(phy)) {
dev_err(dev, "failed to create usb phy: %pOFn\n", child_np);