clk: rockchip: rk3368: add dt bindings for DPHY clocks

Add two clock IDs for DPHY clocks of Rockchip rk3368 SoC.

Change-Id: Iaae4da4a0ea9f4dee2b04fb8eb4f9400bd86511f
Signed-off-by: Jianqun xu <jay.xu@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Jianqun xu
2015-12-01 20:23:34 +08:00
committed by Elaine Zhang
parent d15ef7c591
commit d12a79c0ac

View File

@@ -156,7 +156,9 @@
#define PCLK_ISP 366
#define PCLK_VIP 367
#define PCLK_WDT 368
#define PCLK_EFUSE256 369
#define PCLK_DPHYRX 369
#define PCLK_DPHYTX0 370
#define PCLK_EFUSE256 371
/* hclk gates */
#define HCLK_SFC 448