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1,support hevc,vpu iommu 2,delete gpu useless log when init 3,fix gpu compiling error

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This commit is contained in:
xxm
2014-03-26 10:16:39 +08:00
parent 3ee8b2c59f
commit d1949472a3
7 changed files with 49 additions and 38 deletions
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46
arch/arm/boot/dts/rk3288.dtsi
View File

@@ -969,7 +969,7 @@
iep_mmu{
dbgname = "iep";
compatible = "iommu,iep_mmu";
reg = <0xffa40000 0x10000>;
reg = <0xff900800 0x100>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "iep_mmu";
};
@@ -977,31 +977,31 @@
vip_mmu{
dbgname = "vip";
compatible = "iommu,vip_mmu";
reg = <0xffa40000 0x10000>;
reg = <0xff950800 0x100>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vip_mmu";
};
isp0_mmu{
dbgname = "isp0";
compatible = "iommu,isp0_mmu";
reg = <0xffa40000 0x10000>;
isp_mmu0{
dbgname = "isp_mmu0";
compatible = "iommu,isp_mmu0";
reg = <0xff914000 0x100>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "isp0_mmu";
interrupt-names = "isp_mmu0";
};
isp1_mmu{
dbgname = "isp1";
compatible = "iommu,isp1_mmu";
reg = <0xffa40000 0x10000>;
isp_mmu1{
dbgname = "isp_mmu1";
compatible = "iommu,isp_mmu1";
reg = <0xff915000 0x100>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "isp1_mmu";
interrupt-names = "isp_mmu1";
};
vopb_mmu{
dbgname = "vopb";
compatible = "iommu,vopb_mmu";
reg = <0xffa40000 0x10000>;
reg = <0xff930300 0x100>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopb_mmu";
};
@@ -1009,11 +1009,27 @@
vopl_mmu{
dbgname = "vopl";
compatible = "iommu,vopl_mmu";
reg = <0xffa40000 0x10000>;
reg = <0xff940300 0x100>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopl_mmu";
};
hevc_mmu{
dbgname = "hevc";
compatible = "iommu,hevc_mmu";
reg = <0xff9c0800 0x100>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hevc_mmu";
};
vpu_mmu{
dbgname = "vpu";
compatible = "iommu,vpu_mmu";
reg = <0xff9a0800 0x100>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vpu_mmu";
};
rockchip_suspend {
rockchip,ctrbits = <
(0

6
drivers/gpu/arm/t6xx/kbase/src/linux/mali_kbase_core_linux.c
View File

@@ -2465,7 +2465,7 @@ static int kbase_platform_device_probe(struct platform_device *pdev)
#endif /* CONFIG_MALI_NO_MALI */
const char *dbgname = NULL;
printk("slient i come :%s\n",__func__);
#if 0
if(pdev->dev.of_node)
{
of_property_read_string(pdev->dev.of_node,"dbgname",&dbgname);
@@ -2475,7 +2475,7 @@ else
{
printk("pdev->dev.of_node null\r\n");
}
#endif
#ifdef CONFIG_OF
kbase_platform_config *config;
int attribute_count;
@@ -2579,7 +2579,6 @@ else
}
#ifdef CONFIG_UMP
kbdev->memdev.ump_device_id = kbasep_get_config_value(kbdev, platform_data, KBASE_CONFIG_ATTR_UMP_DEVICE);
printk("i don't want ump device \n");
#endif /* CONFIG_UMP */
kbdev->memdev.per_process_memory_limit = kbasep_get_config_value(kbdev, platform_data, KBASE_CONFIG_ATTR_MEMORY_PER_PROCESS_LIMIT);
@@ -2595,7 +2594,6 @@ else
dev_err(osdev->dev, "Failed kbase_common_device_init\n");
goto out_term_dev;
}
printk("yeah,everything seems going well,i go slient without nothing\n");
return 0;
out_term_dev:

9
drivers/gpu/arm/t6xx/kbase/src/platform/rk/mali_kbase_dvfs.c
View File

@@ -1,9 +1,6 @@
/* drivers/gpu/t6xx/kbase/src/platform/manta/mali_kbase_dvfs.c
/* drivers/gpu/t6xx/kbase/src/platform/rk/mali_kbase_dvfs.c
*
* Copyright 2011 by S.LSI. Samsung Electronics Inc.
* San#24, Nongseo-Dong, Giheung-Gu, Yongin, Korea
*
* Samsung SoC Mali-T604 DVFS driver
* Rockchip SoC Mali-T764 DVFS driver
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -460,11 +457,13 @@ void kbase_platform_dvfs_set_level(kbase_device *kbdev, int level)
if (WARN_ON((level >= MALI_DVFS_STEP) || (level < 0)))
panic("invalid level");
#ifdef CONFIG_MALI_T6XX_FREQ_LOCK
if (mali_dvfs_status_current.upper_lock >= 0 && level > mali_dvfs_status_current.upper_lock)
level = mali_dvfs_status_current.upper_lock;
if (mali_dvfs_status_current.under_lock >= 0 && level < mali_dvfs_status_current.under_lock)
level = mali_dvfs_status_current.under_lock;
#endif
#ifdef CONFIG_MALI_T6XX_DVFS
mutex_lock(&mali_set_clock_lock);

7
drivers/gpu/arm/t6xx/kbase/src/platform/rk/mali_kbase_dvfs.h
View File

@@ -1,9 +1,6 @@
/* drivers/gpu/t6xx/kbase/src/platform/manta/mali_kbase_dvfs.h
/* drivers/gpu/t6xx/kbase/src/platform/rk/mali_kbase_dvfs.h
*
* Copyright 2011 by S.LSI. Samsung Electronics Inc.
* San#24, Nongseo-Dong, Giheung-Gu, Yongin, Korea
*
* Samsung SoC Mali-T604 DVFS driver
* Rockchip SoC Mali-T764 DVFS driver
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as

7
drivers/gpu/arm/t6xx/kbase/src/platform/rk/mali_kbase_platform.h
View File

@@ -1,9 +1,6 @@
/* drivers/gpu/t6xx/kbase/src/platform/manta/mali_kbase_platform.h
/* drivers/gpu/t6xx/kbase/src/platform/rk/mali_kbase_platform.h
*
* Copyright 2011 by S.LSI. Samsung Electronics Inc.
* San#24, Nongseo-Dong, Giheung-Gu, Yongin, Korea
*
* Samsung SoC Mali-T604 platform-dependent codes
* Rockchip SoC Mali-T764 platform-dependent codes
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as

6
drivers/iommu/rockchip-iommu.c
View File

@@ -1052,10 +1052,12 @@ static const struct of_device_id sysmmu_dt_ids[] =
{
{ .compatible = IEP_SYSMMU_COMPATIBLE_NAME},
{ .compatible = VIP_SYSMMU_COMPATIBLE_NAME},
{ .compatible = ISP0_SYSMMU_COMPATIBLE_NAME},
{ .compatible = ISP1_SYSMMU_COMPATIBLE_NAME},
{ .compatible = ISP_SYSMMU0_COMPATIBLE_NAME},
{ .compatible = ISP_SYSMMU1_COMPATIBLE_NAME},
{ .compatible = VOPB_SYSMMU_COMPATIBLE_NAME},
{ .compatible = VOPL_SYSMMU_COMPATIBLE_NAME},
{ .compatible = HEVC_SYSMMU_COMPATIBLE_NAME},
{ .compatible = VPU_SYSMMU_COMPATIBLE_NAME},
{ /* end */ }
};
MODULE_DEVICE_TABLE(of, sysmmu_dt_ids);

6
include/linux/rockchip/sysmmu.h
View File

@@ -16,12 +16,14 @@
#define IEP_SYSMMU_COMPATIBLE_NAME "iommu,iep_mmu"
#define VIP_SYSMMU_COMPATIBLE_NAME "iommu,vip_mmu"
#define ISP0_SYSMMU_COMPATIBLE_NAME "iommu,isp0_mmu"
#define ISP1_SYSMMU_COMPATIBLE_NAME "iommu,isp1_mmu"
#define ISP_SYSMMU0_COMPATIBLE_NAME "iommu,isp_mmu0"
#define ISP_SYSMMU1_COMPATIBLE_NAME "iommu,isp_mmu1"
#define VOPB_SYSMMU_COMPATIBLE_NAME "iommu,vopb_mmu"
#define VOPL_SYSMMU_COMPATIBLE_NAME "iommu,vopl_mmu"
#define HEVC_SYSMMU_COMPATIBLE_NAME "iommu,hevc_mmu"
#define VPU_SYSMMU_COMPATIBLE_NAME "iommu,vpu_mmu"
enum rk_sysmmu_inttype {