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cpufreq: add more syspll freq info [1/1]

Browse Source 
PD#SWPL-4035

Problem:
add more syspll freq info.

Solution:
add more syspll freq info.

Verify:
g12a_u200, verify pass

Change-Id: I3e2a587f5ebaa20126e6ad5c37bd9d2730a75125
Signed-off-by: Hong Guo <hong.guo@amlogic.com>
This commit is contained in:
Hong Guo
2019-01-22 14:25:58 +08:00
committed by Jianxin Pan
parent be75c7dfc1
commit d22515061a
3 changed files with 11 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/amlogic/clk/g12a/g12a.h
View File

@@ -143,8 +143,11 @@ static const struct pll_rate_table g12a_pll_rate_table[] = {
PLL_RATE(1104000000ULL, 184, 1, 2), /*DCO=4416M*/
PLL_RATE(1200000000ULL, 200, 1, 2), /*DCO=4800M*/
PLL_RATE(1296000000ULL, 216, 1, 2), /*DCO=5184M*/
PLL_RATE(1302000000ULL, 217, 1, 2), /*DCO=5208M*/
PLL_RATE(1398000000ULL, 233, 1, 2), /*DCO=5592M*/
PLL_RATE(1404000000ULL, 234, 1, 2), /*DCO=5616M*/
PLL_RATE(1494000000ULL, 249, 1, 2), /*DCO=5976M*/
PLL_RATE(1500000000ULL, 125, 1, 1), /*DCO=3000M*/
PLL_RATE(1512000000ULL, 126, 1, 1), /*DCO=3024M*/
PLL_RATE(1608000000ULL, 134, 1, 1), /*DCO=3216M*/
PLL_RATE(1704000000ULL, 142, 1, 1), /*DCO=3408M*/
@@ -152,10 +155,13 @@ static const struct pll_rate_table g12a_pll_rate_table[] = {
PLL_RATE(1896000000ULL, 158, 1, 1), /*DCO=3792M*/
PLL_RATE(1908000000ULL, 159, 1, 1), /*DCO=3816M*/
PLL_RATE(1920000000ULL, 160, 1, 1), /*DCO=3840M*/
PLL_RATE(2004000000ULL, 167, 1, 1), /*DCO=4008M*/
PLL_RATE(2016000000ULL, 168, 1, 1), /*DCO=4032M*/
PLL_RATE(2100000000ULL, 175, 1, 1), /*DCO=4200M*/
PLL_RATE(2196000000ULL, 183, 1, 1), /*DCO=4392M*/
PLL_RATE(2208000000ULL, 184, 1, 1), /*DCO=4416M*/
PLL_RATE(2292000000ULL, 191, 1, 1), /*DCO=4584M*/
PLL_RATE(2304000000ULL, 192, 1, 1), /*DCO=4608M*/
PLL_RATE(2400000000ULL, 200, 1, 1), /*DCO=4800M*/
PLL_RATE(2496000000ULL, 208, 1, 1), /*DCO=4992M*/
PLL_RATE(2592000000ULL, 216, 1, 1), /*DCO=5184M*/

4
drivers/amlogic/clk/tl1/tl1.h
View File

@@ -162,6 +162,7 @@ static const struct pll_rate_table tl1_pll_rate_table[] = {
PLL_RATE(1104000000ULL, 184, 1, 2), /*DCO=4416M*/
PLL_RATE(1200000000ULL, 200, 1, 2), /*DCO=4800M*/
PLL_RATE(1296000000ULL, 216, 1, 2), /*DCO=5184M*/
PLL_RATE(1302000000ULL, 217, 1, 2), /*DCO=5208M*/
PLL_RATE(1398000000ULL, 233, 1, 2), /*DCO=5592M*/
PLL_RATE(1404000000ULL, 234, 1, 2), /*DCO=5614M*/
PLL_RATE(1494000000ULL, 249, 1, 2), /*DCO=5976M*/
@@ -173,10 +174,13 @@ static const struct pll_rate_table tl1_pll_rate_table[] = {
PLL_RATE(1896000000ULL, 158, 1, 1), /*DCO=3792M*/
PLL_RATE(1908000000ULL, 159, 1, 1), /*DCO=3816M*/
PLL_RATE(1920000000ULL, 160, 1, 1), /*DCO=3840M*/
PLL_RATE(2004000000ULL, 167, 1, 1), /*DCO=4008M*/
PLL_RATE(2016000000ULL, 168, 1, 1), /*DCO=4032M*/
PLL_RATE(2100000000ULL, 175, 1, 1), /*DCO=4200M*/
PLL_RATE(2196000000ULL, 183, 1, 1), /*DCO=4392M*/
PLL_RATE(2208000000ULL, 184, 1, 1), /*DCO=4416M*/
PLL_RATE(2292000000ULL, 191, 1, 1), /*DCO=4584M*/
PLL_RATE(2304000000ULL, 192, 1, 1), /*DCO=4608M*/
PLL_RATE(2400000000ULL, 200, 1, 1), /*DCO=4800M*/
PLL_RATE(2496000000ULL, 208, 1, 1), /*DCO=4992M*/
PLL_RATE(2592000000ULL, 216, 1, 1), /*DCO=5184M*/

2
drivers/amlogic/cpufreq/meson-cpufreq.c
View File

@@ -496,7 +496,7 @@ free_np:
static int meson_cpufreq_exit(struct cpufreq_policy *policy)
{
struct device *cpu_dev;
struct sprd_cpufreq_driver_data *cpufreq_data;
struct meson_cpufreq_driver_data *cpufreq_data;
int cur_cluster = topology_physical_package_id(policy->cpu);
cpufreq_data = policy->driver_data;