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3036: enble dpll slow mode at restart

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wdc
2014-07-04 10:10:43 +08:00
parent ed0041b98a
commit d2beb3e459
1 changed files with 1 additions and 1 deletions
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2
arch/arm/mach-rockchip/rk3036.c
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@@ -159,7 +159,7 @@ static void rk3036_restart(char mode, const char *cmd)
dsb();
/* pll enter slow mode */
writel_relaxed(0x30010000, RK_CRU_VIRT + RK3036_CRU_MODE_CON);
writel_relaxed(0x30110000, RK_CRU_VIRT + RK3036_CRU_MODE_CON);
dsb();
writel_relaxed(0xeca8, RK_CRU_VIRT + RK3036_CRU_GLB_SRST_SND_VALUE);
dsb();