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media: rockchip: isp: hdr dbg rename to rdbk

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to match isp datasheet, rename hdr debug mode to
read back mode

Change-Id: Iabd44ed1d1bcd5984cc0446e31954675d6142df3
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
This commit is contained in:
Cai YiWei
2020-03-21 18:41:09 +08:00
committed by Tao Huang
parent ccf1d13935
commit d2bfa7da42
4 changed files with 58 additions and 63 deletions
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63
drivers/media/platform/rockchip/isp/capture.c
View File

@@ -704,19 +704,18 @@ static int hdr_dma_frame(struct rkisp_device *dev)
switch (dev->hdr.op_mode) {
case HDR_FRAMEX2_DDR:
case HDR_LINEX2_DDR:
case HDR_DBG_FRAME1:
case HDR_RDBK_FRAME1:
max_dma = 1;
break;
case HDR_FRAMEX3_DDR:
case HDR_LINEX3_DDR:
case HDR_DBG_FRAME2:
case HDR_RDBK_FRAME2:
max_dma = 2;
break;
case HDR_DBG_FRAME3:
case HDR_RDBK_FRAME3:
max_dma = HDR_DMA_MAX;
break;
case HDR_LINEX2_NO_DDR:
case HDR_LINEX3_NO_DDR:
case HDR_NORMAL:
default:
max_dma = 0;
@@ -1283,7 +1282,7 @@ static void update_dmatx_v2(struct rkisp_stream *stream)
stream->id == RKISP_STREAM_DMATX1 ||
stream->id == RKISP_STREAM_DMATX2)) {
buf = hdr_dqbuf(&dev->hdr.q_tx[index]);
if (IS_HDR_DBG(dev->hdr.op_mode) &&
if (IS_HDR_RDBK(dev->hdr.op_mode) &&
!dev->dmarx_dev.trigger)
hdr_qbuf(&dev->hdr.q_rx[index], buf);
else
@@ -1515,10 +1514,10 @@ static int rkisp_create_hdr_buf(struct rkisp_device *dev)
stream = &dev->cap_dev.stream[RKISP_STREAM_DMATX0];
size = stream->out_fmt.plane_fmt[0].sizeimage;
max_dma = hdr_dma_frame(dev);
/* hdr dbg mode using base and shd address
/* hdr read back mode using base and shd address
* this support multi-buffer
*/
if (IS_HDR_DBG(dev->hdr.op_mode) &&
if (IS_HDR_RDBK(dev->hdr.op_mode) &&
!dev->dmarx_dev.trigger)
max_buf = HDR_MAX_DUMMY_BUF;
for (i = 0; i < max_dma; i++) {
@@ -1540,21 +1539,21 @@ static int rkisp_create_hdr_buf(struct rkisp_device *dev)
/*
* normal: q_tx[0] to dma0
* q_tx[1] to dma1
* dbg1: using dma2
* rdbk1: using dma2
q_tx[0] to dma2
* dbg2: using dma0 (as M), dma2 (as S)
* rdbk2: using dma0 (as M), dma2 (as S)
* q_tx[0] to dma0
* q_tx[1] to dma2
* dbg3: using dma0 (as M), dam1 (as L), dma2 (as S)
* rdbk3: using dma0 (as M), dam1 (as L), dma2 (as S)
* q_tx[0] to dma0
* q_tx[1] to dma1
* q_tx[2] to dma2
*/
if (dev->hdr.op_mode == HDR_DBG_FRAME1) {
if (dev->hdr.op_mode == HDR_RDBK_FRAME1) {
dev->hdr.index[HDR_DMA2] = 0;
dev->hdr.index[HDR_DMA0] = 1;
dev->hdr.index[HDR_DMA1] = 2;
} else if (dev->hdr.op_mode == HDR_DBG_FRAME2) {
} else if (dev->hdr.op_mode == HDR_RDBK_FRAME2) {
dev->hdr.index[HDR_DMA0] = 0;
dev->hdr.index[HDR_DMA2] = 1;
dev->hdr.index[HDR_DMA1] = 2;
@@ -1581,7 +1580,7 @@ void hdr_destroy_buf(struct rkisp_device *dev)
atomic_set(&dev->hdr.refcnt, 0);
max_dma = hdr_dma_frame(dev);
if (IS_HDR_DBG(dev->hdr.op_mode) &&
if (IS_HDR_RDBK(dev->hdr.op_mode) &&
!dev->dmarx_dev.trigger)
max_buf = HDR_MAX_DUMMY_BUF;
for (i = 0; i < max_dma; i++) {
@@ -1685,19 +1684,19 @@ int hdr_config_dmatx(struct rkisp_device *dev)
dev->hdr.op_mode == HDR_LINEX2_DDR ||
dev->hdr.op_mode == HDR_FRAMEX3_DDR ||
dev->hdr.op_mode == HDR_LINEX3_DDR ||
dev->hdr.op_mode == HDR_DBG_FRAME2 ||
dev->hdr.op_mode == HDR_DBG_FRAME3)
dev->hdr.op_mode == HDR_RDBK_FRAME2 ||
dev->hdr.op_mode == HDR_RDBK_FRAME3)
dmatx0_config_mi(&dev->cap_dev.stream[RKISP_STREAM_DMATX0]);
if (dev->hdr.op_mode == HDR_FRAMEX3_DDR ||
dev->hdr.op_mode == HDR_LINEX3_DDR ||
dev->hdr.op_mode == HDR_DBG_FRAME3)
dev->hdr.op_mode == HDR_RDBK_FRAME3)
dmatx1_config_mi(&dev->cap_dev.stream[RKISP_STREAM_DMATX1]);
if (dev->hdr.op_mode == HDR_DBG_FRAME1 ||
dev->hdr.op_mode == HDR_DBG_FRAME2 ||
dev->hdr.op_mode == HDR_DBG_FRAME3)
if (dev->hdr.op_mode == HDR_RDBK_FRAME1 ||
dev->hdr.op_mode == HDR_RDBK_FRAME2 ||
dev->hdr.op_mode == HDR_RDBK_FRAME3)
dmatx2_config_mi(&dev->cap_dev.stream[RKISP_STREAM_DMATX2]);
if (IS_HDR_DBG(dev->hdr.op_mode))
if (IS_HDR_RDBK(dev->hdr.op_mode))
raw_rd_ctrl(dev->base_addr, dev->csi_dev.memory << 2);
return 0;
}
@@ -1716,22 +1715,22 @@ void hdr_stop_dmatx(struct rkisp_device *dev)
dev->hdr.op_mode == HDR_LINEX2_DDR ||
dev->hdr.op_mode == HDR_FRAMEX3_DDR ||
dev->hdr.op_mode == HDR_LINEX3_DDR ||
dev->hdr.op_mode == HDR_DBG_FRAME2 ||
dev->hdr.op_mode == HDR_DBG_FRAME3) {
dev->hdr.op_mode == HDR_RDBK_FRAME2 ||
dev->hdr.op_mode == HDR_RDBK_FRAME3) {
stream = &dev->cap_dev.stream[RKISP_STREAM_DMATX0];
raw_wr_disable(stream);
stream->u.dmatx.is_config = false;
}
if (dev->hdr.op_mode == HDR_FRAMEX3_DDR ||
dev->hdr.op_mode == HDR_LINEX3_DDR ||
dev->hdr.op_mode == HDR_DBG_FRAME3) {
dev->hdr.op_mode == HDR_RDBK_FRAME3) {
stream = &dev->cap_dev.stream[RKISP_STREAM_DMATX1];
raw_wr_disable(stream);
stream->u.dmatx.is_config = false;
}
if (dev->hdr.op_mode == HDR_DBG_FRAME1 ||
dev->hdr.op_mode == HDR_DBG_FRAME2 ||
dev->hdr.op_mode == HDR_DBG_FRAME3) {
if (dev->hdr.op_mode == HDR_RDBK_FRAME1 ||
dev->hdr.op_mode == HDR_RDBK_FRAME2 ||
dev->hdr.op_mode == HDR_RDBK_FRAME3) {
stream = &dev->cap_dev.stream[RKISP_STREAM_DMATX2];
raw_wr_disable(stream);
stream->u.dmatx.is_config = false;
@@ -1749,12 +1748,12 @@ static void rkisp_stream_stop(struct rkisp_stream *stream)
int ret = 0;
if (dev->isp_ver == ISP_V20 &&
((dev->hdr.op_mode == HDR_DBG_FRAME1 &&
((dev->hdr.op_mode == HDR_RDBK_FRAME1 &&
stream->id == RKISP_STREAM_DMATX2) ||
(dev->hdr.op_mode == HDR_DBG_FRAME2 &&
(dev->hdr.op_mode == HDR_RDBK_FRAME2 &&
(stream->id == RKISP_STREAM_DMATX2 ||
stream->id == RKISP_STREAM_DMATX0)) ||
(dev->hdr.op_mode == HDR_DBG_FRAME3 &&
(dev->hdr.op_mode == HDR_RDBK_FRAME3 &&
(stream->id == RKISP_STREAM_DMATX2 ||
stream->id == RKISP_STREAM_DMATX1 ||
stream->id == RKISP_STREAM_DMATX0)))) {
@@ -2985,9 +2984,9 @@ void rkisp_mi_isr(u32 mis_val, struct rkisp_device *dev)
} else {
mi_frame_end(stream);
if (dev->dmarx_dev.trigger == T_AUTO &&
((dev->hdr.op_mode == HDR_DBG_FRAME1 && end_tx2) ||
(dev->hdr.op_mode == HDR_DBG_FRAME2 && end_tx2 && end_tx0) ||
(dev->hdr.op_mode == HDR_DBG_FRAME3 && end_tx2 && end_tx1 && end_tx0))) {
((dev->hdr.op_mode == HDR_RDBK_FRAME1 && end_tx2) ||
(dev->hdr.op_mode == HDR_RDBK_FRAME2 && end_tx2 && end_tx0) ||
(dev->hdr.op_mode == HDR_RDBK_FRAME3 && end_tx2 && end_tx1 && end_tx0))) {
end_tx0 = false;
end_tx1 = false;
end_tx2 = false;

36
drivers/media/platform/rockchip/isp/csi.c
View File

@@ -277,20 +277,19 @@ static int csi_config(struct rkisp_csi_device *csi)
dev->hdr.esp_mode = hdr_cfg.esp.mode;
}
}
#if RKISP_HDR_DBG_MODE
#if RKISP_HDR_RDBK_MODE
switch (dev->hdr.op_mode) {
case HDR_FRAMEX2_DDR:
case HDR_LINEX2_DDR:
case HDR_LINEX2_NO_DDR:
dev->hdr.op_mode = HDR_DBG_FRAME2;
dev->hdr.op_mode = HDR_RDBK_FRAME2;
break;
case HDR_FRAMEX3_DDR:
case HDR_LINEX3_DDR:
case HDR_LINEX3_NO_DDR:
dev->hdr.op_mode = HDR_DBG_FRAME3;
dev->hdr.op_mode = HDR_RDBK_FRAME3;
break;
case HDR_NORMAL:
dev->hdr.op_mode = HDR_DBG_FRAME1;
dev->hdr.op_mode = HDR_RDBK_FRAME1;
break;
default:
break;
@@ -318,17 +317,16 @@ static int csi_config(struct rkisp_csi_device *csi)
/* hdr merge */
switch (dev->hdr.op_mode) {
case HDR_DBG_FRAME2:
case HDR_RDBK_FRAME2:
case HDR_FRAMEX2_DDR:
case HDR_LINEX2_DDR:
case HDR_LINEX2_NO_DDR:
val = SW_HDRMGE_EN |
SW_HDRMGE_MODE_FRAMEX2;
break;
case HDR_DBG_FRAME3:
case HDR_RDBK_FRAME3:
case HDR_FRAMEX3_DDR:
case HDR_LINEX3_DDR:
case HDR_LINEX3_NO_DDR:
val = SW_HDRMGE_EN |
SW_HDRMGE_MODE_FRAMEX3;
break;
@@ -400,17 +398,17 @@ int rkisp_csi_config_patch(struct rkisp_device *dev)
} else {
switch (dev->isp_inp & 0x7) {
case INP_RAWRD2 | INP_RAWRD0:
dev->hdr.op_mode = HDR_DBG_FRAME2;
dev->hdr.op_mode = HDR_RDBK_FRAME2;
val = SW_HDRMGE_EN |
SW_HDRMGE_MODE_FRAMEX2;
break;
case INP_RAWRD2 | INP_RAWRD1 | INP_RAWRD0:
dev->hdr.op_mode = HDR_DBG_FRAME3;
dev->hdr.op_mode = HDR_RDBK_FRAME3;
val = SW_HDRMGE_EN |
SW_HDRMGE_MODE_FRAMEX3;
break;
default: //INP_RAWRD2
dev->hdr.op_mode = HDR_DBG_FRAME1;
dev->hdr.op_mode = HDR_RDBK_FRAME1;
}
writel(SW_IBUF_OP_MODE(dev->hdr.op_mode),
dev->base_addr + CSI2RX_CTRL0);
@@ -425,7 +423,7 @@ int rkisp_csi_config_patch(struct rkisp_device *dev)
}
/*
* for hdr debug mode, rawrd read back data
* for hdr read back mode, rawrd read back data
* this will update rawrd base addr to shadow.
*/
void rkisp_trigger_read_back(struct rkisp_csi_device *csi, u8 dma2frm)
@@ -437,11 +435,11 @@ void rkisp_trigger_read_back(struct rkisp_csi_device *csi, u8 dma2frm)
dma2frm = 2;
memset(csi->filt_state, 0, sizeof(csi->filt_state));
switch (dev->hdr.op_mode) {
case HDR_DBG_FRAME3://is rawrd1 rawrd0 rawrd2
case HDR_RDBK_FRAME3://is rawrd1 rawrd0 rawrd2
csi->filt_state[CSI_F_RD1] = dma2frm;
case HDR_DBG_FRAME2://is rawrd0 and rawrd2
case HDR_RDBK_FRAME2://is rawrd0 and rawrd2
csi->filt_state[CSI_F_RD0] = dma2frm;
case HDR_DBG_FRAME1://only rawrd2
case HDR_RDBK_FRAME1://only rawrd2
csi->filt_state[CSI_F_RD2] = dma2frm;
break;
default://other no support readback
@@ -463,7 +461,7 @@ int rkisp_csi_trigger_event(struct rkisp_csi_device *csi, void *arg)
unsigned long lock_flags = 0;
int times = -1;
if (!IS_HDR_DBG(dev->hdr.op_mode))
if (!IS_HDR_RDBK(dev->hdr.op_mode))
return 0;
spin_lock_irqsave(&csi->rdbk_lock, lock_flags);
@@ -507,17 +505,17 @@ void rkisp_csi_sof(struct rkisp_device *dev, u8 id)
{
/* to get long frame vc_start */
switch (dev->hdr.op_mode) {
case HDR_DBG_FRAME1:
case HDR_RDBK_FRAME1:
if (id != HDR_DMA2)
return;
break;
case HDR_DBG_FRAME2:
case HDR_RDBK_FRAME2:
case HDR_FRAMEX2_DDR:
case HDR_LINEX2_DDR:
if (id != HDR_DMA0)
return;
break;
case HDR_DBG_FRAME3:
case HDR_RDBK_FRAME3:
case HDR_FRAMEX3_DDR:
case HDR_LINEX3_DDR:
if (id != HDR_DMA1)

17
drivers/media/platform/rockchip/isp/csi.h
View File

@@ -8,7 +8,7 @@
#define CSI_DEV_NAME DRIVER_NAME "-csi-subdev"
#define RKISP_HDR_DBG_MODE 0
#define RKISP_HDR_RDBK_MODE 0
#define HDR_MAX_DUMMY_BUF 3
/* define max dmatx to use for hdr */
@@ -17,24 +17,23 @@
#define HDR_DMA1 1
#define HDR_DMA2 2
#define IS_HDR_DBG(x) ({ \
#define IS_HDR_RDBK(x) ({ \
typeof(x) __x = (x); \
(__x == HDR_DBG_FRAME1 || \
__x == HDR_DBG_FRAME2 || \
__x == HDR_DBG_FRAME3); \
(__x == HDR_RDBK_FRAME1 || \
__x == HDR_RDBK_FRAME2 || \
__x == HDR_RDBK_FRAME3); \
})
enum hdr_op_mode {
HDR_NORMAL = 0,
HDR_DBG_FRAME1 = 4,
HDR_DBG_FRAME2 = 5,
HDR_DBG_FRAME3 = 6,
HDR_RDBK_FRAME1 = 4,
HDR_RDBK_FRAME2 = 5,
HDR_RDBK_FRAME3 = 6,
HDR_FRAMEX2_DDR = 8,
HDR_LINEX2_DDR = 9,
HDR_LINEX2_NO_DDR = 10,
HDR_FRAMEX3_DDR = 12,
HDR_LINEX3_DDR = 13,
HDR_LINEX3_NO_DDR = 14,
};
enum rkisp_csi_pad {

5
drivers/media/platform/rockchip/isp/isp_mipi_luma.c
View File

@@ -270,16 +270,15 @@ void rkisp_luma_isr(struct rkisp_luma_vdev *luma_vdev, u32 isp_stat)
goto unlock;
switch (op_mode) {
case HDR_DBG_FRAME2:
case HDR_RDBK_FRAME2:
case HDR_FRAMEX2_DDR:
case HDR_LINEX2_DDR:
case HDR_LINEX2_NO_DDR:
frm_mode = RKISP_LUMA_TWOFRM;
break;
case HDR_DBG_FRAME3:
case HDR_RDBK_FRAME3:
case HDR_FRAMEX3_DDR:
case HDR_LINEX3_DDR:
case HDR_LINEX3_NO_DDR:
frm_mode = RKISP_LUMA_THREEFRM;
break;
default: