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soc: rockchip: opp_select: Fix getting wrong struct rockchip_clk_pll pointer

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On RK3588, the clocks propety in gpu and npu opp table are not pll
clock, when call rockchip_pll_clk_rate_to_scale(), it will get a wrong
pointer from to_rockchip_clk_pll, the pll->rate_count may be a large
value, and do unnecessary for loops.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I1364e8a930cc8cd9e2cb9627709eea0ba198a566
This commit is contained in:
Finley Xiao
2023-12-01 15:55:50 +08:00
parent e7117250a9
commit d2eff9c689
1 changed files with 6 additions and 2 deletions
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8
drivers/soc/rockchip/rockchip_opp_select.c
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@@ -1773,6 +1773,10 @@ static int rockchip_adjust_power_scale(struct device *dev, struct rockchip_opp_i
rockchip_adjust_opp_by_irdrop(dev, np, &safe_rate, &max_rate);
dev_info(dev, "avs=%d\n", avs);
if (!safe_rate && !info->scale)
goto out_np;
clk = of_clk_get_by_name(np, NULL);
if (IS_ERR(clk)) {
if (!safe_rate)
@@ -1786,14 +1790,14 @@ static int rockchip_adjust_power_scale(struct device *dev, struct rockchip_opp_i
if (safe_rate)
irdrop_scale = rockchip_pll_clk_rate_to_scale(clk, safe_rate);
if (max_rate)
opp_scale = rockchip_pll_clk_rate_to_scale(clk, max_rate);
target_scale = max(irdrop_scale, info->scale);
if (target_scale <= 0)
goto out_clk;
dev_dbg(dev, "target_scale=%d, irdrop_scale=%d, scale=%d\n",
target_scale, irdrop_scale, info->scale);
if (max_rate)
opp_scale = rockchip_pll_clk_rate_to_scale(clk, max_rate);
if (avs == AVS_SCALING_RATE) {
ret = rockchip_pll_clk_adaptive_scaling(clk, target_scale);
if (ret)