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arm64: dts: rockchip: adjust opp-table by leakage for rk3328 SoCs

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Change-Id: Ic827fe9f868a71e6f7a69f91df43d5f7a23bc5d3
Signed-off-by: Liang Chen <cl@rock-chips.com>
This commit is contained in:
Liang Chen
2018-06-05 17:48:38 +08:00
parent b72c852580
commit d362c39d5d
1 changed files with 34 additions and 34 deletions
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68
arch/arm64/boot/dts/rockchip/rk3328.dtsi
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@@ -112,53 +112,53 @@
opp-shared;
rockchip,leakage-voltage-sel = <
1 8 0
9 254 1
1 10 0
11 254 1
>;
nvmem-cells = <&cpu_leakage>;
nvmem-cell-names = "cpu_leakage";
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <975000 975000 1325000>;
opp-microvolt-L0 = <975000 975000 1325000>;
opp-microvolt-L1 = <950000 950000 1325000>;
opp-microvolt = <950000 950000 1350000>;
opp-microvolt-L0 = <950000 950000 1350000>;
opp-microvolt-L1 = <950000 950000 1350000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <975000 975000 1325000>;
opp-microvolt-L0 = <975000 975000 1325000>;
opp-microvolt-L1 = <950000 950000 1325000>;
opp-microvolt = <950000 950000 1350000>;
opp-microvolt-L0 = <950000 950000 1350000>;
opp-microvolt-L1 = <950000 950000 1350000>;
clock-latency-ns = <40000>;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1025000 1025000 1325000>;
opp-microvolt-L0 = <1025000 1025000 1325000>;
opp-microvolt-L1 = <1000000 1000000 1325000>;
opp-microvolt = <1050000 1050000 1350000>;
opp-microvolt-L0 = <1050000 1050000 1350000>;
opp-microvolt-L1 = <1000000 1000000 1350000>;
clock-latency-ns = <40000>;
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1125000 1125000 1325000>;
opp-microvolt-L0 = <1125000 1125000 1325000>;
opp-microvolt-L1 = <1100000 1100000 1325000>;
opp-microvolt = <1150000 1150000 1350000>;
opp-microvolt-L0 = <1150000 1150000 1350000>;
opp-microvolt-L1 = <1100000 1100000 1350000>;
clock-latency-ns = <40000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1250000 1250000 1325000>;
opp-microvolt-L0 = <1250000 1250000 1325000>;
opp-microvolt-L1 = <1225000 1225000 1325000>;
opp-microvolt = <1275000 1275000 1350000>;
opp-microvolt-L0 = <1275000 1275000 1350000>;
opp-microvolt-L1 = <1225000 1225000 1350000>;
clock-latency-ns = <40000>;
};
opp-1296000000 {
opp-hz = /bits/ 64 <1296000000>;
opp-microvolt = <1325000 1325000 1325000>;
opp-microvolt-L0 = <1325000 1325000 1325000>;
opp-microvolt-L1 = <1300000 1300000 1325000>;
opp-microvolt = <1350000 1350000 1350000>;
opp-microvolt-L0 = <1350000 1350000 1350000>;
opp-microvolt-L1 = <1300000 1300000 1350000>;
clock-latency-ns = <40000>;
};
};
@@ -699,17 +699,17 @@
compatible = "operating-points-v2";
rockchip,leakage-voltage-sel = <
1 8 0
9 254 1
1 10 0
11 254 1
>;
nvmem-cells = <&logic_leakage>;
nvmem-cell-names = "gpu_leakage";
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <925000>;
opp-microvolt-L0 = <925000>;
opp-microvolt-L1 = <900000>;
opp-microvolt = <950000>;
opp-microvolt-L0 = <950000>;
opp-microvolt-L1 = <950000>;
};
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
@@ -725,8 +725,8 @@
};
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1125000>;
opp-microvolt-L0 = <1125000>;
opp-microvolt = <1150000>;
opp-microvolt-L0 = <1150000>;
opp-microvolt-L1 = <1100000>;
};
};
@@ -820,8 +820,8 @@
compatible = "operating-points-v2";
rockchip,leakage-voltage-sel = <
1 8 0
9 254 1
1 10 0
11 254 1
>;
nvmem-cells = <&logic_leakage>;
nvmem-cell-names = "rkvdec_leakage";
@@ -1451,17 +1451,17 @@
compatible = "operating-points-v2";
rockchip,leakage-voltage-sel = <
1 8 0
9 254 1
1 10 0
11 254 1
>;
nvmem-cells = <&logic_leakage>;
nvmem-cell-names = "ddr_leakage";
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <925000>;
opp-microvolt-L0 = <925000>;
opp-microvolt-L1 = <900000>;
opp-microvolt = <950000>;
opp-microvolt-L0 = <950000>;
opp-microvolt-L1 = <950000>;
status = "disabled";
};
opp-600000000 {