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UPSTREAM: coresight: etm4x: Always read the registers on the host CPU

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As we are about to add support for sysreg access to ETM4.4+ components,
make sure that we read the registers only on the host CPU.

Bug: 174685394
Link: https://lore.kernel.org/r/20210110224850.1880240-8-suzuki.poulose@arm.com
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20210201181351.1475223-10-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 5e2acf9d5d)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I5b06467bbc1011cb4ab84c25712a4647f803c16a
This commit is contained in:
Suzuki K Poulose
2021-02-01 11:13:29 -07:00
committed by Todd Kjos
parent 39bf277b23
commit d3a24f5c62
1 changed files with 10 additions and 13 deletions
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23
drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
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@@ -2344,23 +2344,20 @@ static u32 etmv4_cross_read(const struct device *dev, u32 offset)
return reg.data;
}
#define coresight_etm4x_reg(name, offset) \
coresight_simple_reg32(struct etmv4_drvdata, name, offset)
#define coresight_etm4x_cross_read(name, offset) \
coresight_simple_func(struct etmv4_drvdata, etmv4_cross_read, \
name, offset)
coresight_etm4x_reg(trcpdcr, TRCPDCR);
coresight_etm4x_reg(trcpdsr, TRCPDSR);
coresight_etm4x_reg(trclsr, TRCLSR);
coresight_etm4x_reg(trcauthstatus, TRCAUTHSTATUS);
coresight_etm4x_reg(trcdevid, TRCDEVID);
coresight_etm4x_reg(trcdevtype, TRCDEVTYPE);
coresight_etm4x_reg(trcpidr0, TRCPIDR0);
coresight_etm4x_reg(trcpidr1, TRCPIDR1);
coresight_etm4x_reg(trcpidr2, TRCPIDR2);
coresight_etm4x_reg(trcpidr3, TRCPIDR3);
coresight_etm4x_cross_read(trcpdcr, TRCPDCR);
coresight_etm4x_cross_read(trcpdsr, TRCPDSR);
coresight_etm4x_cross_read(trclsr, TRCLSR);
coresight_etm4x_cross_read(trcauthstatus, TRCAUTHSTATUS);
coresight_etm4x_cross_read(trcdevid, TRCDEVID);
coresight_etm4x_cross_read(trcdevtype, TRCDEVTYPE);
coresight_etm4x_cross_read(trcpidr0, TRCPIDR0);
coresight_etm4x_cross_read(trcpidr1, TRCPIDR1);
coresight_etm4x_cross_read(trcpidr2, TRCPIDR2);
coresight_etm4x_cross_read(trcpidr3, TRCPIDR3);
coresight_etm4x_cross_read(trcoslsr, TRCOSLSR);
coresight_etm4x_cross_read(trcconfig, TRCCONFIGR);
coresight_etm4x_cross_read(trctraceid, TRCTRACEIDR);