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dtv_demod: TM2,demod comb j83b to fix timeshift issue [1/1]

Browse Source 
PD#SWPL-5655

Problem:
j.83b has a lot of mosaic when enable timeshift(clk = 250M)

Solution:
tm2 chip changelist

Verify:
verified by T962E2_AB311 & T962X2_X301

Change-Id: I106626bf7ab5a1997e9c76055a170b30d52a08bb
Signed-off-by: zhiwei.yuan <zhiwei.yuan@amlogic.com>
This commit is contained in:
zhiwei.yuan
2019-06-13 20:35:36 +08:00
committed by Tao Zeng
parent 9b87913467
commit d437dc1927
4 changed files with 40 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

36
drivers/amlogic/media/dtv_demod/amlfrontend.c
View File

@@ -1208,10 +1208,15 @@ static int Gxtv_Demod_Dvbc_Init(/*struct aml_fe_dev *dev, */int mode)
demod_status.tmp = Cry_mode;
}
if (is_ic_ver(IC_VER_TL1) || is_ic_ver(IC_VER_TM2)) {
if (is_ic_ver(IC_VER_TL1)) {
sys.adc_clk = Adc_Clk_24M;
/*for timeshift mosaic issue,already fixed with tm2*/
sys.demod_clk = Demod_Clk_167M;
demod_status.tmp = Cry_mode;
} else if (is_ic_ver(IC_VER_TM2)) {
sys.adc_clk = Adc_Clk_24M;
sys.demod_clk = Demod_Clk_250M;
demod_status.tmp = Cry_mode;
}
demod_status.ch_if = Si2176_5M_If * 1000;
@@ -1671,8 +1676,9 @@ static int gxtv_demod_atsc_set_frontend(struct dvb_frontend *fe)
if (atsc_flag != QAM_AUTO)
atsc_flag = QAM_AUTO;
/* demod_set_demod_reg(0x502, TXLX_ADC_REG6);*/
//sys_clk=167M
dd_tvafe_hiu_reg_write(D_HHI_DEMOD_CLK_CNTL, 0x502);
/*sys_clk=167M*/
if (!is_ic_ver(IC_VER_TM2))
dd_tvafe_hiu_reg_write(D_HHI_DEMOD_CLK_CNTL, 0x502);
demod_set_mode_ts(Gxtv_Dvbc);
param_j83b.ch_freq = c->frequency / 1000;
@@ -1684,21 +1690,36 @@ static int gxtv_demod_atsc_set_frontend(struct dvb_frontend *fe)
else
param_j83b.symb_rate = 5361;
if (is_ic_ver(IC_VER_TL1) || is_ic_ver(IC_VER_TM2)) {
//for timeshift mosaic
if (is_ic_ver(IC_VER_TL1)) {
/*for timeshift mosaic issue,already fixed with tm2*/
demod_status.clk_freq = Demod_Clk_167M;
nco_rate = (demod_status.adc_freq * 256)
/ demod_status.clk_freq + 2;
front_write_reg_v4(0x20,
((front_read_reg_v4(0x20) & ~0xff)
| (nco_rate & 0xff)));
front_write_reg_v4(0x2f, 0x5);//for timeshift mosaic
/*for timeshift mosaic issue,already fixed with tm2*/
front_write_reg_v4(0x2f, 0x5);
} else if (is_ic_ver(IC_VER_TM2)) {
nco_rate = (demod_status.adc_freq * 256)
/ demod_status.clk_freq + 2;
front_write_reg_v4(0x20,
((front_read_reg_v4(0x20) & ~0xff)
| (nco_rate & 0xff)));
}
dvbc_set_ch(&demod_status, /*&demod_i2c, */&param_j83b);
if (is_ic_ver(IC_VER_TL1) || is_ic_ver(IC_VER_TM2)) {
qam_write_reg(0x7, 0x10f33);
/*don't bypass afifo,can run demod at 250M
*for timeshift mosaic issue
*/
if (is_ic_ver(IC_VER_TM2))
qam_write_reg(0x87,
qam_read_reg(0x87) & 0xfffffffe);
set_j83b_filter_reg_v4();
qam_write_reg(0x12, 0x50e1000);
qam_write_reg(0x30, 0x41f2f69);
@@ -1731,7 +1752,8 @@ static int gxtv_demod_atsc_set_frontend(struct dvb_frontend *fe)
0x16e3600);
}
atsc_write_reg_v4(0x12, 0x18);//for timeshift mosaic
/*for timeshift mosaic issue*/
atsc_write_reg_v4(0x12, 0x18);
Val_0x20.bits = atsc_read_reg_v4(ATSC_CNTR_REG_0X20);
Val_0x20.b.cpu_rst = 1;
atsc_write_reg_v4(ATSC_CNTR_REG_0X20, Val_0x20.bits);

9
drivers/amlogic/media/dtv_demod/demod_func.c
View File

@@ -986,8 +986,13 @@ int demod_set_sys(struct aml_demod_sta *demod_sta,
front_write_reg_v4(0x20, ((front_read_reg_v4(0x20) & ~0xff)
| (nco_rate & 0xff)));
front_write_reg_v4(0x20, (front_read_reg_v4(0x20) | (1 << 8)));
front_write_reg_v4(0x2f, 0x5);//for timsshift mosaic
dd_tvafe_hiu_reg_write(0x1d0, 0x502);//sys_clk=167M
if (is_ic_ver(IC_VER_TL1)) {
/*for timeshift mosaic issue, already fixed with tm2*/
front_write_reg_v4(0x2f, 0x5);
/*sys_clk=167M*/
dd_tvafe_hiu_reg_write(0x1d0, 0x502);
}
}
demod_sta->adc_freq = clk_adc;

4
drivers/amlogic/media/dtv_demod/dtmb_func.c
View File

@@ -151,12 +151,10 @@ void dtmb_all_reset(void)
dtmb_write_reg(0x5b << 2, 0x4d6a0a25);
}
//for timeshift issue(chuangcheng test)
/*for timeshift mosaic issue*/
dtmb_write_reg(0x4e << 2, 0x256cf604);
/*delay fec lock to prevent eq is confused by signal*/
dtmb_write_reg(DTMB_FRONT_DEBUG_CFG, 0x5680000);
} else {
dtmb_write_reg(DTMB_FRONT_AGC_CONFIG1, 0x10127);
dtmb_write_reg(DTMB_CHE_IBDFE_CONFIG6, 0x943228cc);

5
drivers/amlogic/media/dtv_demod/dvbc_v3.c
View File

@@ -495,9 +495,10 @@ void dvbc_reg_initial(struct aml_demod_sta *demod_sta)
qam_write_reg(0x7, 0x10f23);
qam_write_reg(0x3a, 0x0);
qam_write_reg(0x7, 0x10f33);
/*enable fsm, sm start work, need wait some time(2ms) for AGC stable*/
qam_write_reg(0x3a, 0x4);
/*auto track*/
/* dvbc_set_auto_symtrack(); */
/*auto track*/
/*dvbc_set_auto_symtrack(); */
}
u32 dvbc_set_auto_symtrack(void)