cpufreq: rockchip: correct the offset of bin flag in efuse for rk3288w

Change-Id: I15154876e3b54d64b63c9659cfe2548d19ccb7a9
Signed-off-by: Liang Chen <cl@rock-chips.com>

arch/arm/boot/dts/rk3288.dtsi

@@ -135,9 +135,11 @@
 		rockchip,avs-scale = <17>;
 		rockchip,max-volt = <1350000>;
 		nvmem-cells = <&cpu_leakage>, <&special_function>,
-			      <&performance>, <&process_version>;
+			      <&performance>, <&process_version>,
+			      <&performance_w>;
 		nvmem-cell-names = "leakage", "special",
-				   "performance", "process";
+				   "performance", "process",
+				   "performance-w";
 		rockchip,bin-scaling-sel = <
 			0               17
 			1               25
@@ -1798,6 +1800,10 @@
 		cpu_leakage: cpu-leakage@17 {
 			reg = <0x17 0x1>;
 		};
+		performance_w: performance@1c {
+			reg = <0x1c 0x1>;
+			bits = <4 3>;
+		};
 		performance: performance@1d {
 			reg = <0x1d 0x1>;
 			bits = <4 3>;

drivers/cpufreq/rockchip-cpufreq.c

@@ -29,6 +29,7 @@
 #include <linux/slab.h>
 #include <linux/soc/rockchip/pvtm.h>
 #include <linux/thermal.h>
+#include <linux/rockchip/cpu.h>
 #include <soc/rockchip/rockchip_opp_select.h>
 
 #include "../clk/rockchip/clk.h"
@@ -57,6 +58,7 @@ static int rk3288_get_soc_info(struct device *dev, struct device_node *np,
 			       int *bin, int *process)
 {
 	int ret = 0, value = -EINVAL;
+	char *name;
 
 	if (!bin)
 		goto next;
@@ -71,9 +73,14 @@ static int rk3288_get_soc_info(struct device *dev, struct device_node *np,
 		else
 			*bin = 1;
 	}
-	if (of_property_match_string(np, "nvmem-cell-names",
-				     "performance") >= 0) {
-		ret = rockchip_get_efuse_value(np, "performance", &value);
+
+	if (soc_is_rk3288w())
+		name = "performance-w";
+	else
+		name = "performance";
+
+	if (of_property_match_string(np, "nvmem-cell-names", name) >= 0) {
+		ret = rockchip_get_efuse_value(np, name, &value);
 		if (ret) {
 			dev_err(dev, "Failed to get soc performance value\n");
 			goto out;