drm/bridge: synopsys: dw-hdmi-qp: filter hdmi 2.1 resolution when enable-gpio is not configured

Change-Id: I84e6a7f295441c9a9b6ae2cdb897d88c81582480
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
This commit is contained in:
Algea Cao
2023-08-08 10:31:01 +08:00
committed by Tao Huang
parent aa26c9fbd9
commit d76dbd3976
2 changed files with 21 additions and 8 deletions

View File

@@ -2753,6 +2753,7 @@ dw_hdmi_qp_bridge_mode_valid(struct drm_bridge *bridge,
const struct drm_display_mode *mode)
{
struct dw_hdmi_qp *hdmi = bridge->driver_private;
const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
if (mode->clock <= 25000)
return MODE_CLOCK_RANGE;
@@ -2760,6 +2761,10 @@ dw_hdmi_qp_bridge_mode_valid(struct drm_bridge *bridge,
if (!hdmi->sink_is_hdmi && mode->clock > 340000)
return MODE_BAD;
if (pdata->mode_valid)
return pdata->mode_valid(NULL, pdata->priv_data, info,
mode);
return MODE_OK;
}

View File

@@ -1590,14 +1590,6 @@ dw_hdmi_rockchip_mode_valid(struct dw_hdmi *dw_hdmi, void *data,
struct drm_crtc *crtc;
struct rockchip_hdmi *hdmi;
/*
* Pixel clocks we support are always < 2GHz and so fit in an
* int. We should make sure source rate does too so we don't get
* overflow when we multiply by 1000.
*/
if (mode->clock > INT_MAX / 1000)
return MODE_BAD;
if (!encoder) {
const struct drm_connector_helper_funcs *funcs;
@@ -1614,6 +1606,21 @@ dw_hdmi_rockchip_mode_valid(struct dw_hdmi *dw_hdmi, void *data,
hdmi = to_rockchip_hdmi(encoder);
if (hdmi->is_hdmi_qp) {
if (!hdmi->enable_gpio && mode->clock > 600000)
return MODE_BAD;
return MODE_OK;
}
/*
* Pixel clocks we support are always < 2GHz and so fit in an
* int. We should make sure source rate does too so we don't get
* overflow when we multiply by 1000.
*/
if (mode->clock > INT_MAX / 1000)
return MODE_BAD;
/*
* If sink max TMDS clock < 340MHz, we should check the mode pixel
* clock > 340MHz is YCbCr420 or not and whether the platform supports
@@ -3363,6 +3370,7 @@ struct rockchip_hdmi_chip_data rk3588_hdmi_chip_data = {
};
static const struct dw_hdmi_plat_data rk3588_hdmi_drv_data = {
.mode_valid = dw_hdmi_rockchip_mode_valid,
.phy_data = &rk3588_hdmi_chip_data,
.qp_phy_ops = &rk3588_hdmi_phy_ops,
.phy_name = "samsung_hdptx_phy",