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add soft reset to usb controller

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This commit is contained in:
yangkai
2011-06-15 16:20:36 +08:00
parent 9495dd7a4f
commit d78125173a
2 changed files with 47 additions and 10 deletions
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28
drivers/usb/dwc_otg/dwc_otg_driver.c
View File

@@ -69,6 +69,8 @@
#include "dwc_otg_pcd.h"
#include "dwc_otg_hcd.h"
#include <mach/cru.h>
//#define DWC_DRIVER_VERSION "2.60a 22-NOV-2006"
//#define DWC_DRIVER_VERSION "2.70 2009-12-31"
#define DWC_DRIVER_VERSION "3.00 2010-12-12 rockchip"
@@ -1270,6 +1272,15 @@ static __devinit int dwc_otg_driver_probe(struct platform_device *pdev)
memset(dwc_otg_device, 0, sizeof(*dwc_otg_device));
dwc_otg_device->reg_offset = 0xFFFFFFFF;
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_AHB_BUS, true);
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_PHY, true);
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_CONTROLLER, true);
udelay(1);
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_AHB_BUS, false);
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_PHY, false);
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_CONTROLLER, false);
busclk = clk_get(NULL, "hclk_usb_peri");
if (IS_ERR(busclk)) {
retval = PTR_ERR(busclk);
@@ -1544,7 +1555,7 @@ static int dwc_otg_driver_resume(struct platform_device *_dev )
dwc_write_reg32( &global_regs->gintsts, 0xeFFFFFFF);
dwc_otg_enable_global_interrupts(core_if);
mod_timer(&otg_dev->pcd->check_vbus_timer , jiffies + (HZ<<2));
mod_timer(&otg_dev->pcd->check_vbus_timer , jiffies + HZ);
//sendwakeup:
if(core_if->usb_wakeup)
@@ -1704,6 +1715,11 @@ static __devinit int host11_driver_probe(struct platform_device *pdev)
memset(dwc_otg_device, 0, sizeof(*dwc_otg_device));
dwc_otg_device->reg_offset = 0xFFFFFFFF;
cru_set_soft_reset(SOFT_RST_UHOST, true);
udelay(1);
cru_set_soft_reset(SOFT_RST_UHOST, false);
phyclk = clk_get(NULL, "uhost");
if (IS_ERR(phyclk)) {
retval = PTR_ERR(phyclk);
@@ -1978,6 +1994,16 @@ static __devinit int host20_driver_probe(struct platform_device *pdev)
dwc_otg_device = kmalloc(sizeof(dwc_otg_device_t), GFP_KERNEL);
cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_AHB_BUS, true);
cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_PHY, true);
cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_CONTROLLER, true);
udelay(1);
cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_AHB_BUS, false);
cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_PHY, false);
cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_CONTROLLER, false);
if (dwc_otg_device == 0)
{
dev_err(dev, "kmalloc of dwc_otg_device failed\n");

29
drivers/usb/dwc_otg/dwc_otg_pcd.c
View File

@@ -84,6 +84,7 @@
#include "dwc_otg_regs.h"
#include <linux/usb/composite.h>
#include <mach/cru.h>
/**
* Static PCD pointer for use in usb_gadget_register_driver and
@@ -1550,15 +1551,25 @@ static void dwc_otg_pcd_gadget_release(struct device *_dev)
int dwc_pcd_reset(dwc_otg_pcd_t *pcd)
{
dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
dwc_otg_disable_global_interrupts( core_if );
//
//rockchip_scu_reset_unit(12);
dwc_otg_pcd_reinit( pcd );
dwc_otg_core_dev_init(core_if);
//DWC_PRINT("%s\n" , __func__ );
dwc_otg_enable_global_interrupts( core_if );
return 0;
dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd);
dwc_otg_disable_global_interrupts( core_if );
//
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_AHB_BUS, true);
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_PHY, true);
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_CONTROLLER, true);
udelay(1);
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_AHB_BUS, false);
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_PHY, false);
cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_CONTROLLER, false);
//rockchip_scu_reset_unit(12);
dwc_otg_pcd_reinit( pcd );
dwc_otg_core_dev_init(core_if);
//DWC_PRINT("%s\n" , __func__ );
dwc_otg_enable_global_interrupts( core_if );
return 0;
}
/*