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ge2d: fix strechblit issue for GE2D [1/1]
PD#SWPL-4075 Problem: dst data is not normal by using strechblit function such as 1920x1080 --> 640x360 Solution: add bit width restriction for horizontal scaler initial phase Verify: verified on g12b-w400 Change-Id: Ibcd85cc08f49254e90100beb952e711736531134 Signed-off-by: Jian Cao <jian.cao@amlogic.com> ge2d: add enhanced hsc adv num support [2/2] PD#SWPL-4075 Problem: add enhanced hsc adv num support Solution: add enhanced hsc adv num support Verify: verified on g12b-w400 Change-Id: I13b52a0b10e8f3830c57ff691ef3472a34cbe89c Signed-off-by: Jian Cao <jian.cao@amlogic.com>
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@@ -910,9 +910,7 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
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cfg->hsc_div_length = (124 << 24) / cfg->hsc_phase_step;
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multo = cfg->hsc_phase_step * cfg->hsc_div_length;
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#ifndef CONFIG_GE2D_ADV_NUM
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cfg->hsc_adv_num = multo >> 24;
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#endif
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cfg->hsc_adv_phase = multo & 0xffffff;
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}
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@@ -990,10 +988,12 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
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);
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if (cfg->hsc_adv_num > 255)
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cfg->hsc_adv_num = cfg->hsc_adv_num >> 8;
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else
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cfg->hsc_adv_num = 0;
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ge2d_reg_write(GE2D_HSC_INI_CTRL,
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(cfg->hsc_rpt_p0_num << 29) |
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(cfg->hsc_adv_num << 24) |
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(cfg->hsc_ini_phase << 0)
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((cfg->hsc_ini_phase & 0xffffff) << 0)
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);
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#else
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ge2d_reg_write(GE2D_HSC_ADV_CTRL,
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@@ -1002,7 +1002,7 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
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);
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ge2d_reg_write(GE2D_HSC_INI_CTRL,
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(cfg->hsc_rpt_p0_num << 29) |
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(cfg->hsc_ini_phase << 0)
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((cfg->hsc_ini_phase & 0xffffff) << 0)
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);
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#endif
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@@ -37,7 +37,7 @@ enum ge2d_memtype_s {
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#define MAX_BITBLT_WORK_CONFIG 4
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#define MAX_GE2D_CMD 32 /* 64 */
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/* #define CONFIG_GE2D_ADV_NUM */
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#define CONFIG_GE2D_ADV_NUM
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#define CONFIG_GE2D_SRC2
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#define GE2D_STATE_IDLE 0
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#define GE2D_STATE_RUNNING 1
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