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media: add codec support for tl1 [1/1]
PD#172587 Problem: Bringup codec for TL1. Solution: Add codec iomap device tree node for TL1. Add canvas device tree node for TL1. Verify: Verified on PXP/PTM. Change-Id: I8b9a6645f1f9fd7d4aa9cae6166895e61ddc3e36 Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
This commit is contained in:
committed by
Jianxin Pan
parent
6f1e9e486b
commit
d7e69fb1bf
@@ -884,6 +884,40 @@
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"mailbox_2";
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};
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canvas: canvas{
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compatible = "amlogic, meson, canvas";
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status = "okay";
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reg = <0xff638000 0x2000>;
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};
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codec_io: codec_io {
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compatible = "amlogic, codec_io";
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status = "okay";
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#address-cells=<1>;
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#size-cells=<1>;
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ranges;
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io_cbus_base{
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reg = <0xffd00000 0x100000>;
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};
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io_dos_base{
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reg = <0xff620000 0x10000>;
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};
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io_hiubus_base{
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reg = <0xff63c000 0x2000>;
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};
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io_aobus_base{
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reg = <0xff800000 0x10000>;
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};
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io_vcbus_base{
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reg = <0xff900000 0x40000>;
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};
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io_dmc_base{
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reg = <0xff638000 0x2000>;
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};
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io_efuse_base{
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reg = <0xff630000 0x2000>;
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};
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};
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}; /* end of / */
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&pinctrl_aobus {
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@@ -31,6 +31,7 @@
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MESON_CPU_MAJOR_ID_AXG, \
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MESON_CPU_MAJOR_ID_G12A, \
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MESON_CPU_MAJOR_ID_G12B, \
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MESON_CPU_MAJOR_ID_TL1, \
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0}
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#define REGISTER_FOR_GXCPU {\
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MESON_CPU_MAJOR_ID_GXBB, \
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@@ -42,6 +43,7 @@
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MESON_CPU_MAJOR_ID_AXG, \
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MESON_CPU_MAJOR_ID_G12A, \
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MESON_CPU_MAJOR_ID_G12B, \
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MESON_CPU_MAJOR_ID_TL1, \
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0}
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int codec_apb_read(unsigned int reg)
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{
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