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pwm: revert pwm e and f order

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PD#146170: pwm: revert pwm e and f order

1.please ask me to get a patch when you are using pwm on axg.
2.new pwm driver is rebuilding.
3.add pwm e and f for axg,actually the hardware not support.

Change-Id: I3222380b700fbe9668c3d2da1dc8d878f22b30aa
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
This commit is contained in:
Jian Hu
2017-06-21 20:39:30 +08:00
committed by Victor Wan
parent 0d9a5f4413
commit d8a28fe691
3 changed files with 26 additions and 26 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm64/boot/dts/amlogic/mesonaxg.dtsi
View File

@@ -352,8 +352,9 @@
status = "okay";
#pwm-cells = <2>;
pwm-outputs = <PWM_A>,<PWM_B>,<PWM_C>,<PWM_D>,
<PWM_AO_A>,<PWM_AO_B>,<PWM_AO_C>,<PWM_AO_D>,
<PWM_A2>,<PWM_B2>,<PWM_C2>,<PWM_D2>,<PWM_AO_A2>,
<PWM_E>,<PWM_F>,<PWM_AO_A>,<PWM_AO_B>,
<PWM_AO_C>,<PWM_AO_D>,<PWM_A2>,<PWM_B2>,
<PWM_C2>,<PWM_D2>,<PWM_E2>,<PWM_F2>,<PWM_AO_A2>,
<PWM_AO_B2>,<PWM_AO_C2>,<PWM_AO_D2>;
reg = <0x0 0xffd1b000 0x0 0x20>,
<0x0 0xffd1a000 0x0 0x20>,
@@ -368,7 +369,8 @@
"fclk_div4",
"fclk_div3";
clock-select = <XTAL>,<XTAL>,<XTAL>,<XTAL>,
<XTAL>,<XTAL>,<XTAL>,<XTAL>;
<XTAL>,<XTAL>,<XTAL>,<XTAL>,
<XTAL>,<XTAL>;
/*all channels use the default clock source XTAL_CLK*/
/*and you can shoose it in file dt-bindings/pwm/meson.h*/
};

33
include/dt-bindings/pwm/meson.h
View File

@@ -23,29 +23,28 @@
#define PWM_B 1
#define PWM_C 2
#define PWM_D 3
#define PWM_AO_A 4
#define PWM_AO_B 5
#define PWM_AO_C 6
#define PWM_AO_D 7
#define PWM_E 4
#define PWM_F 5
#define PWM_AO_A 6
#define PWM_AO_B 7
#define PWM_AO_C 8
#define PWM_AO_D 9
/*
* Addtional 8 channels for gxtvbb , gxl ,gxm and txl
*/
#define PWM_A2 8
#define PWM_B2 9
#define PWM_C2 10
#define PWM_D2 11
#define PWM_AO_A2 12
#define PWM_AO_B2 13
#define PWM_AO_C2 14
#define PWM_AO_D2 15
#define PWM_A2 10
#define PWM_B2 11
#define PWM_C2 12
#define PWM_D2 13
#define PWM_E2 14
#define PWM_F2 15
#define PWM_AO_A2 16
#define PWM_AO_B2 17
#define PWM_AO_C2 18
#define PWM_AO_D2 19
/*add another four channels for txlx*/
#define PWM_E 16
#define PWM_F 17
#define PWM_E2 18
#define PWM_F2 19

11
include/linux/amlogic/pwm_meson.h
View File

@@ -40,7 +40,7 @@
#define AML_PWM_GXBB_NUM 8
#define AML_PWM_GXTVBB_NUM 16
#define AML_PWM_TXLX_NUM 20
#define AML_PWM_AXG_NUM 16
#define AML_PWM_AXG_NUM 20
@@ -49,6 +49,8 @@ enum pwm_channel {
PWM_B,
PWM_C,
PWM_D,
PWM_E,
PWM_F,
PWM_AO_A,
PWM_AO_B,
PWM_AO_C,
@@ -58,16 +60,13 @@ enum pwm_channel {
PWM_B2,
PWM_C2,
PWM_D2,
PWM_E2,
PWM_F2,
PWM_AO_A2,
PWM_AO_B2,
PWM_AO_C2,
PWM_AO_D2,
/* add another four channels for txlx*/
PWM_E,
PWM_F,
PWM_E2,
PWM_F2,
};