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lcd: update pll setting for tl1 tcon_pll performance [1/1]

Browse Source 
PD#172587

Problem:
tcon pll performance is not good when frac enabled with old setting

Solution:
update tcon pll setting

Verify:
x301

Change-Id: Ib5deb5c643afa243876c0e4703f835e503fffc2e
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
This commit is contained in:
Evoke Zhang
2018-11-28 09:36:58 +08:00
committed by Bo Yang
parent 763fcde9b1
commit da321c281a
2 changed files with 12 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/boot/dts/amlogic/mesontl1.dtsi
View File

@@ -2087,7 +2087,8 @@
"tcon_4","tcon_5","tcon_6","tcon_7",
"tcon_8","tcon_9","tcon_10","tcon_11",
"tcon_12","tcon_13","tcon_14","tcon_15",
"tcon_lock";
"tcon_lock","tcon_spi_mo","tcon_spi_mi",
"tcon_spi_clk","tcon_spi_ss";
function = "tcon";
};
};
@@ -2097,7 +2098,8 @@
"GPIOH_4","GPIOH_5","GPIOH_6","GPIOH_7",
"GPIOH_8","GPIOH_9","GPIOH_10","GPIOH_11",
"GPIOH_12","GPIOH_13","GPIOH_14","GPIOH_15",
"GPIOH_16";
"GPIOH_16","GPIOH_17","GPIOH_18","GPIOH_19",
"GPIOH_20";
function = "gpio_periphs";
input-enable;
};

9
drivers/amlogic/media/vout/lcd/lcd_clk_config.c
View File

@@ -516,6 +516,8 @@ static void lcd_set_pll_tl1(struct lcd_clk_config_s *cConf)
switch (lcd_drv->lcd_config->lcd_basic.lcd_type) {
case LCD_LVDS:
lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x000704ad);
mdelay(10);
lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x200704ad);
mdelay(10);
lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x300704ad);
@@ -524,7 +526,8 @@ static void lcd_set_pll_tl1(struct lcd_clk_config_s *cConf)
mdelay(10);
lcd_hiu_write(HHI_TCON_PLL_CNTL2, 0x00001108);
mdelay(10);
lcd_hiu_write(HHI_TCON_PLL_CNTL3, 0x10058f30);
//lcd_hiu_write(HHI_TCON_PLL_CNTL3, 0x10058f30);
lcd_hiu_write(HHI_TCON_PLL_CNTL3, 0x10051400);
mdelay(10);
lcd_hiu_write(HHI_TCON_PLL_CNTL4, 0x010100c0);
mdelay(10);
@@ -540,6 +543,8 @@ static void lcd_set_pll_tl1(struct lcd_clk_config_s *cConf)
mdelay(10);
break;
case LCD_VBYONE:
lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x000f04f7);
mdelay(10);
lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x200f04f7);
mdelay(10);
lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x300f04f7);
@@ -562,6 +567,8 @@ static void lcd_set_pll_tl1(struct lcd_clk_config_s *cConf)
mdelay(10);
break;
case LCD_P2P:
lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x000f04e1);
mdelay(10);
lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x200604e1);
mdelay(10);
lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x300604e1);