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drm/bridge: analogix_dp: replace readl()/writel() with analogix_dp_read()/_write() for SSC switch

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The analogix_dp_read()/analogix_dp_write() help workaround async
issue between pclk clock and 24m clock. See the following commit
for details:

commit 33f5d1439f ("drm/bridge: analogix_dp: Workaround async issue between pclk clock and 24m clock")

Change-Id: I41a0767184bfbfc5bcacceb2177189836dcc9e90
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
This commit is contained in:
Damon Ding
2025-05-14 10:45:48 +08:00
committed by Tao Huang
parent 279372aba2
commit da66c6a3ee
1 changed files with 6 additions and 6 deletions
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12
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
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@@ -532,25 +532,25 @@ static void analogix_dp_ssc_enable(struct analogix_dp_device *dp)
u32 reg;
/* 4500ppm */
writel(0x19, dp->reg_base + ANALOIGX_DP_SSC_REG);
analogix_dp_write(dp, ANALOIGX_DP_SSC_REG, 0x19);
/*
* To apply updated SSC parameters into SSC operation,
* firmware must disable and enable this bit.
*/
reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
reg = analogix_dp_read(dp, ANALOGIX_DP_FUNC_EN_2);
reg |= SSC_FUNC_EN_N;
writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_2, reg);
reg &= ~SSC_FUNC_EN_N;
writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_2, reg);
}
static void analogix_dp_ssc_disable(struct analogix_dp_device *dp)
{
u32 reg;
reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
reg = analogix_dp_read(dp, ANALOGIX_DP_FUNC_EN_2);
reg |= SSC_FUNC_EN_N;
writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_2, reg);
}
bool analogix_dp_ssc_supported(struct analogix_dp_device *dp)