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arm64: dts: rockchip: fix pinmux of UART0 for PX30 Ringneck on Haikou

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commit 2db7d29c7b1629ced3cbab3de242511eb3c22066 upstream.

UART0 pinmux by default configures GPIO0_B5 in its UART RTS function for
UART0. However, by default on Haikou, it is used as GPIO as UART RTS for
UART5.

Therefore, let's update UART0 pinmux to not configure the pin in that
mode, a later commit will make UART5 request the GPIO pinmux.

Fixes: c484cf93f6 ("arm64: dts: rockchip: add PX30-µQ7 (Ringneck) SoM with Haikou baseboard")
Cc: stable@vger.kernel.org
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250225-ringneck-dtbos-v3-1-853a9a6dd597@cherry.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Quentin Schulz
2025-02-25 12:53:29 +01:00
committed by Greg Kroah-Hartman
parent 3db71cf022
commit db59b24b38
1 changed files with 2 additions and 0 deletions
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2
arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
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@@ -221,6 +221,8 @@
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer>;
status = "okay";
};