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rk3288: fix lvds/edp clk

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This commit is contained in:
yxj
2014-03-18 16:59:18 +08:00
parent d3d8e86069
commit db60ea3fa9
4 changed files with 47 additions and 12 deletions
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14
arch/arm/boot/dts/rk3288.dtsi
View File

@@ -398,14 +398,18 @@
};
lvds: lvds@ff96c000 {
compatible = "rockchip, rk32-lvds";
reg = <0xff960000 0x20000>;
compatible = "rockchip, rk32-lvds";
reg = <0xff960000 0x20000>;
clocks = <&clk_gates16 7>;
clock-names = "pclk_lvds";
};
edp: edp@ff970000 {
compatible = "rockchip,rk32-edp";
reg = <0xff970000 0x4000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
compatible = "rockchip,rk32-edp";
reg = <0xff970000 0x4000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_edp>, <&clk_edp_24m>, <&clk_gates16 8>;
clock-names = "clk_edp", "clk_edp_24m", "pclk_edp";
};
hdmi: hdmi@ff980000 {

1
arch/arm/configs/rockchip_defconfig
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@@ -326,6 +326,7 @@ CONFIG_FB_ROCKCHIP=y
CONFIG_LCDC_RK3188=y
CONFIG_LCDC_RK3288=y
CONFIG_RK_TRSM=y
CONFIG_RK32_LVDS=y
CONFIG_DP_ANX6345=y
CONFIG_RK32_DP=y
CONFIG_RK_HDMI=y

33
drivers/video/rockchip/transmitter/rk32_dp.c
View File

@@ -38,13 +38,13 @@ static int rk32_edp_init_edp(struct rk32_edp *edp)
{
struct rk_screen *screen = &edp->screen;
u32 val = 0;
#ifndef CONFIG_RK_FPGA
if (screen->lcdc_id == 0) /*select lcdc*/
if (screen->lcdc_id == 1) /*select lcdc*/
val = EDP_SEL_VOP_LIT | (EDP_SEL_VOP_LIT << 16);
else
val = EDP_SEL_VOP_LIT << 16;
writel_relaxed(val, RK_GRF_VIRT + RK3288_GRF_SOC_CON6);
#endif
rk32_edp_reset(edp);
rk32_edp_init_refclk(edp);
rk32_edp_init_interrupt(edp);
@@ -1071,8 +1071,9 @@ static int rk32_edp_enable(void)
goto out;
edp->enabled = 1;
clk_prepare_enable(edp->clk_edp);
clk_prepare_enable(edp->clk_24m);
clk_enable(edp->pclk);
clk_enable(edp->clk_edp);
clk_enable(edp->clk_24m);
edp_phy_init:
@@ -1148,6 +1149,8 @@ static int rk32_edp_disable(void )
clk_disable(edp->clk_24m);
clk_disable(edp->clk_edp);
clk_disable(edp->pclk);
return 0;
}
@@ -1199,6 +1202,23 @@ static int rk32_edp_probe(struct platform_device *pdev)
return PTR_ERR(edp->regs);
}
edp->clk_edp = devm_clk_get(&pdev->dev,"clk_edp");
if (IS_ERR(edp->clk_edp)) {
dev_err(&pdev->dev, "cannot get clk_edp\n");
return PTR_ERR(edp->clk_edp);
}
edp->clk_24m = devm_clk_get(&pdev->dev,"clk_edp_24m");
if (IS_ERR(edp->clk_24m)) {
dev_err(&pdev->dev, "cannot get clk_edp_24m\n");
return PTR_ERR(edp->clk_24m);
}
edp->pclk = devm_clk_get(&pdev->dev,"pclk_edp");
if (IS_ERR(edp->pclk)) {
dev_err(&pdev->dev, "cannot get pclk\n");
return PTR_ERR(edp->pclk);
}
edp->irq = platform_get_irq(pdev, 0);
if (edp->irq < 0) {
@@ -1212,6 +1232,9 @@ static int rk32_edp_probe(struct platform_device *pdev)
return ret;
}
rk32_edp = edp;
clk_prepare(edp->pclk);
clk_prepare(edp->clk_edp);
clk_prepare(edp->clk_24m);
rk_fb_trsm_ops_register(&trsm_edp_ops, SCREEN_EDP);
dev_info(&pdev->dev, "rk32 edp driver probe success\n");

11
drivers/video/rockchip/transmitter/rk32_lvds.c
View File

@@ -22,6 +22,7 @@ static int rk32_lvds_disable(void)
writel_relaxed(0x80008000, RK_GRF_VIRT + RK3288_GRF_SOC_CON7);
writel_relaxed(0x00, lvds->regs + LVDS_CFG_REG_21); /*disable tx*/
writel_relaxed(0xff, lvds->regs + LVDS_CFG_REG_c); /*disable pll*/
clk_disable_unprepare(lvds->clk);
return 0;
}
@@ -32,7 +33,9 @@ static int rk32_lvds_en(void)
u32 h_bp = screen->mode.hsync_len + screen->mode.left_margin;
u32 val ;
if (screen->lcdc_id == 0)
clk_prepare_enable(lvds->clk);
if (screen->lcdc_id == 1) /*lcdc1 = vop little,lcdc0 = vop big*/
val = LVDS_SEL_VOP_LIT | (LVDS_SEL_VOP_LIT << 16);
else
val = LVDS_SEL_VOP_LIT << 16;
@@ -118,7 +121,11 @@ static int rk32_lvds_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "ioremap reg failed\n");
return PTR_ERR(lvds->regs);
}
lvds->clk = devm_clk_get(&pdev->dev,NULL);
if (IS_ERR(lvds->clk)) {
dev_err(&pdev->dev, "get clk failed\n");
return PTR_ERR(lvds->clk);
}
rk32_lvds = lvds;
rk_fb_trsm_ops_register(&trsm_lvds_ops,SCREEN_LVDS);
dev_info(&pdev->dev, "rk32 lvds driver probe success\n");