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ODROID-COMMON: drm/tiny: add support for Waveshare 1.47" / 1.69" LCD module
Signed-off-by: Dongjin Kim <tobetter@gmail.com> Change-Id: Id7cf8db6061d753e99daca805f3a9ad930c02537
This commit is contained in:
committed by
codewalkerster
parent
37b62dcb7a
commit
dcc9c0632f
@@ -47,6 +47,7 @@ struct st7789v_cfg {
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unsigned int top_offset;
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unsigned int write_only:1;
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unsigned int rgb:1; /* RGB (vs. BGR) */
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void (*init_sequence)(struct mipi_dbi *dbi);
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};
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struct st7789v_priv {
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@@ -54,6 +55,73 @@ struct st7789v_priv {
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const struct st7789v_cfg *cfg;
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};
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static void ws_2inch_init_sequence(struct mipi_dbi *dbi)
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{
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mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT,
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MIPI_DCS_PIXEL_FMT_16BIT);
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mipi_dbi_command(dbi, MIPI_DCS_ENTER_INVERT_MODE);
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mipi_dbi_command(dbi, ST7789V_PORCTRL, 0x0c, 0x0c, 0x00, 0x33, 0x33);
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mipi_dbi_command(dbi, ST7789V_GCTRL, 0x35);
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mipi_dbi_command(dbi, ST7789V_VCOMS, 0x1f);
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mipi_dbi_command(dbi, ST7789V_LCMCTRL, 0x2c);
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mipi_dbi_command(dbi, ST7789V_VDVVRHEN, 0x01);
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mipi_dbi_command(dbi, ST7789V_VRHS, 0x12);
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mipi_dbi_command(dbi, ST7789V_VDVS, 0x20);
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mipi_dbi_command(dbi, ST7789V_FRCTRL2, 0x0f);
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mipi_dbi_command(dbi, ST7789V_PWCTRL1, 0xa4, 0xa1);
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mipi_dbi_command(dbi, ST7789V_PVGAMCTRL, 0xd0, 0x08, 0x11, 0x08, 0x0c,
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0x15, 0x39, 0x33, 0x50, 0x36, 0x13, 0x14, 0x29, 0x2d);
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mipi_dbi_command(dbi, ST7789V_NVGAMCTRL, 0xd0, 0x08, 0x10, 0x08, 0x06,
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0x06, 0x39, 0x44, 0x51, 0x0b, 0x16, 0x14, 0x2f, 0x31);
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}
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static void ws_1inch47_init_sequence(struct mipi_dbi *dbi)
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{
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mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT,
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MIPI_DCS_PIXEL_FMT_16BIT);
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mipi_dbi_command(dbi, MIPI_DCS_ENTER_INVERT_MODE);
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mipi_dbi_command(dbi, ST7789V_PORCTRL, 0x0c, 0x0c, 0x00, 0x33, 0x33);
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mipi_dbi_command(dbi, ST7789V_GCTRL, 0x35);
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mipi_dbi_command(dbi, ST7789V_VCOMS, 0x35);
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mipi_dbi_command(dbi, ST7789V_LCMCTRL, 0x2c);
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mipi_dbi_command(dbi, ST7789V_VDVVRHEN, 0x01);
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mipi_dbi_command(dbi, ST7789V_VRHS, 0x13);
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mipi_dbi_command(dbi, ST7789V_VDVS, 0x20);
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mipi_dbi_command(dbi, ST7789V_FRCTRL2, 0x0f);
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mipi_dbi_command(dbi, ST7789V_PWCTRL1, 0xa4, 0xa1);
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mipi_dbi_command(dbi, 0xd6, 0xa1);
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mipi_dbi_command(dbi, ST7789V_PVGAMCTRL,
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0xf0, 0xf0, 0x00, 0x04, 0x04, 0x05, 0x29,
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0x33, 0x3e, 0x38, 0x12, 0x12, 0x27, 0x30);
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mipi_dbi_command(dbi, ST7789V_NVGAMCTRL,
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0xf0, 0x07, 0x0a, 0x0d, 0x0b, 0x07, 0x28,
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0x33, 0x3e, 0x36, 0x14, 0x14, 0x29, 0x32);
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}
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static void ws_1inch69_init_sequence(struct mipi_dbi *dbi)
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{
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mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT,
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MIPI_DCS_PIXEL_FMT_16BIT);
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mipi_dbi_command(dbi, MIPI_DCS_ENTER_INVERT_MODE);
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mipi_dbi_command(dbi, ST7789V_PORCTRL, 0x0b, 0x0b, 0x00, 0x33, 0x35);
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mipi_dbi_command(dbi, ST7789V_GCTRL, 0x11);
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mipi_dbi_command(dbi, ST7789V_VCOMS, 0x35);
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mipi_dbi_command(dbi, ST7789V_LCMCTRL, 0x2c);
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mipi_dbi_command(dbi, ST7789V_VDVVRHEN, 0x01);
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mipi_dbi_command(dbi, ST7789V_VRHS, 0x0d);
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mipi_dbi_command(dbi, ST7789V_VDVS, 0x20);
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mipi_dbi_command(dbi, ST7789V_FRCTRL2, 0x13);
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mipi_dbi_command(dbi, ST7789V_PWCTRL1, 0xa4, 0xa1);
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mipi_dbi_command(dbi, 0xd6, 0xa1);
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mipi_dbi_command(dbi, ST7789V_PVGAMCTRL,
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0xf0, 0x06, 0x0b, 0x0a, 0x09, 0x26, 0x29,
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0x33, 0x41, 0x18, 0x16, 0x15, 0x29, 0x2d);
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mipi_dbi_command(dbi, ST7789V_NVGAMCTRL,
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0xf0, 0x04, 0x08, 0x08, 0x07, 0x03, 0x28,
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0x32, 0x40, 0x3b, 0x19, 0x18, 0x2a, 0x2e);
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mipi_dbi_command(dbi, 0xe4, 0x25, 0x00, 0x00);
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}
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static void st7789v_pipe_enable(struct drm_simple_display_pipe *pipe,
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struct drm_crtc_state *crtc_state,
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struct drm_plane_state *plane_state)
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@@ -98,22 +166,11 @@ static void st7789v_pipe_enable(struct drm_simple_display_pipe *pipe,
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addr_mode |= ST7789V_RGB;
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mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
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mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT,
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MIPI_DCS_PIXEL_FMT_16BIT);
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mipi_dbi_command(dbi, MIPI_DCS_ENTER_INVERT_MODE);
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mipi_dbi_command(dbi, ST7789V_PORCTRL, 0x0c, 0x0c, 0x00, 0x33, 0x33);
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mipi_dbi_command(dbi, ST7789V_GCTRL, 0x35);
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mipi_dbi_command(dbi, ST7789V_VCOMS, 0x1f);
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mipi_dbi_command(dbi, ST7789V_LCMCTRL, 0x2c);
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mipi_dbi_command(dbi, ST7789V_VDVVRHEN, 0x01);
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mipi_dbi_command(dbi, ST7789V_VRHS, 0x12);
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mipi_dbi_command(dbi, ST7789V_VDVS, 0x20);
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mipi_dbi_command(dbi, ST7789V_FRCTRL2, 0x0f);
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mipi_dbi_command(dbi, ST7789V_PWCTRL1, 0xa4, 0xa1);
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mipi_dbi_command(dbi, ST7789V_PVGAMCTRL, 0xd0, 0x08, 0x11, 0x08, 0x0c,
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0x15, 0x39, 0x33, 0x50, 0x36, 0x13, 0x14, 0x29, 0x2d);
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mipi_dbi_command(dbi, ST7789V_NVGAMCTRL, 0xd0, 0x08, 0x10, 0x08, 0x06,
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0x06, 0x39, 0x44, 0x51, 0x0b, 0x16, 0x14, 0x2f, 0x31);
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if (priv->cfg->init_sequence)
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priv->cfg->init_sequence(dbi);
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mipi_dbi_command(dbi, MIPI_DCS_ENTER_NORMAL_MODE);
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mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
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msleep(100);
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mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
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@@ -134,8 +191,26 @@ static const struct st7789v_cfg ws_2inch_lcd_cfg = {
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/* Cannot read from Waveshare 2inch lcd module" display via SPI */
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.write_only = true,
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.rgb = false,
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.init_sequence = ws_2inch_init_sequence,
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};
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static const struct st7789v_cfg ws_1inch47_lcd_cfg = {
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.mode = { DRM_SIMPLE_MODE(172, 320, 28, 33) },
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.left_offset = 34,
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/* Cannot read from Waveshare 1.47inch lcd module" display via SPI */
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.write_only = true,
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.rgb = false,
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.init_sequence = ws_1inch47_init_sequence,
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};
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static const struct st7789v_cfg ws_1inch69_lcd_cfg = {
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.mode = { DRM_SIMPLE_MODE(240, 280, 28, 33) },
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.top_offset = 20,
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/* Cannot read from Waveshare 1.69inch lcd module" display via SPI */
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.write_only = true,
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.rgb = false,
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.init_sequence = ws_1inch69_init_sequence,
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};
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DEFINE_DRM_GEM_CMA_FOPS(st7789v_fops);
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@@ -153,12 +228,16 @@ static struct drm_driver st7789v_driver = {
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static const struct of_device_id st7789v_of_match[] = {
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{ .compatible = "waveshare,ws2inch", .data = &ws_2inch_lcd_cfg },
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{ .compatible = "waveshare,ws1inch47", .data = &ws_1inch47_lcd_cfg },
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{ .compatible = "waveshare,ws1inch69", .data = &ws_1inch69_lcd_cfg },
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{ },
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};
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MODULE_DEVICE_TABLE(of, st7789v_of_match);
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static const struct spi_device_id st7789v_id[] = {
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{ "ws2inch", (uintptr_t)&ws_2inch_lcd_cfg },
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{ "ws1inch47", (uintptr_t)&ws_1inch47_lcd_cfg },
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{ "ws1inch69", (uintptr_t)&ws_1inch69_lcd_cfg },
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{ },
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};
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MODULE_DEVICE_TABLE(spi, st7789v_id);
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