ARM: dts: rockchip: Fix UART pull-ups on rk3066a

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: I7466ab47baa86c81bf1f2fe47556aa03fbe67671
This commit is contained in:
Steven Liu
2021-01-12 15:10:18 +08:00
committed by Tao Huang
parent eb04688f6f
commit dd2f0befb2

View File

@@ -465,6 +465,10 @@
bias-pull-pin-default;
};
pcfg_pull_up: pcfg-pull-up {
bias-pull-up;
};
pcfg_pull_none: pcfg_pull_none {
bias-disable;
};
@@ -605,8 +609,8 @@
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_up>;
};
uart0_cts: uart0-cts {
@@ -620,8 +624,8 @@
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_up>;
};
uart1_cts: uart1-cts {
@@ -635,16 +639,16 @@
uart2 {
uart2_xfer: uart2-xfer {
rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_up>;
};
/* no rts / cts for uart2 */
};
uart3 {
uart3_xfer: uart3-xfer {
rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_up>;
};
uart3_cts: uart3-cts {