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lcd: correct CONFIG_AMLOGIC_UNIFYKEY for lcd unifykey usage [5/5]

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PD#163711: lcd: correct CONFIG_AMLOGIC_UNIFYKEY for lcd unifykey usage

Change-Id: I235bada07a7082e5315fb4e48c30a34c11145f40
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
This commit is contained in:
Evoke Zhang
2018-04-26 09:27:16 +08:00
committed by Yixun Lan
parent 7771f2cbe3
commit de3cb02ece
13 changed files with 215 additions and 483 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
MAINTAINERS
View File

@@ -14422,3 +14422,8 @@ F: include/linux/amlogic/aml_atvdemod.h
AMLOGIC G12A X2 U211 buildroot dts
M: wenbiao zhang <wenbiao.zhang@amlogic.com>
F: arch/arm64/boot/dts/amlogic/g12a_s905y2_u221_buildroot.dts
AMLOGIC LCD ADD TVCONFIG SUPPORT
M: Evoke Zhang <evoke.zhang@amlogic.com>
F: drivers/amlogic/media/vout/lcd/lcd_tv/lcd_tv.dts
F: drivers/amlogic/media/vout/lcd/lcd_tablet/aml_lcd.dts

22
drivers/amlogic/media/vout/backlight/aml_bl.c
View File

@@ -502,11 +502,15 @@ static void bl_set_pwm(struct bl_pwm_config_s *bl_pwm)
case BL_PWM_F:
pwm_period = 1000000000 / bl_pwm->pwm_freq;
pwm_duty = (pwm_period * bl_pwm->pwm_duty) / 100;
if (bl_debug_print_flag) {
pr_info("pwm=0x%p, port_index=%d, meson_index=%d\n",
bl_pwm->pwm_data.pwm, bl_pwm->pwm_data.port_index,
bl_pwm->pwm_data.meson_index);
}
if ((!IS_ERR_OR_NULL(bl_pwm->pwm_data.pwm)) &&
((bl_pwm->pwm_data.port_index % 2) ==
bl_pwm->pwm_data.meson_index) &&
(bl_pwm->pwm_data.port_index ==
bl_pwm->pwm_port)) {
(bl_pwm->pwm_data.port_index == bl_pwm->pwm_port)) {
bl_pwm->pwm_data.state.polarity = pol;
bl_pwm->pwm_data.state.duty_cycle = pwm_duty;
bl_pwm->pwm_data.state.period = pwm_period;
@@ -1862,7 +1866,7 @@ static int aml_bl_config_load_from_unifykey(struct bl_config_s *bconf)
return 0;
}
static int pwm_channel_conf(struct bl_config_s *bconf,
static int aml_bl_pwm_channel_register(struct bl_config_s *bconf,
struct platform_device *pdev)
{
int ret = 0;
@@ -1896,11 +1900,12 @@ static int pwm_channel_conf(struct bl_config_s *bconf,
if (ret) {
BLERR("invalid %d meson_pwm_index\n", index1);
return ret;
}
}
if (index0 >= BL_PWM_VS)
continue;
bl_pwm = NULL;
switch (bconf->method) {
case BL_CTRL_PWM:
if ((index0 == bconf->bl_pwm->pwm_port) &&
@@ -1917,9 +1922,10 @@ static int pwm_channel_conf(struct bl_config_s *bconf,
break;
default:
break;
}
}
if (bl_pwm == NULL)
continue;
bl_pwm->pwm_data.port_index = index0;
bl_pwm->pwm_data.meson_index = index1;
bl_pwm->pwm_data.pwm = devm_of_pwm_get(
@@ -1932,9 +1938,11 @@ static int pwm_channel_conf(struct bl_config_s *bconf,
bl_pwm->pwm_data.meson = to_meson_pwm(
bl_pwm->pwm_data.pwm->chip);
pwm_init_state(bl_pwm->pwm_data.pwm, &(bl_pwm->pwm_data.state));
BLPR("register pwm_ch(%d) 0x%p\n",
bl_pwm->pwm_data.port_index, bl_pwm->pwm_data.pwm);
}
BLPR(" bl pwm config ok\n");
BLPR("%s ok\n", __func__);
return ret;
@@ -1991,7 +1999,7 @@ static int aml_bl_config_load(struct bl_config_s *bconf,
switch (bconf->method) {
case BL_CTRL_PWM:
case BL_CTRL_PWM_COMBO:
ret = pwm_channel_conf(bconf, pdev);
ret = aml_bl_pwm_channel_register(bconf, pdev);
bl_pwm_pinmux_set(bconf);
break;
#ifdef CONFIG_AMLOGIC_BL_EXTERN

5
drivers/amlogic/media/vout/lcd/lcd_common.h
View File

@@ -26,7 +26,8 @@
/* 20170905: fix coverity errors */
/* 20180122: support txlx, optimize lcd noitfier event */
/* 20180226: g12a support */
#define LCD_DRV_VERSION "20180321"
/* 20180425: tvconfig suuport */
#define LCD_DRV_VERSION "20180425"
#define VPP_OUT_SATURATE (1 << 0)
@@ -100,6 +101,7 @@ extern int lcd_class_remove(void);
extern void lcd_tv_vout_server_init(void);
extern void lcd_tv_vout_server_remove(void);
extern void lcd_vbyone_interrupt_enable(int flag);
extern void lcd_tv_clk_config_change(struct lcd_config_s *pconf);
extern void lcd_tv_clk_update(struct lcd_config_s *pconf);
extern int lcd_tv_probe(struct device *dev);
extern int lcd_tv_remove(struct device *dev);
@@ -107,6 +109,7 @@ extern int lcd_tv_remove(struct device *dev);
#ifdef CONFIG_AMLOGIC_LCD_TABLET
extern void lcd_tablet_vout_server_init(void);
extern void lcd_tablet_vout_server_remove(void);
extern void lcd_tablet_clk_config_change(struct lcd_config_s *pconf);
extern void lcd_tablet_clk_update(struct lcd_config_s *pconf);
extern int lcd_tablet_probe(struct device *dev);
extern int lcd_tablet_remove(struct device *dev);

4
drivers/amlogic/media/vout/lcd/lcd_debug.c
View File

@@ -1407,12 +1407,12 @@ static void lcd_debug_change_clk_change(unsigned int pclk)
pconf->lcd_timing.sync_duration_den = 100;
switch (lcd_drv->lcd_mode) {
#ifdef CONFIG_AML_LCD_TV
#ifdef CONFIG_AMLOGIC_LCD_TV
case LCD_MODE_TV:
lcd_tv_clk_config_change(pconf);
break;
#endif
#ifdef CONFIG_AML_LCD_TABLET
#ifdef CONFIG_AMLOGIC_LCD_TABLET
case LCD_MODE_TABLET:
lcd_tablet_clk_config_change(pconf);
break;

182
drivers/amlogic/media/vout/lcd/lcd_tablet/aml_lcd.dts
View File

@@ -1,182 +0,0 @@
/*
* drivers/amlogic/media/vout/lcd/lcd_tablet/aml_lcd.dts
*
* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
lcd{
compatible = "amlogic, lcd";
dev_name = "lcd";
mode = "tablet";
status = "okay";
resets = <&clock GCLK_IDX_VCLK2_ENCL &clock GCLK_IDX_VCLK2_VENCL>;
reset-names = "encl","vencl";
pinctrl-names = "ttl_6bit_hvsync_de_on","ttl_6bit_hvsync_on",
"ttl_6bit_de_on","ttl_8bit_hvsync_de_on",
"ttl_8bit_hvsync_on","ttl_8bit_de_on",
"ttl_6bit_hvsync_de_off","ttl_8bit_hvsync_de_off";
pinctrl-0 = <&lcd_ttl_rgb_6bit_pins_on &lcd_ttl_de_hvsync_on_pins>;
pinctrl-1 = <&lcd_ttl_rgb_6bit_pins_on &lcd_ttl_hvsync_on_pins>;
pinctrl-2 = <&lcd_ttl_rgb_6bit_pins_on &lcd_ttl_de_on_pins>;
pinctrl-3 = <&lcd_ttl_rgb_8bit_pins_on &lcd_ttl_de_hvsync_on_pins>;
pinctrl-4 = <&lcd_ttl_rgb_8bit_pins_on &lcd_ttl_hvsync_on_pins>;
pinctrl-5 = <&lcd_ttl_rgb_8bit_pins_on &lcd_ttl_de_on_pins>;
pinctrl-6 = <&lcd_ttl_rgb_6bit_pins_off &lcd_ttl_de_hvsync_off_pins>;
pinctrl-7 = <&lcd_ttl_rgb_8bit_pins_off &lcd_ttl_de_hvsync_off_pins>;
/* power type:(0=cpu_gpio, 1=pmu_gpio,
* 2=signal, 3=extern, 0xff=ending)
*/
/* power index:(point gpios_index, or extern_index, 0xff=invalid) */
/* power value:(0=output low, 1=output high, 2=input) */
/* power delay:(unit in ms) */
lcd_cpu-gpios = <&gpio GPIOX_3 GPIO_ACTIVE_HIGH>;
lcd_cpu_gpio_names = "GPIOX_3";
lcd_0{
model_name = "LCD720P";
interface = "ttl"; /* lcd_interface(ttl, lvds, mipi, edp) */
basic_setting = <1280 720 1650 750 8 16 9>;
/* h_active, v_active, h_period, v_period, lcd_bits,
* screen_widht, screen_height
*/
lcd_timing = <40 220 1 5 20 1>;
/* hs_width, hs_bp, hs_pol, vs_width, vs_bp, vs_pol */
clk_attr = <0 0 1 74250000>;
/* fr_adj_type(0=clock, 1=htotal, 2=vtotal),
* clk_ss_level, clk_auto_generate,
* pixel_clk(unit in Hz)
*/
ttl_attr = <0 1 1 0 0>;
/* clk_pol, de_valid, hvsync_valid,
* rb_swap, bit_swap
*/
power_on_step = <0 0 1 50
2 0 0 0
0xff 0 0 0>; /* type, index, value, delay */
power_off_step = <2 0 0 50
0 0 0 100
0xff 0 0 0>; /* type, index, value, delay */
backlight_index = <0>;
};
lcd_1{
model_name = "HJ080IA";
interface = "lvds"; /* lcd_interface(ttl, lvds, mipi, edp) */
basic_setting = <1024 768 1344 806 8 162 122>;
/* h_active, v_active, h_period, v_period, lcd_bits,
* screen_widht, screen_height
*/
lcd_timing = <10 60 0 2 18 0>;
/* hs_width, hs_bp, hs_pol, vs_width, vs_bp, vs_pol */
clk_attr = <0 0 1 65000000>;
/* fr_adj_type(0=clock, 1=htotal, 2=vtotal),
* clk_ss_level, clk_auto_generate,
* pixel_clk(unit in Hz)
*/
lvds_attr = <1 0 0 0>;
/* lvds_repack, dual_port, pn_swap, port_swap */
power_on_step = <0 0 1 50
2 0 0 0
0xff 0 0 0>; /* type, index, value, delay */
power_off_step = <2 0 0 50
0 0 0 100
0xff 0 0 0>; /* type, index, value, delay */
backlight_index = <0>;
};
/* operation_mode:(bit[0] for init, bit[1] for display.
*0=video mode, 1=command mode)
*/
/* lp_clk_continuous:(0=disable, 1=enable) */
/* transfer_switch:(0=auto, 1=standard, 2=slow) */
/* clk_factor:(special adjust between pixel_clk
* & lanebyte_clk, default 0)
*/
/* mipi-dsi command:(data_type, num, data....).
* data_type=0xff, num=0xff means ending
* num<0xff means delay num(unit: ms)
*/
lcd_2{
model_name = "B080XAN01";
interface = "mipi"; /* lcd_interface(ttl, lvds, mipi, edp) */
basic_setting = <768 1024 948 1140 8 119 159>;
/* h_active, v_active, h_period, v_period, lcd_bits,
* screen_widht, screen_height
*/
lcd_timing = <64 56 0 50 30 0>;
/* hs_width, hs_bp, hs_pol, vs_width, vs_bp, vs_pol */
clk_attr = <0 0 1 64843200>;
/* fr_adj_type(0=clock, 1=htotal, 2=vtotal),
* clk_ss_level, clk_auto_generate,
* pixel_clk(unit in Hz)
*/
mipi_attr = <4 0x1 1 0 1 1 550>;
/* lane_count, operation_mode, lp_clk_continuous,
* transfer_switch, factor_denominator,
* factor_numerator, dsi_bit_rate_max (MHz)
*/
dsi_cmd_init_on = <0x05 1 0x11 /* sleep out */
0xff 20 /* delay 20ms */
0x05 1 0x29 /* display on */
0xff 20 /* delay 20ms */
0xff 0xff>; /* ending flag */
dsi_cmd_init_off = <0x05 1 0x28 /* display off */
0xff 10 /* delay 10ms */
0x05 1 0x10 /* sleep in */
0xff 10 /* delay 10ms */
0xff 0xff>; /* ending flag */
power_on_step = <0 0 1 50
2 0 0 0
0xff 0 0 0>; /* type, index, value, delay */
power_off_step = <2 0 0 50
0 0 0 100
0xff 0 0 0>; /* type, index, value, delay */
backlight_index = <0>;
};
/* link_rate:(0=1.62G, 1=2.7G, 0xff=auto setting) */
/* lane_count:(support 1,2,4, 0xff=auto setting) */
/* link_vswing:(support level 0,1,2,3, 0xff=adaptive) */
/* sync_clk_mode:(0=asyncronous clock,
* 1=synchronous clock. default 1)
*/
/* edid_timing_used:(0=no use, 1=use) */
lcd_3{
model_name = "LP097QX1";
interface = "edp"; /* lcd_interface(ttl, lvds, mipi, edp) */
basic_setting = <2048 1536 2219 1560 8 197 147>;
/* h_active, v_active, h_period, v_period, lcd_bits,
* screen_widht, screen_height
*/
lcd_timing = <5 115 0 1 21 0>;
/* hs_width, hs_bp, hs_pol, vs_width, vs_bp, vs_pol */
clk_attr = <0 0 1 207700000>;
/* fr_adj_type(0=clock, 1=htotal, 2=vtotal),
* clk_ss_level, clk_auto_generate,
* pixel_clk(unit in Hz)
*/
edp_attr = <4 1 2 0 1 0>;
/* max_lane_count, link_rate, lane_count, link_vswing,
* sync_clk_mode, edid_timing_used
*/
power_on_step = <0 0 1 50
2 0 0 0
0xff 0 0 0>; /* type, index, value, delay */
power_off_step = <2 0 0 50
0 0 0 100
0xff 0 0 0>; /* type, index, value, delay */
backlight_index = <0>;
};
};

120
drivers/amlogic/media/vout/lcd/lcd_tablet/lcd_drv.c
View File

@@ -78,31 +78,33 @@ static void lcd_lvds_phy_set(struct lcd_config_s *pconf, int status)
__func__, vswing);
vswing = LVDS_PHY_VSWING_DFT;
}
channel_on = lcd_lvds_channel_on_value(pconf);
if (preem > 7) {
LCDERR("%s: wrong preem_level=0x%x, use default\n",
LCDERR("%s: wrong preem=%d, use default\n",
__func__, preem);
preem = LVDS_PHY_PREEM_DFT;
}
if (clk_vswing > 7) {
LCDERR("%s: wrong clk_vswing_level=0x%x, use default\n",
if (clk_vswing > 3) {
LCDERR("%s: wrong clk_vswing=%d, use default\n",
__func__, clk_vswing);
clk_vswing = LVDS_PHY_CLK_VSWING_DFT;
}
if (clk_preem > 7) {
LCDERR("%s: wrong clk_preem_level=0x%x, use default\n",
LCDERR("%s: wrong clk_preem=%d, use default\n",
__func__, clk_preem);
clk_preem = LVDS_PHY_CLK_PREEM_DFT;
}
channel_on = lcd_lvds_channel_on_value(pconf);
data32 = 0x606cca80 | (vswing << 26) | (preem << 0);
data32 = LVDS_PHY_CNTL1_G9TV |
(vswing << 26) | (preem << 0);
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32);
/*lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0x6c6cca80);*/
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, 0x0000006c);
data32 = (channel_on << 16) | 0x0800 | /* DIF_TX_CTL5 */
(clk_vswing << 8) | (clk_preem << 5); /* DIF_TX_CTL4 */
data32 = LVDS_PHY_CNTL2_G9TV;
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32);
data32 = LVDS_PHY_CNTL3_G9TV |
(channel_on << 16) |
(clk_vswing << 8) | (clk_preem << 5);
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32);
/*lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, 0x0fff0800);*/
} else {
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0x0);
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, 0x0);
@@ -234,7 +236,7 @@ static void lcd_mipi_phy_set(struct lcd_config_s *pconf, int status)
}
}
static void lcd_tcon_set(struct lcd_config_s *pconf)
static void lcd_encl_tcon_set(struct lcd_config_s *pconf)
{
struct lcd_timing_s *tcon_adr = &pconf->lcd_timing;
@@ -334,6 +336,44 @@ static void lcd_tcon_set(struct lcd_config_s *pconf)
lcd_vcbus_read(VPP_MISC) & ~(VPP_OUT_SATURATE));
}
static void lcd_venc_set(struct lcd_config_s *pconf)
{
unsigned int h_active, v_active;
unsigned int video_on_pixel, video_on_line;
if (lcd_debug_print_flag)
LCDPR("%s\n", __func__);
h_active = pconf->lcd_basic.h_active;
v_active = pconf->lcd_basic.v_active;
video_on_pixel = pconf->lcd_timing.video_on_pixel;
video_on_line = pconf->lcd_timing.video_on_line;
lcd_vcbus_write(ENCL_VIDEO_EN, 0);
lcd_vcbus_write(ENCL_VIDEO_MODE, 0x8000);/*bit[15] shadown en*/
lcd_vcbus_write(ENCL_VIDEO_MODE_ADV, 0x0418); /* Sampling rate: 1 */
lcd_vcbus_write(ENCL_VIDEO_FILT_CTRL, 0x1000); /* bypass filter */
lcd_vcbus_write(ENCL_VIDEO_MAX_PXCNT, pconf->lcd_basic.h_period - 1);
lcd_vcbus_write(ENCL_VIDEO_MAX_LNCNT, pconf->lcd_basic.v_period - 1);
lcd_vcbus_write(ENCL_VIDEO_HAVON_BEGIN, video_on_pixel);
lcd_vcbus_write(ENCL_VIDEO_HAVON_END, h_active - 1 + video_on_pixel);
lcd_vcbus_write(ENCL_VIDEO_VAVON_BLINE, video_on_line);
lcd_vcbus_write(ENCL_VIDEO_VAVON_ELINE, v_active - 1 + video_on_line);
lcd_vcbus_write(ENCL_VIDEO_HSO_BEGIN, pconf->lcd_timing.hs_hs_addr);
lcd_vcbus_write(ENCL_VIDEO_HSO_END, pconf->lcd_timing.hs_he_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_BEGIN, pconf->lcd_timing.vs_hs_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_END, pconf->lcd_timing.vs_he_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_BLINE, pconf->lcd_timing.vs_vs_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_ELINE, pconf->lcd_timing.vs_ve_addr);
lcd_vcbus_write(ENCL_VIDEO_RGBIN_CTRL, 3);
lcd_vcbus_write(ENCL_VIDEO_EN, 1);
aml_lcd_notifier_call_chain(LCD_EVENT_BACKLIGHT_UPDATE, NULL);
}
static void lcd_ttl_control_set(struct lcd_config_s *pconf)
{
unsigned int clk_pol, rb_swap, bit_swap;
@@ -437,44 +477,6 @@ static void lcd_lvds_disable(void)
lcd_vcbus_setb(LVDS_GEN_CNTL, 0, 3, 1); /* disable lvds fifo */
}
static void lcd_venc_set(struct lcd_config_s *pconf)
{
unsigned int h_active, v_active;
unsigned int video_on_pixel, video_on_line;
if (lcd_debug_print_flag)
LCDPR("%s\n", __func__);
h_active = pconf->lcd_basic.h_active;
v_active = pconf->lcd_basic.v_active;
video_on_pixel = pconf->lcd_timing.video_on_pixel;
video_on_line = pconf->lcd_timing.video_on_line;
lcd_vcbus_write(ENCL_VIDEO_EN, 0);
lcd_vcbus_write(ENCL_VIDEO_MODE, 0x8000);/*bit[15] shadown en*/
lcd_vcbus_write(ENCL_VIDEO_MODE_ADV, 0x0418); /* Sampling rate: 1 */
lcd_vcbus_write(ENCL_VIDEO_FILT_CTRL, 0x1000); /* bypass filter */
lcd_vcbus_write(ENCL_VIDEO_MAX_PXCNT, pconf->lcd_basic.h_period - 1);
lcd_vcbus_write(ENCL_VIDEO_MAX_LNCNT, pconf->lcd_basic.v_period - 1);
lcd_vcbus_write(ENCL_VIDEO_HAVON_BEGIN, video_on_pixel);
lcd_vcbus_write(ENCL_VIDEO_HAVON_END, h_active - 1 + video_on_pixel);
lcd_vcbus_write(ENCL_VIDEO_VAVON_BLINE, video_on_line);
lcd_vcbus_write(ENCL_VIDEO_VAVON_ELINE, v_active - 1 + video_on_line);
lcd_vcbus_write(ENCL_VIDEO_HSO_BEGIN, pconf->lcd_timing.hs_hs_addr);
lcd_vcbus_write(ENCL_VIDEO_HSO_END, pconf->lcd_timing.hs_he_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_BEGIN, pconf->lcd_timing.vs_hs_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_END, pconf->lcd_timing.vs_he_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_BLINE, pconf->lcd_timing.vs_vs_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_ELINE, pconf->lcd_timing.vs_ve_addr);
lcd_vcbus_write(ENCL_VIDEO_RGBIN_CTRL, 3);
lcd_vcbus_write(ENCL_VIDEO_EN, 1);
aml_lcd_notifier_call_chain(LCD_EVENT_BACKLIGHT_UPDATE, NULL);
}
static void lcd_vbyone_sync_pol(int hsync_pol, int vsync_pol)
{
lcd_vcbus_setb(VBO_VIN_CTRL, hsync_pol, 4, 1);
@@ -818,7 +820,7 @@ static void lcd_vbyone_config_set(struct lcd_config_s *pconf)
}
}
void lcd_tablet_clk_update(struct lcd_config_s *pconf)
void lcd_tablet_clk_config_change(struct lcd_config_s *pconf)
{
#ifdef CONFIG_AMLOGIC_VPU
request_vpu_clk_vmod(pconf->lcd_timing.lcd_clk, VPU_VENCL);
@@ -836,6 +838,12 @@ void lcd_tablet_clk_update(struct lcd_config_s *pconf)
}
lcd_clk_generate_parameter(pconf);
}
void lcd_tablet_clk_update(struct lcd_config_s *pconf)
{
lcd_tablet_clk_config_change(pconf);
lcd_clk_set(pconf);
if (pconf->lcd_basic.lcd_type == LCD_VBYONE)
lcd_tablet_vbyone_wait_stable();
@@ -854,6 +862,8 @@ void lcd_tablet_config_update(struct lcd_config_s *pconf)
/* update clk & timing config */
lcd_vmode_change(pconf);
info->video_clk = pconf->lcd_timing.lcd_clk;
info->htotal = pconf->lcd_basic.h_period;
info->vtotal = pconf->lcd_basic.v_period;
/* update interface timing */
switch (pconf->lcd_basic.lcd_type) {
case LCD_VBYONE:
@@ -869,12 +879,10 @@ void lcd_tablet_config_update(struct lcd_config_s *pconf)
void lcd_tablet_config_post_update(struct lcd_config_s *pconf)
{
struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
/* update interface timing */
switch (lcd_drv->lcd_config->lcd_basic.lcd_type) {
switch (pconf->lcd_basic.lcd_type) {
case LCD_MIPI:
lcd_mipi_dsi_config_post(lcd_drv->lcd_config);
lcd_mipi_dsi_config_post(pconf);
break;
default:
break;
@@ -904,7 +912,7 @@ void lcd_tablet_driver_init_pre(void)
lcd_clk_set(pconf);
lcd_venc_set(pconf);
lcd_tcon_set(pconf);
lcd_encl_tcon_set(pconf);
lcd_vcbus_write(VENC_INTCTRL, 0x200);

1
drivers/amlogic/media/vout/lcd/lcd_tablet/lcd_tablet.c
View File

@@ -660,6 +660,7 @@ static int lcd_config_load_from_dts(struct lcd_config_s *pconf,
}
ret = of_property_read_u32_array(child, "range_setting", &para[0], 6);
if (ret) {
LCDPR("no range_setting\n");
pconf->lcd_basic.h_period_min = pconf->lcd_basic.h_period;
pconf->lcd_basic.h_period_max = pconf->lcd_basic.h_period;
pconf->lcd_basic.v_period_min = pconf->lcd_basic.v_period;

170
drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c
View File

@@ -125,35 +125,37 @@ static void lcd_lvds_phy_set(struct lcd_config_s *pconf, int status)
clk_vswing = pconf->lcd_control.lvds_config->phy_clk_vswing;
clk_preem = pconf->lcd_control.lvds_config->phy_clk_preem;
if (vswing > 7) {
LCDERR("%s: wrong vswing_level=%d, use default\n",
LCDERR("%s: wrong vswing=%d, use default\n",
__func__, vswing);
vswing = LVDS_PHY_VSWING_DFT;
}
channel_on = lcd_lvds_channel_on_value(pconf);
if (preem > 7) {
LCDERR("%s: wrong preem_level=%d, use default\n",
LCDERR("%s: wrong preem=%d, use default\n",
__func__, preem);
preem = LVDS_PHY_PREEM_DFT;
}
if (clk_vswing > 3) {
LCDERR("%s: wrong clk_vswing_level=%d, use default\n",
LCDERR("%s: wrong clk_vswing=%d, use default\n",
__func__, clk_vswing);
clk_vswing = LVDS_PHY_CLK_VSWING_DFT;
}
if (clk_preem > 7) {
LCDERR("%s: wrong clk_preem_level=%d, use default\n",
LCDERR("%s: wrong clk_preem=%d, use default\n",
__func__, clk_preem);
clk_preem = LVDS_PHY_CLK_PREEM_DFT;
}
channel_on = lcd_lvds_channel_on_value(pconf);
data32 = 0x606cca80 | (vswing << 26) | (preem << 0);
data32 = LVDS_PHY_CNTL1_G9TV |
(vswing << 26) | (preem << 0);
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32);
/*lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0x6c6cca80);*/
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, 0x0000006c);
data32 = (channel_on << 16) | 0x0800 | /* DIF_TX_CTL5 */
(clk_vswing << 8) | (clk_preem << 5); /* DIF_TX_CTL4 */
data32 = LVDS_PHY_CNTL2_G9TV;
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32);
data32 = LVDS_PHY_CNTL3_G9TV |
(channel_on << 16) |
(clk_vswing << 8) | (clk_preem << 5);
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32);
/*lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, 0x0fff0800);*/
} else {
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0x0);
lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, 0x0);
@@ -161,7 +163,7 @@ static void lcd_lvds_phy_set(struct lcd_config_s *pconf, int status)
}
}
static void lcd_tcon_set(struct lcd_config_s *pconf)
static void lcd_encl_tcon_set(struct lcd_config_s *pconf)
{
lcd_vcbus_write(L_RGB_BASE_ADDR, 0);
lcd_vcbus_write(L_RGB_COEFF_ADDR, 0x400);
@@ -201,6 +203,51 @@ static void lcd_tcon_set(struct lcd_config_s *pconf)
lcd_vcbus_read(VPP_MISC) & ~(VPP_OUT_SATURATE));
}
static void lcd_venc_set(struct lcd_config_s *pconf)
{
unsigned int h_active, v_active;
unsigned int video_on_pixel, video_on_line;
if (lcd_debug_print_flag)
LCDPR("%s\n", __func__);
h_active = pconf->lcd_basic.h_active;
v_active = pconf->lcd_basic.v_active;
video_on_pixel = pconf->lcd_timing.video_on_pixel;
video_on_line = pconf->lcd_timing.video_on_line;
lcd_vcbus_write(ENCL_VIDEO_EN, 0);
/* Enable Hsync and equalization pulse switch in center;
* bit[14] cfg_de_v = 1
*/
lcd_vcbus_write(ENCL_VIDEO_MODE, 0x8000);/*bit[15] shadown en*/
lcd_vcbus_write(ENCL_VIDEO_MODE_ADV, 0x18); /* Sampling rate: 1 */
/* bypass filter */
lcd_vcbus_write(ENCL_VIDEO_FILT_CTRL, 0x1000);
lcd_vcbus_write(ENCL_VIDEO_MAX_PXCNT, pconf->lcd_basic.h_period - 1);
lcd_vcbus_write(ENCL_VIDEO_MAX_LNCNT, pconf->lcd_basic.v_period - 1);
lcd_vcbus_write(ENCL_VIDEO_HAVON_BEGIN, video_on_pixel);
lcd_vcbus_write(ENCL_VIDEO_HAVON_END, h_active - 1 + video_on_pixel);
lcd_vcbus_write(ENCL_VIDEO_VAVON_BLINE, video_on_line);
lcd_vcbus_write(ENCL_VIDEO_VAVON_ELINE, v_active - 1 + video_on_line);
lcd_vcbus_write(ENCL_VIDEO_HSO_BEGIN, pconf->lcd_timing.hs_hs_addr);
lcd_vcbus_write(ENCL_VIDEO_HSO_END, pconf->lcd_timing.hs_he_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_BEGIN, pconf->lcd_timing.vs_hs_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_END, pconf->lcd_timing.vs_he_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_BLINE, pconf->lcd_timing.vs_vs_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_ELINE, pconf->lcd_timing.vs_ve_addr);
lcd_vcbus_write(ENCL_VIDEO_RGBIN_CTRL, 3);
lcd_vcbus_write(ENCL_VIDEO_EN, 1);
aml_lcd_notifier_call_chain(LCD_EVENT_BACKLIGHT_UPDATE, NULL);
}
static void lcd_lvds_clk_util_set(struct lcd_config_s *pconf)
{
unsigned int phy_div;
@@ -590,7 +637,7 @@ void lcd_vbyone_interrupt_enable(int flag)
if (vx1_conf->vsync_intr_en == 3)
lcd_vcbus_setb(VBO_FSM_HOLDER_L, 0, 0, 16);
else
lcd_vcbus_setb(VBO_FSM_HOLDER_L, 0xffff, 0, 16);
lcd_vcbus_setb(VBO_FSM_HOLDER_L, 0xffff, 0, 16);
/* enable interrupt */
lcd_vcbus_setb(VBO_INTR_UNMASK,
VBYONE_INTR_UNMASK, 0, 15);
@@ -772,7 +819,7 @@ static void lcd_vx1_hpll_timer_handler(unsigned long arg)
int pclk, pclk_min, pclk_max;
#endif
if (lcd_drv->lcd_status == 0)
if ((lcd_drv->lcd_status & LCD_STATUS_ENCL_ON) == 0)
goto vx1_hpll_timer_end;
#if 0
@@ -948,8 +995,8 @@ static irqreturn_t lcd_vbyone_interrupt_handler(int irq, void *dev_id)
lcd_vcbus_setb(VBO_INTR_STATE_CTRL, data32_1, 0, 9);
lcd_vcbus_setb(VBO_INTR_STATE_CTRL, 0, 0, 9);
if (lcd_debug_print_flag) {
LCDPR("vx1 intr status = 0x%04x, encl_clkmsr = %d",
data32, encl_clk);
LCDPR("vx1 intr status = 0x%04x, encl_clkmsr = %d",
data32, encl_clk);
}
if (vx1_conf->vsync_intr_en == 3) {
@@ -960,16 +1007,16 @@ static irqreturn_t lcd_vbyone_interrupt_handler(int irq, void *dev_id)
}
}
} else {
if (data32 & 0x200) {
LCDPR("vx1 htpdn fall occurred\n");
vx1_fsm_acq_st = 0;
lcd_vcbus_setb(VBO_INTR_STATE_CTRL, 0, 15, 1);
}
if (data32 & 0x200) {
LCDPR("vx1 htpdn fall occurred\n");
vx1_fsm_acq_st = 0;
lcd_vcbus_setb(VBO_INTR_STATE_CTRL, 0, 15, 1);
}
if (data32 & 0x800) {
if (lcd_debug_print_flag)
LCDPR("vx1 lockn fall occurred\n");
vx1_fsm_acq_st = 0;
lcd_vcbus_setb(VBO_INTR_STATE_CTRL, 0, 15, 1);
vx1_fsm_acq_st = 0;
lcd_vcbus_setb(VBO_INTR_STATE_CTRL, 0, 15, 1);
if (vx1_lockn_wait_cnt++ > VX1_LOCKN_WAIT_CNT_MAX) {
if (vx1_timeout_reset_flag == 0) {
vx1_timeout_reset_flag = 1;
@@ -977,7 +1024,7 @@ static irqreturn_t lcd_vbyone_interrupt_handler(int irq, void *dev_id)
&lcd_vx1_reset_tasklet);
vx1_lockn_wait_cnt = 0;
return IRQ_HANDLED;
}
}
}
}
if (data32 & 0x2000) {
@@ -1023,7 +1070,7 @@ static irqreturn_t lcd_vbyone_interrupt_handler(int irq, void *dev_id)
if (data32 & 0x1ff) {
if (lcd_debug_print_flag)
LCDPR("vx1 reset for timing err\n");
vx1_fsm_acq_st = 0;
vx1_fsm_acq_st = 0;
/* force PHY to 0 */
lcd_hiu_setb(HHI_LVDS_TX_PHY_CNTL0, 3, 8, 2);
lcd_vcbus_write(VBO_SOFT_RST, 0x1ff);
@@ -1037,65 +1084,21 @@ static irqreturn_t lcd_vbyone_interrupt_handler(int irq, void *dev_id)
lcd_vcbus_write(VBO_SOFT_RST, 0);
}
udelay(20);
if ((lcd_vcbus_read(VBO_STATUS_L) & 0x3f) == 0x20) {
vx1_lockn_wait_cnt = 0;
/* vx1_training_wait_cnt = 0; */
udelay(20);
if ((lcd_vcbus_read(VBO_STATUS_L) & 0x3f) == 0x20) {
vx1_lockn_wait_cnt = 0;
/* vx1_training_wait_cnt = 0; */
#if (VX1_FSM_ACQ_NEXT == VX1_FSM_ACQ_NEXT_RELEASE_HOLDER)
lcd_vcbus_setb(VBO_FSM_HOLDER_L, 0xffff, 0, 16);
lcd_vcbus_setb(VBO_FSM_HOLDER_L, 0xffff, 0, 16);
#endif
LCDPR("vx1 fsm stable\n");
}
LCDPR("vx1 fsm stable\n");
}
}
/* enable interrupt */
lcd_vcbus_setb(VBO_INTR_UNMASK, VBYONE_INTR_UNMASK, 0, 15);
return IRQ_HANDLED;
}
static void lcd_venc_set(struct lcd_config_s *pconf)
{
unsigned int h_active, v_active;
unsigned int video_on_pixel, video_on_line;
if (lcd_debug_print_flag)
LCDPR("%s\n", __func__);
h_active = pconf->lcd_basic.h_active;
v_active = pconf->lcd_basic.v_active;
video_on_pixel = pconf->lcd_timing.video_on_pixel;
video_on_line = pconf->lcd_timing.video_on_line;
lcd_vcbus_write(ENCL_VIDEO_EN, 0);
/* Enable Hsync and equalization pulse switch in center;
* bit[14] cfg_de_v = 1
*/
lcd_vcbus_write(ENCL_VIDEO_MODE, 0x8000);/*bit[15] shadown en*/
lcd_vcbus_write(ENCL_VIDEO_MODE_ADV, 0x18); /* Sampling rate: 1 */
/* bypass filter */
lcd_vcbus_write(ENCL_VIDEO_FILT_CTRL, 0x1000);
lcd_vcbus_write(ENCL_VIDEO_MAX_PXCNT, pconf->lcd_basic.h_period - 1);
lcd_vcbus_write(ENCL_VIDEO_MAX_LNCNT, pconf->lcd_basic.v_period - 1);
lcd_vcbus_write(ENCL_VIDEO_HAVON_BEGIN, video_on_pixel);
lcd_vcbus_write(ENCL_VIDEO_HAVON_END, h_active - 1 + video_on_pixel);
lcd_vcbus_write(ENCL_VIDEO_VAVON_BLINE, video_on_line);
lcd_vcbus_write(ENCL_VIDEO_VAVON_ELINE, v_active - 1 + video_on_line);
lcd_vcbus_write(ENCL_VIDEO_HSO_BEGIN, pconf->lcd_timing.hs_hs_addr);
lcd_vcbus_write(ENCL_VIDEO_HSO_END, pconf->lcd_timing.hs_he_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_BEGIN, pconf->lcd_timing.vs_hs_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_END, pconf->lcd_timing.vs_he_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_BLINE, pconf->lcd_timing.vs_vs_addr);
lcd_vcbus_write(ENCL_VIDEO_VSO_ELINE, pconf->lcd_timing.vs_ve_addr);
lcd_vcbus_write(ENCL_VIDEO_RGBIN_CTRL, 3);
lcd_vcbus_write(ENCL_VIDEO_EN, 1);
aml_lcd_notifier_call_chain(LCD_EVENT_BACKLIGHT_UPDATE, NULL);
}
static unsigned int vbyone_lane_num[] = {
1,
@@ -1166,7 +1169,7 @@ static void lcd_vbyone_config_set(struct lcd_config_s *pconf)
}
}
void lcd_tv_clk_update(struct lcd_config_s *pconf)
void lcd_tv_clk_config_change(struct lcd_config_s *pconf)
{
#ifdef CONFIG_AMLOGIC_VPU
request_vpu_clk_vmod(pconf->lcd_timing.lcd_clk, VPU_VENCL);
@@ -1174,12 +1177,19 @@ void lcd_tv_clk_update(struct lcd_config_s *pconf)
switch (pconf->lcd_basic.lcd_type) {
case LCD_VBYONE:
lcd_vbyone_config_set(pconf);
lcd_vbyone_interrupt_enable(0);
break;
default:
break;
}
lcd_clk_generate_parameter(pconf);
}
void lcd_tv_clk_update(struct lcd_config_s *pconf)
{
lcd_tv_clk_config_change(pconf);
if (pconf->lcd_basic.lcd_type == LCD_VBYONE)
lcd_vbyone_interrupt_enable(0);
lcd_clk_set(pconf);
if (pconf->lcd_basic.lcd_type == LCD_VBYONE)
lcd_vbyone_wait_stable();
@@ -1198,6 +1208,8 @@ void lcd_tv_config_update(struct lcd_config_s *pconf)
/* update clk & timing config */
lcd_vmode_change(pconf);
info->video_clk = pconf->lcd_timing.lcd_clk;
info->htotal = pconf->lcd_basic.h_period;
info->vtotal = pconf->lcd_basic.v_period;
/* update interface timing */
switch (pconf->lcd_basic.lcd_type) {
case LCD_VBYONE:
@@ -1238,7 +1250,7 @@ void lcd_tv_driver_init_pre(void)
lcd_clk_set(pconf);
lcd_venc_set(pconf);
lcd_tcon_set(pconf);
lcd_encl_tcon_set(pconf);
lcd_vcbus_write(VENC_INTCTRL, 0x200);

24
drivers/amlogic/media/vout/lcd/lcd_tv/lcd_tv.c
View File

@@ -819,7 +819,7 @@ static int lcd_config_load_from_dts(struct lcd_config_s *pconf,
}
ret = of_property_read_u32_array(child, "range_setting", &para[0], 6);
if (ret) {
LCDERR("no range_setting\n");
LCDPR("no range_setting\n");
pconf->lcd_basic.h_period_min = pconf->lcd_basic.h_period;
pconf->lcd_basic.h_period_max = pconf->lcd_basic.h_period;
pconf->lcd_basic.v_period_min = pconf->lcd_basic.v_period;
@@ -881,11 +881,11 @@ static int lcd_config_load_from_dts(struct lcd_config_s *pconf,
lvdsconf->port_swap = para[3];
}
} else {
lvdsconf->lvds_repack = para[0];
lvdsconf->dual_port = para[1];
lvdsconf->pn_swap = para[2];
lvdsconf->port_swap = para[3];
lvdsconf->lane_reverse = para[4];
lvdsconf->lvds_repack = para[0];
lvdsconf->dual_port = para[1];
lvdsconf->pn_swap = para[2];
lvdsconf->port_swap = para[3];
lvdsconf->lane_reverse = para[4];
}
ret = of_property_read_u32_array(child, "phy_attr",
&para[0], 4);
@@ -904,8 +904,8 @@ static int lcd_config_load_from_dts(struct lcd_config_s *pconf,
lvdsconf->phy_clk_preem = 0;
if (lcd_debug_print_flag) {
LCDPR("phy vswing=0x%x, preem=0x%x\n",
lvdsconf->phy_vswing,
lvdsconf->phy_preem);
lvdsconf->phy_vswing,
lvdsconf->phy_preem);
}
}
} else {
@@ -967,9 +967,9 @@ static int lcd_config_load_from_dts(struct lcd_config_s *pconf,
if (vx1_conf->ctrl_flag & 0x7) {
ret = of_property_read_u32_array(child,
"vbyone_ctrl_timing", &para[0], 3);
if (ret)
if (ret) {
LCDPR("failed to get vbyone_ctrl_timing\n");
else {
} else {
vx1_conf->power_on_reset_delay = para[0];
vx1_conf->hpd_data_delay = para[1];
vx1_conf->cdr_training_hold = para[2];
@@ -1353,6 +1353,10 @@ static int lcd_frame_rate_adjust_notifier(struct notifier_block *nb,
if ((event & LCD_EVENT_FRAME_RATE_ADJUST) == 0)
return NOTIFY_DONE;
if (data == NULL) {
LCDERR("%s: data is NULL\n", __func__);
return NOTIFY_DONE;
}
sync_duration = (unsigned int *)data;
lcd_set_vinfo(*sync_duration);

132
drivers/amlogic/media/vout/lcd/lcd_tv/lcd_tv.dts
View File

@@ -1,132 +0,0 @@
/*
* drivers/amlogic/media/vout/lcd/lcd_tv/lcd_tv.dts
*
* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
lcd{
compatible = "amlogic, lcd";
dev_name = "lcd";
mode = "tv";
status = "okay";
resets = <&clock GCLK_IDX_VCLK2_ENCL &clock GCLK_IDX_VCLK2_VENCL>;
reset-names = "encl","vencl";
interrupts = <0 78 1 0 3 1>;
interrupt-names = "vbyone","vbyone_vsync";
pinctrl-names = "vbyone";
pinctrl-0 = <&lcd_vbyone_pins>;
/* power type:(0=cpu, 1=pmu, 2=signal, 3=extern, 0xff=ending) */
/* power index:(point gpios_index, or extern_index, 0xff=invalid) */
/* power value:(0=output low, 1=output high, 2=input) */
/* power delay:(unit in ms) */
lcd_cpu-gpios = <&gpio GPIOX_3 GPIO_ACTIVE_HIGH>;
lcd_cpu_gpio_names = "GPIOX_3";
lvds_0{
model_name = "public";
interface = "lvds"; /* lcd_interface(lvds, vbyone) */
basic_setting = <1920 1080 2200 1125 8 16 9>;
/* h_active, v_active, h_period, v_period, lcd_bits,
* screen_widht, screen_height
*/
lcd_timing = <44 148 0 5 30 0>;
/* hs_width, hs_bp, hs_pol, vs_width, vs_bp, vs_pol */
clk_attr = <0 0 1>;
/* fr_adj_type(0=clock, 1=htotal, 2=vtotal),
* clk_ss_level, clk_auto_generate
*/
lvds_attr = <1 1 0 0>;
/** lvds_repack, dual_port, pn_swap, port_swap */
power_on_step = <0 0 1 50
2 0 0 0
0xff 0 0 0>; /* type, index, value, delay */
power_off_step = <2 0 0 50
0 0 0 100
0xff 0 0 0>; /* type, index, value, delay */
backlight_index = <0>;
};
vbyone_0{
model_name = "BOE_HV550QU2";
interface = "vbyone"; /* lcd_interface(lvds, vbyone) */
basic_setting = <3840 2160 4400 2250 10 16 9>;
/* h_active, v_active, h_period, v_period, lcd_bits,
* screen_widht, screen_height
*/
lcd_timing = <33 477 0 6 65 0>;
/* hs_width, hs_bp, hs_pol, vs_width, vs_bp, vs_pol */
clk_attr = <0 0 1>;
/* fr_adj_type(0=clock, 1=htotal, 2=vtotal),
* clk_ss_level, clk_auto_generate
*/
vbyone_attr = <8 2 4 4>;
/** lane_count, region_num, byte_mode, color_fmt */
power_on_step = <0 0 1 50
2 0 0 0
0xff 0 0 0>; /* type, index, value, delay */
power_off_step = <2 0 0 50
0 0 0 100
0xff 0 0 0>; /* type, index, value, delay */
backlight_index = <0>;
};
vbyone_1{
model_name = "LG_RDL550WY";
interface = "vbyone"; /* lcd_interface(lvds, vbyone) */
basic_setting = <3840 2160 4400 2250 10 16 9>;
/* h_active, v_active, h_period, v_period, lcd_bits,
* screen_widht, screen_height
*/
lcd_timing = <33 477 0 6 65 0>;
/* hs_width, hs_bp, hs_pol, vs_width, vs_bp, vs_pol */
clk_attr = <2 0 1>;
/* fr_adj_type(0=clock, 1=htotal, 2=vtotal),
* clk_ss_level, clk_auto_generate
*/
vbyone_attr = <8 2 4 4>;
/** lane_count, region_num, byte_mode, color_fmt */
power_on_step = <0 0 1 50
2 0 0 0
0xff 0 0 0>; /* type, index, value, delay */
power_off_step = <2 0 0 50
0 0 0 100
0xff 0 0 0>; /* type, index, value, delay */
backlight_index = <0>;
};
vbyone_2{
model_name = "INL_V580DJ2";
interface = "vbyone"; /* lcd_interface(lvds, vbyone) */
basic_setting = <3840 2160 4400 2250 10 16 9>;
/* h_active, v_active, h_period, v_period, lcd_bits,
* screen_widht, screen_height
*/
lcd_timing = <33 477 0 6 65 0>;
/* hs_width, hs_bp, hs_pol, vs_width, vs_bp, vs_pol */
clk_attr = <2 0 1>;
/* fr_adj_type(0=clock, 1=htotal, 2=vtotal),
* clk_ss_level, clk_auto_generate
*/
vbyone_attr = <8 1 4 4>;
/** lane_count, region_num, byte_mode, color_fmt */
power_on_step = <0 0 1 50
2 0 0 0
0xff 0 0 0>; /* type, index, value, delay */
power_off_step = <2 0 0 50
0 0 0 100
0xff 0 0 0>; /* type, index, value, delay */
backlight_index = <0>;
};
};

17
drivers/amlogic/media/vout/lcd/lcd_unifykey.c
View File

@@ -32,7 +32,7 @@
#define LCDUKEY(fmt, args...) pr_info("lcd ukey: "fmt"", ## args)
#define LCDUKEYERR(fmt, args...) pr_info("lcd ukey err: error: "fmt"", ## args)
#ifdef CONFIG_KEY_MANAGE
#ifdef CONFIG_AMLOGIC_UNIFYKEY
static unsigned int cal_crc32(unsigned int crc, const unsigned char *buf,
int buf_len) {
unsigned int s_crc32[16] = {
@@ -90,9 +90,14 @@ int lcd_unifykey_check(char *key_name)
unsigned int key_crc32;
int ret;
if (key_name == NULL) {
LCDUKEYERR("%s: key_name is null\n", __func__);
return -1;
}
key_exist = 0;
key_len = 0;
ret = key_unify_query(key_name, &key_exist, &keypermit);
ret = key_unify_query(get_ukdev(), key_name, &key_exist, &keypermit);
if (ret < 0) {
if (lcd_debug_print_flag)
LCDUKEYERR("%s query exist error\n", key_name);
@@ -104,7 +109,7 @@ int lcd_unifykey_check(char *key_name)
return -1;
}
ret = key_unify_size(key_name, &key_len);
ret = key_unify_size(get_ukdev(), key_name, &key_len);
if (ret < 0) {
LCDUKEYERR("%s query size error\n", key_name);
return -1;
@@ -123,7 +128,7 @@ lcd_unifykey_read:
LCDUKEYERR("%s: Not enough memory\n", __func__);
return -1;
}
ret = key_unify_read(key_name, buf, key_len, &key_len);
ret = key_unify_read(get_ukdev(), key_name, buf, key_len, &key_len);
if (ret < 0) {
LCDUKEYERR("%s unify read error\n", key_name);
return -1;
@@ -177,7 +182,7 @@ int lcd_unifykey_get(char *key_name, unsigned char *buf, int *len)
ret = lcd_unifykey_check(key_name);
if (ret < 0)
return -1;
ret = key_unify_size(key_name, &key_len);
ret = key_unify_size(get_ukdev(), key_name, &key_len);
if (key_len > *len) {
LCDUKEYERR("%s size(%d) is bigger than buf_size(%d)\n",
key_name, key_len, *len);
@@ -185,7 +190,7 @@ int lcd_unifykey_get(char *key_name, unsigned char *buf, int *len)
}
*len = key_len;
ret = key_unify_read(key_name, buf, key_len, &key_len);
ret = key_unify_read(get_ukdev(), key_name, buf, key_len, &key_len);
if (ret < 0) {
LCDUKEYERR("%s unify read error\n", key_name);
return -1;

7
drivers/amlogic/media/vout/lcd/lcd_vout.c
View File

@@ -79,7 +79,6 @@ static struct ttl_config_s lcd_ttl_config = {
};
static struct lvds_config_s lcd_lvds_config = {
.lvds_vswing = 1,
.lvds_repack = 1,
.dual_port = 0,
.pn_swap = 0,
@@ -88,6 +87,8 @@ static struct lvds_config_s lcd_lvds_config = {
.port_sel = 0,
.phy_vswing = LVDS_PHY_VSWING_DFT,
.phy_preem = LVDS_PHY_PREEM_DFT,
.phy_clk_vswing = LVDS_PHY_CLK_VSWING_DFT,
.phy_clk_preem = LVDS_PHY_CLK_PREEM_DFT,
};
static struct vbyone_config_s lcd_vbyone_config = {
@@ -125,9 +126,7 @@ static struct dsi_config_s lcd_mipi_config = {
.dsi_init_on = &dsi_init_on_table[0],
.dsi_init_off = &dsi_init_off_table[0],
.extern_init = 0xff,
/* ext_index if needed, must match ext_config index;
* 0xff for invalid
*/
/* ext_index if needed, 0xff for invalid */
.check_en = 0,
.check_reg = 0,
.check_cnt = 0,

9
include/linux/amlogic/media/vout/lcd/lcd_unifykey.h
View File

@@ -21,11 +21,12 @@
#define LCD_UNIFYKEY_WAIT_TIMEOUT 300
/* declare external unifykey function */
extern int key_unify_read(char *keyname, unsigned char *keydata,
extern void *get_ukdev(void);
extern int key_unify_read(void *ukdev, char *keyname, unsigned char *keydata,
unsigned int datalen, unsigned int *reallen);
extern int key_unify_size(char *keyname, unsigned int *reallen);
extern int key_unify_query(char *keyname, unsigned int *keystate,
unsigned int *keypermit);
extern int key_unify_size(void *ukdev, char *keyname, unsigned int *reallen);
extern int key_unify_query(void *ukdev, char *keyname,
unsigned int *keystate, unsigned int *keypermit);
extern int key_unify_get_init_flag(void);