mirror of
https://github.com/hardkernel/linux.git
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Merge tag 'iwlwifi-next-for-kalle-2021-10-22' of git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-next
iwlwifi patches for v5.16 * Support for 160MHz in ranging measurements; * Some fixes in HE capabilities; * Fixes in vendor specific capabilities; * Add the PC of both processors in error dumps; * Small fix in TDLS; * Code to sanitize firmware dumps; * Updates for new FW rate and flags format; * Continue implementation of new rate and flags format in the FW APIs; * Some fixes for BZ family initialization; * Fix session protection in some scenarios; * Some debugging improvements; * Fix BT-coex priority; * Improve PS-poll timeout detection; * Some other small fixes, clean-ups and improvements. # gpg: Signature made Fri 22 Oct 2021 11:28:43 AM EEST # gpg: using RSA key 1772CD7E06F604F5A6EBCB26A1479CA21A3CC5FA # gpg: Good signature from "Luciano Roth Coelho (Luca) <luca@coelho.fi>" [full] # gpg: aka "Luciano Roth Coelho (Intel) <luciano.coelho@intel.com>" [full]
This commit is contained in:
@@ -15,7 +15,7 @@ iwlwifi-objs += iwl-dbg-tlv.o
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iwlwifi-objs += iwl-trans.o
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iwlwifi-objs += queue/tx.o
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iwlwifi-objs += fw/img.o fw/notif-wait.o
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iwlwifi-objs += fw/img.o fw/notif-wait.o fw/rs.o
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iwlwifi-objs += fw/dbg.o fw/pnvm.o fw/dump.o
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iwlwifi-$(CONFIG_IWLMVM) += fw/paging.o fw/smem.o fw/init.o
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iwlwifi-$(CONFIG_ACPI) += fw/acpi.o
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@@ -3,11 +3,6 @@
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*
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* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2018 - 2020 Intel Corporation
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*
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* Contact Information:
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* Intel Linux Wireless <linuxwifi@intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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*****************************************************************************/
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#include <linux/module.h>
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@@ -3,11 +3,6 @@
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*
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* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2018 - 2020 Intel Corporation
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||||
*
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||||
* Contact Information:
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* Intel Linux Wireless <linuxwifi@intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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*****************************************************************************/
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#include <linux/module.h>
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@@ -53,6 +53,9 @@
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#define IWL_BZ_A_GF_A_FW_PRE "iwlwifi-bz-a0-gf-a0-"
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#define IWL_BZ_A_GF4_A_FW_PRE "iwlwifi-bz-a0-gf4-a0-"
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#define IWL_BZ_A_MR_A_FW_PRE "iwlwifi-bz-a0-mr-a0-"
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#define IWL_BZ_A_FM_A_FW_PRE "iwlwifi-bz-a0-fm-a0-"
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#define IWL_GL_A_FM_A_FW_PRE "iwlwifi-gl-a0-fm7-a0-"
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#define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \
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IWL_QU_B_HR_B_FW_PRE __stringify(api) ".ucode"
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@@ -106,6 +109,10 @@
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IWL_BZ_A_GF4_A_FW_PRE __stringify(api) ".ucode"
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#define IWL_BZ_A_MR_A_MODULE_FIRMWARE(api) \
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IWL_BZ_A_MR_A_FW_PRE __stringify(api) ".ucode"
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#define IWL_BZ_A_FM_A_MODULE_FIRMWARE(api) \
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IWL_BZ_A_FM_A_FW_PRE __stringify(api) ".ucode"
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#define IWL_GL_A_FM_A_MODULE_FIRMWARE(api) \
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IWL_GL_A_FM_A_FW_PRE __stringify(api) ".ucode"
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static const struct iwl_base_params iwl_22000_base_params = {
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.eeprom_size = OTP_LOW_IMAGE_SIZE_32K,
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@@ -469,6 +476,14 @@ const char iwl_ax210_killer_1675w_name[] =
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"Killer(R) Wi-Fi 6E AX1675w 160MHz Wireless Network Adapter (210D2W)";
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const char iwl_ax210_killer_1675x_name[] =
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"Killer(R) Wi-Fi 6E AX1675x 160MHz Wireless Network Adapter (210NGW)";
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const char iwl_ax211_killer_1675s_name[] =
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"Killer(R) Wi-Fi 6E AX1675s 160MHz Wireless Network Adapter (211NGW)";
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const char iwl_ax211_killer_1675i_name[] =
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"Killer(R) Wi-Fi 6E AX1675i 160MHz Wireless Network Adapter (211NGW)";
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const char iwl_ax411_killer_1690s_name[] =
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"Killer(R) Wi-Fi 6E AX1690s 160MHz Wireless Network Adapter (411D2W)";
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const char iwl_ax411_killer_1690i_name[] =
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"Killer(R) Wi-Fi 6E AX1690i 160MHz Wireless Network Adapter (411NGW)";
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const struct iwl_cfg iwl_qu_b0_hr1_b0 = {
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.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
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@@ -850,6 +865,20 @@ const struct iwl_cfg iwl_cfg_bz_a0_mr_a0 = {
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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};
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const struct iwl_cfg iwl_cfg_bz_a0_fm_a0 = {
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.fw_name_pre = IWL_BZ_A_FM_A_FW_PRE,
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.uhb_supported = true,
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IWL_DEVICE_BZ,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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};
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const struct iwl_cfg iwl_cfg_gl_a0_fm_a0 = {
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.fw_name_pre = IWL_GL_A_FM_A_FW_PRE,
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.uhb_supported = true,
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IWL_DEVICE_BZ,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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};
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MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_QNJ_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
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@@ -876,3 +905,5 @@ MODULE_FIRMWARE(IWL_BZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_BZ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_BZ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_BZ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_BZ_A_FM_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_GL_A_FM_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
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@@ -3,11 +3,6 @@
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*
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* Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2018 - 2020 Intel Corporation
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*
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||||
* Contact Information:
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* Intel Linux Wireless <linuxwifi@intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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||||
*****************************************************************************/
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#include <linux/module.h>
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@@ -3,11 +3,6 @@
|
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*
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||||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2018 - 2020 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
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||||
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#include <linux/module.h>
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@@ -1,6 +1,6 @@
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||||
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* Copyright (C) 2005-2014 Intel Corporation
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* Copyright (C) 2005-2014, 2021 Intel Corporation
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||||
*/
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#ifndef __iwl_agn_h__
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#define __iwl_agn_h__
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@@ -398,8 +398,10 @@ do { \
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if (!iwl_is_rfkill((m))) \
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IWL_ERR(m, fmt, ##args); \
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else \
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__iwl_err((m)->dev, true, \
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!iwl_have_debug_level(IWL_DL_RADIO), \
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__iwl_err((m)->dev, \
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iwl_have_debug_level(IWL_DL_RADIO) ? \
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IWL_ERR_MODE_RFKILL : \
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IWL_ERR_MODE_TRACE_ONLY, \
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fmt, ##args); \
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} while (0)
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#else
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@@ -408,7 +410,8 @@ do { \
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if (!iwl_is_rfkill((m))) \
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IWL_ERR(m, fmt, ##args); \
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else \
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__iwl_err((m)->dev, true, true, fmt, ##args); \
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__iwl_err((m)->dev, IWL_ERR_MODE_TRACE_ONLY, \
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fmt, ##args); \
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} while (0)
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#endif /* CONFIG_IWLWIFI_DEBUG */
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|
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|
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@@ -3,10 +3,6 @@
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*
|
||||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright (C) 2018 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
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||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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||||
*****************************************************************************/
|
||||
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#include <linux/slab.h>
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@@ -2,11 +2,6 @@
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||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2003 - 2014, 2020 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
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||||
*****************************************************************************/
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||||
/*
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* Please use this file (dev.h) for driver implementation definitions.
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||||
|
||||
@@ -3,11 +3,6 @@
|
||||
*
|
||||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright (C) 2019 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#include <linux/units.h>
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||||
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@@ -3,11 +3,6 @@
|
||||
*
|
||||
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright (C) 2019 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
|
||||
@@ -2,11 +2,6 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __iwl_leds_h__
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||||
|
||||
@@ -2,11 +2,6 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@@ -6,11 +6,6 @@
|
||||
*
|
||||
* Portions of this file are derived from the ipw3945 project, as well
|
||||
* as portions of the ieee80211 subsystem header files.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
@@ -6,11 +6,6 @@
|
||||
*
|
||||
* Portions of this file are derived from the ipw3945 project, as well
|
||||
* as portions of the ieee80211 subsystem header files.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
@@ -52,7 +47,6 @@
|
||||
|
||||
#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
|
||||
MODULE_DESCRIPTION(DRV_DESCRIPTION);
|
||||
MODULE_AUTHOR(DRV_AUTHOR);
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
/* Please keep this array *SORTED* by hex value.
|
||||
|
||||
@@ -6,10 +6,6 @@
|
||||
*
|
||||
* Portions of this file are derived from the ipw3945 project, as well
|
||||
* as portions of the ieee80211 subsystem header files.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
|
||||
@@ -5,10 +5,6 @@
|
||||
*
|
||||
* Portions of this file are derived from the ipw3945 project, as well
|
||||
* as portions of the ieee80211 subsystem header files.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*****************************************************************************/
|
||||
#ifndef __iwl_power_setting_h__
|
||||
#define __iwl_power_setting_h__
|
||||
|
||||
@@ -3,11 +3,6 @@
|
||||
*
|
||||
* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright (C) 2019 - 2020 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/skbuff.h>
|
||||
|
||||
@@ -2,11 +2,6 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __iwl_agn_rs_h__
|
||||
|
||||
@@ -7,11 +7,6 @@
|
||||
*
|
||||
* Portions of this file are derived from the ipw3945 project, as well
|
||||
* as portionhelp of the ieee80211 subsystem header files.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#include <linux/etherdevice.h>
|
||||
|
||||
@@ -3,11 +3,6 @@
|
||||
*
|
||||
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2015 Intel Deutschland GmbH
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#include <linux/etherdevice.h>
|
||||
|
||||
@@ -3,10 +3,6 @@
|
||||
*
|
||||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*****************************************************************************/
|
||||
#include <linux/slab.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
@@ -5,11 +5,6 @@
|
||||
*
|
||||
* Portions of this file are derived from the ipw3945 project, as well
|
||||
* as portions of the ieee80211 subsystem header files.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
#include <linux/etherdevice.h>
|
||||
#include <net/mac80211.h>
|
||||
|
||||
@@ -6,10 +6,6 @@
|
||||
*
|
||||
* Portions of this file are derived from the ipw3945 project, as well
|
||||
* as portions of the ieee80211 subsystem header files.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
|
||||
@@ -5,10 +5,6 @@
|
||||
*
|
||||
* Portions of this file are derived from the ipw3945 project, as well
|
||||
* as portions of the ieee80211 subsystem header files.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*****************************************************************************/
|
||||
#ifndef __iwl_tt_setting_h__
|
||||
#define __iwl_tt_setting_h__
|
||||
|
||||
@@ -3,11 +3,6 @@
|
||||
*
|
||||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright (C) 2019 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@@ -3,11 +3,6 @@
|
||||
*
|
||||
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2015 Intel Deutschland GmbH
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
||||
@@ -116,7 +116,8 @@ enum iwl_dsm_funcs_rev_0 {
|
||||
DSM_FUNC_DISABLE_SRD = 1,
|
||||
DSM_FUNC_ENABLE_INDONESIA_5G2 = 2,
|
||||
DSM_FUNC_11AX_ENABLEMENT = 6,
|
||||
DSM_FUNC_ENABLE_UNII4_CHAN = 7
|
||||
DSM_FUNC_ENABLE_UNII4_CHAN = 7,
|
||||
DSM_FUNC_ACTIVATE_CHANNEL = 8
|
||||
};
|
||||
|
||||
enum iwl_dsm_values_srd {
|
||||
|
||||
@@ -624,7 +624,7 @@ struct iwl_wowlan_status_v6 {
|
||||
} __packed; /* WOWLAN_STATUSES_API_S_VER_6 */
|
||||
|
||||
/**
|
||||
* struct iwl_wowlan_status - WoWLAN status
|
||||
* struct iwl_wowlan_status_v7 - WoWLAN status
|
||||
* @gtk: GTK data
|
||||
* @igtk: IGTK data
|
||||
* @replay_ctr: GTK rekey replay counter
|
||||
|
||||
@@ -7,6 +7,7 @@
|
||||
|
||||
#include <linux/bitops.h>
|
||||
|
||||
#define IWL_FW_INI_HW_SMEM_REGION_ID 15
|
||||
#define IWL_FW_INI_MAX_REGION_ID 64
|
||||
#define IWL_FW_INI_MAX_NAME 32
|
||||
#define IWL_FW_INI_MAX_CFG_NAME 64
|
||||
@@ -242,6 +243,62 @@ struct iwl_fw_ini_hcmd_tlv {
|
||||
struct iwl_fw_ini_hcmd hcmd;
|
||||
} __packed; /* FW_TLV_DEBUG_HCMD_API_S_VER_1 */
|
||||
|
||||
/**
|
||||
* struct iwl_fw_ini_conf_tlv - preset configuration TLV
|
||||
*
|
||||
* @address: the base address
|
||||
* @value: value to set at address
|
||||
|
||||
*/
|
||||
struct iwl_fw_ini_addr_val {
|
||||
__le32 address;
|
||||
__le32 value;
|
||||
} __packed; /* FW_TLV_DEBUG_ADDR_VALUE_VER_1 */
|
||||
|
||||
/**
|
||||
* struct iwl_fw_ini_conf_tlv - configuration TLV to set register/memory.
|
||||
*
|
||||
* @hdr: debug header
|
||||
* @time_point: time point to apply config. One of &enum iwl_fw_ini_time_point
|
||||
* @set_type: write access type preset token for time point.
|
||||
* one of &enum iwl_fw_ini_config_set_type
|
||||
* @addr_offset: the offset to add to any item in address[0] field
|
||||
* @addr_val: address value pair
|
||||
*/
|
||||
struct iwl_fw_ini_conf_set_tlv {
|
||||
struct iwl_fw_ini_header hdr;
|
||||
__le32 time_point;
|
||||
__le32 set_type;
|
||||
__le32 addr_offset;
|
||||
struct iwl_fw_ini_addr_val addr_val[0];
|
||||
} __packed; /* FW_TLV_DEBUG_CONFIG_SET_API_S_VER_1 */
|
||||
|
||||
/**
|
||||
* enum iwl_fw_ini_config_set_type
|
||||
*
|
||||
* @IWL_FW_INI_CONFIG_SET_TYPE_INVALID: invalid config set
|
||||
* @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC: for PERIPHERY MAC configuration
|
||||
* @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY: for PERIPHERY PHY configuration
|
||||
* @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX: for PERIPHERY AUX configuration
|
||||
* @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY: for DEVICE MEMORY configuration
|
||||
* @IWL_FW_INI_CONFIG_SET_TYPE_CSR: for CSR configuration
|
||||
* @IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR: for DBGC_DRAM_ADDR configuration
|
||||
* @IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM: for PERIPH SCRATCH HWM configuration
|
||||
* @IWL_FW_INI_ALLOCATION_NUM: max number of configuration supported
|
||||
*/
|
||||
|
||||
enum iwl_fw_ini_config_set_type {
|
||||
IWL_FW_INI_CONFIG_SET_TYPE_INVALID = 0,
|
||||
IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC,
|
||||
IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY,
|
||||
IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX,
|
||||
IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY,
|
||||
IWL_FW_INI_CONFIG_SET_TYPE_CSR,
|
||||
IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR,
|
||||
IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM,
|
||||
IWL_FW_INI_CONFIG_SET_TYPE_MAX_NUM,
|
||||
} __packed;
|
||||
|
||||
/**
|
||||
* enum iwl_fw_ini_allocation_id
|
||||
*
|
||||
|
||||
@@ -361,6 +361,24 @@ struct iwl_buf_alloc_cmd {
|
||||
struct iwl_buf_alloc_frag frags[BUF_ALLOC_MAX_NUM_FRAGS];
|
||||
} __packed; /* BUFFER_ALLOCATION_CMD_API_S_VER_2 */
|
||||
|
||||
#define DRAM_INFO_FIRST_MAGIC_WORD 0x76543210
|
||||
#define DRAM_INFO_SECOND_MAGIC_WORD 0x89ABCDEF
|
||||
|
||||
/**
|
||||
* struct iwL_dram_info - DRAM fragments allocation struct
|
||||
*
|
||||
* Driver will fill in the first 1K(+) of the pointed DRAM fragment
|
||||
*
|
||||
* @first_word: magic word value
|
||||
* @second_word: magic word value
|
||||
* @framfrags: DRAM fragmentaion detail
|
||||
*/
|
||||
struct iwl_dram_info {
|
||||
__le32 first_word;
|
||||
__le32 second_word;
|
||||
struct iwl_buf_alloc_cmd dram_frags[IWL_FW_INI_ALLOCATION_NUM - 1];
|
||||
} __packed; /* INIT_DRAM_FRAGS_ALLOCATIONS_S_VER_1 */
|
||||
|
||||
/**
|
||||
* struct iwl_dbg_host_event_cfg_cmd
|
||||
* @enabled_severities: enabled severities
|
||||
|
||||
@@ -206,7 +206,7 @@ enum iwl_tof_responder_cfg_flags {
|
||||
IWL_TOF_RESPONDER_FLAGS_SPECIFIC_CALIB_MODE = BIT(8),
|
||||
IWL_TOF_RESPONDER_FLAGS_FAST_ALGO_SUPPORT = BIT(9),
|
||||
IWL_TOF_RESPONDER_FLAGS_RETRY_ON_ALGO_FAIL = BIT(10),
|
||||
IWL_TOF_RESPONDER_FLAGS_FTM_TX_ANT = RATE_MCS_ANT_ABC_MSK,
|
||||
IWL_TOF_RESPONDER_FLAGS_FTM_TX_ANT = RATE_MCS_ANT_AB_MSK,
|
||||
IWL_TOF_RESPONDER_FLAGS_NDP_SUPPORT = BIT(24),
|
||||
IWL_TOF_RESPONDER_FLAGS_LMR_FEEDBACK = BIT(25),
|
||||
IWL_TOF_RESPONDER_FLAGS_SESSION_ID = BIT(27),
|
||||
@@ -629,6 +629,7 @@ enum iwl_location_bw {
|
||||
IWL_LOCATION_BW_20MHZ,
|
||||
IWL_LOCATION_BW_40MHZ,
|
||||
IWL_LOCATION_BW_80MHZ,
|
||||
IWL_LOCATION_BW_160MHZ,
|
||||
};
|
||||
|
||||
#define TK_11AZ_LEN 32
|
||||
@@ -1500,7 +1501,9 @@ struct iwl_tof_range_rsp_ap_entry_ntfy_v6 {
|
||||
u8 reserved[3];
|
||||
u8 rx_pn[IEEE80211_CCMP_PN_LEN];
|
||||
u8 tx_pn[IEEE80211_CCMP_PN_LEN];
|
||||
} __packed; /* LOCATION_RANGE_RSP_AP_ETRY_NTFY_API_S_VER_6 */
|
||||
} __packed; /* LOCATION_RANGE_RSP_AP_ETRY_NTFY_API_S_VER_6,
|
||||
LOCATION_RANGE_RSP_AP_ETRY_NTFY_API_S_VER_7 */
|
||||
|
||||
|
||||
/**
|
||||
* enum iwl_tof_response_status - tof response status
|
||||
@@ -1581,7 +1584,8 @@ struct iwl_tof_range_rsp_ntfy_v8 {
|
||||
u8 last_report;
|
||||
u8 reserved;
|
||||
struct iwl_tof_range_rsp_ap_entry_ntfy_v6 ap[IWL_MVM_TOF_MAX_APS];
|
||||
} __packed; /* LOCATION_RANGE_RSP_NTFY_API_S_VER_8 */
|
||||
} __packed; /* LOCATION_RANGE_RSP_NTFY_API_S_VER_8,
|
||||
LOCATION_RANGE_RSP_NTFY_API_S_VER_9 */
|
||||
|
||||
#define IWL_MVM_TOF_MCSI_BUF_SIZE (245)
|
||||
/**
|
||||
|
||||
@@ -138,6 +138,8 @@ struct iwl_mac_data_ibss {
|
||||
* @FLEXIBLE_TWT_SUPPORTED: AP supports flexible TWT schedule
|
||||
* @PROTECTED_TWT_SUPPORTED: AP supports protected TWT frames (with 11w)
|
||||
* @BROADCAST_TWT_SUPPORTED: AP and STA support broadcast TWT
|
||||
* @COEX_HIGH_PRIORITY_ENABLE: high priority mode for BT coex, to be used
|
||||
* during 802.1X negotiation (and allowed during 4-way-HS)
|
||||
*/
|
||||
enum iwl_mac_data_policy {
|
||||
TWT_SUPPORTED = BIT(0),
|
||||
@@ -145,6 +147,7 @@ enum iwl_mac_data_policy {
|
||||
FLEXIBLE_TWT_SUPPORTED = BIT(2),
|
||||
PROTECTED_TWT_SUPPORTED = BIT(3),
|
||||
BROADCAST_TWT_SUPPORTED = BIT(4),
|
||||
COEX_HIGH_PRIORITY_ENABLE = BIT(5),
|
||||
};
|
||||
|
||||
/**
|
||||
|
||||
@@ -471,6 +471,29 @@ struct iwl_lari_config_change_cmd_v4 {
|
||||
__le32 oem_unii4_allow_bitmap;
|
||||
} __packed; /* LARI_CHANGE_CONF_CMD_S_VER_4 */
|
||||
|
||||
/**
|
||||
* struct iwl_lari_config_change_cmd_v5 - change LARI configuration
|
||||
* @config_bitmap: Bitmap of the config commands. Each bit will trigger a
|
||||
* different predefined FW config operation.
|
||||
* @oem_uhb_allow_bitmap: Bitmap of UHB enabled MCC sets.
|
||||
* @oem_11ax_allow_bitmap: Bitmap of 11ax allowed MCCs. There are two bits
|
||||
* per country, one to indicate whether to override and the other to
|
||||
* indicate the value to use.
|
||||
* @oem_unii4_allow_bitmap: Bitmap of unii4 allowed MCCs.There are two bits
|
||||
* per country, one to indicate whether to override and the other to
|
||||
* indicate allow/disallow unii4 channels.
|
||||
* @chan_state_active_bitmap: Bitmap for overriding channel state to active.
|
||||
* Each bit represents a country or region to activate, according to the BIOS
|
||||
* definitions.
|
||||
*/
|
||||
struct iwl_lari_config_change_cmd_v5 {
|
||||
__le32 config_bitmap;
|
||||
__le32 oem_uhb_allow_bitmap;
|
||||
__le32 oem_11ax_allow_bitmap;
|
||||
__le32 oem_unii4_allow_bitmap;
|
||||
__le32 chan_state_active_bitmap;
|
||||
} __packed; /* LARI_CHANGE_CONF_CMD_S_VER_5 */
|
||||
|
||||
/**
|
||||
* struct iwl_pnvm_init_complete_ntfy - PNVM initialization complete
|
||||
* @status: PNVM image loading status
|
||||
|
||||
@@ -184,6 +184,14 @@ struct iwl_tlc_update_notif {
|
||||
__le32 amsdu_enabled;
|
||||
} __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */
|
||||
|
||||
|
||||
#define IWL_MAX_MCS_DISPLAY_SIZE 12
|
||||
|
||||
struct iwl_rate_mcs_info {
|
||||
char mbps[IWL_MAX_MCS_DISPLAY_SIZE];
|
||||
char mcs[IWL_MAX_MCS_DISPLAY_SIZE];
|
||||
};
|
||||
|
||||
/*
|
||||
* These serve as indexes into
|
||||
* struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT];
|
||||
@@ -226,6 +234,8 @@ enum {
|
||||
IWL_LAST_HE_RATE = IWL_RATE_MCS_11_INDEX,
|
||||
IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1,
|
||||
IWL_RATE_COUNT = IWL_LAST_HE_RATE + 1,
|
||||
IWL_RATE_INVM_INDEX = IWL_RATE_COUNT,
|
||||
IWL_RATE_INVALID = IWL_RATE_COUNT,
|
||||
};
|
||||
|
||||
#define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX)
|
||||
@@ -248,7 +258,7 @@ enum {
|
||||
};
|
||||
|
||||
/*
|
||||
* rate_n_flags bit fields
|
||||
* rate_n_flags bit fields version 1
|
||||
*
|
||||
* The 32-bit value has different layouts in the low 8 bites depending on the
|
||||
* format. There are three formats, HT, VHT and legacy (11abg, with subformats
|
||||
@@ -266,15 +276,15 @@ enum {
|
||||
|
||||
/* Bit 8: (1) HT format, (0) legacy or VHT format */
|
||||
#define RATE_MCS_HT_POS 8
|
||||
#define RATE_MCS_HT_MSK (1 << RATE_MCS_HT_POS)
|
||||
#define RATE_MCS_HT_MSK_V1 BIT(RATE_MCS_HT_POS)
|
||||
|
||||
/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
|
||||
#define RATE_MCS_CCK_POS 9
|
||||
#define RATE_MCS_CCK_MSK (1 << RATE_MCS_CCK_POS)
|
||||
#define RATE_MCS_CCK_POS_V1 9
|
||||
#define RATE_MCS_CCK_MSK_V1 BIT(RATE_MCS_CCK_POS_V1)
|
||||
|
||||
/* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */
|
||||
#define RATE_MCS_VHT_POS 26
|
||||
#define RATE_MCS_VHT_MSK (1 << RATE_MCS_VHT_POS)
|
||||
#define RATE_MCS_VHT_POS_V1 26
|
||||
#define RATE_MCS_VHT_MSK_V1 BIT(RATE_MCS_VHT_POS_V1)
|
||||
|
||||
|
||||
/*
|
||||
@@ -300,15 +310,16 @@ enum {
|
||||
* streams and 16-23 have three streams. We could also support MCS 32
|
||||
* which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
|
||||
*/
|
||||
#define RATE_HT_MCS_RATE_CODE_MSK 0x7
|
||||
#define RATE_HT_MCS_NSS_POS 3
|
||||
#define RATE_HT_MCS_NSS_MSK (3 << RATE_HT_MCS_NSS_POS)
|
||||
#define RATE_HT_MCS_RATE_CODE_MSK_V1 0x7
|
||||
#define RATE_HT_MCS_NSS_POS_V1 3
|
||||
#define RATE_HT_MCS_NSS_MSK_V1 (3 << RATE_HT_MCS_NSS_POS_V1)
|
||||
#define RATE_HT_MCS_MIMO2_MSK BIT(RATE_HT_MCS_NSS_POS_V1)
|
||||
|
||||
/* Bit 10: (1) Use Green Field preamble */
|
||||
#define RATE_HT_MCS_GF_POS 10
|
||||
#define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS)
|
||||
|
||||
#define RATE_HT_MCS_INDEX_MSK 0x3f
|
||||
#define RATE_HT_MCS_INDEX_MSK_V1 0x3f
|
||||
|
||||
/*
|
||||
* Very High-throughput (VHT) rate format for bits 7:0
|
||||
@@ -324,6 +335,7 @@ enum {
|
||||
#define RATE_VHT_MCS_RATE_CODE_MSK 0xf
|
||||
#define RATE_VHT_MCS_NSS_POS 4
|
||||
#define RATE_VHT_MCS_NSS_MSK (3 << RATE_VHT_MCS_NSS_POS)
|
||||
#define RATE_VHT_MCS_MIMO2_MSK BIT(RATE_VHT_MCS_NSS_POS)
|
||||
|
||||
/*
|
||||
* Legacy OFDM rate format for bits 7:0
|
||||
@@ -347,37 +359,30 @@ enum {
|
||||
* 110) 11 Mbps
|
||||
* (bit 7 is 0)
|
||||
*/
|
||||
#define RATE_LEGACY_RATE_MSK 0xff
|
||||
#define RATE_LEGACY_RATE_MSK_V1 0xff
|
||||
|
||||
/* Bit 10 - OFDM HE */
|
||||
#define RATE_MCS_HE_POS 10
|
||||
#define RATE_MCS_HE_MSK BIT(RATE_MCS_HE_POS)
|
||||
#define RATE_MCS_HE_POS_V1 10
|
||||
#define RATE_MCS_HE_MSK_V1 BIT(RATE_MCS_HE_POS_V1)
|
||||
|
||||
/*
|
||||
* Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
|
||||
* 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
|
||||
*/
|
||||
#define RATE_MCS_CHAN_WIDTH_POS 11
|
||||
#define RATE_MCS_CHAN_WIDTH_MSK (3 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
#define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
#define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
#define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
#define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
#define RATE_MCS_CHAN_WIDTH_MSK_V1 (3 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
|
||||
/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
|
||||
#define RATE_MCS_SGI_POS 13
|
||||
#define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS)
|
||||
#define RATE_MCS_SGI_POS_V1 13
|
||||
#define RATE_MCS_SGI_MSK_V1 BIT(RATE_MCS_SGI_POS_V1)
|
||||
|
||||
/* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */
|
||||
#define RATE_MCS_ANT_POS 14
|
||||
#define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS)
|
||||
#define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS)
|
||||
#define RATE_MCS_ANT_C_MSK (4 << RATE_MCS_ANT_POS)
|
||||
#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | \
|
||||
RATE_MCS_ANT_B_MSK)
|
||||
#define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | \
|
||||
RATE_MCS_ANT_C_MSK)
|
||||
#define RATE_MCS_ANT_MSK RATE_MCS_ANT_ABC_MSK
|
||||
#define RATE_MCS_ANT_MSK RATE_MCS_ANT_AB_MSK
|
||||
|
||||
/* Bit 17: (0) SS, (1) SS*2 */
|
||||
#define RATE_MCS_STBC_POS 17
|
||||
@@ -411,27 +416,27 @@ enum {
|
||||
* 3 (does not occur)
|
||||
*/
|
||||
#define RATE_MCS_HE_GI_LTF_POS 20
|
||||
#define RATE_MCS_HE_GI_LTF_MSK (3 << RATE_MCS_HE_GI_LTF_POS)
|
||||
#define RATE_MCS_HE_GI_LTF_MSK_V1 (3 << RATE_MCS_HE_GI_LTF_POS)
|
||||
|
||||
/* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
|
||||
#define RATE_MCS_HE_TYPE_POS 22
|
||||
#define RATE_MCS_HE_TYPE_SU (0 << RATE_MCS_HE_TYPE_POS)
|
||||
#define RATE_MCS_HE_TYPE_EXT_SU (1 << RATE_MCS_HE_TYPE_POS)
|
||||
#define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS)
|
||||
#define RATE_MCS_HE_TYPE_TRIG (3 << RATE_MCS_HE_TYPE_POS)
|
||||
#define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS)
|
||||
#define RATE_MCS_HE_TYPE_POS_V1 22
|
||||
#define RATE_MCS_HE_TYPE_SU_V1 (0 << RATE_MCS_HE_TYPE_POS_V1)
|
||||
#define RATE_MCS_HE_TYPE_EXT_SU_V1 BIT(RATE_MCS_HE_TYPE_POS_V1)
|
||||
#define RATE_MCS_HE_TYPE_MU_V1 (2 << RATE_MCS_HE_TYPE_POS_V1)
|
||||
#define RATE_MCS_HE_TYPE_TRIG_V1 (3 << RATE_MCS_HE_TYPE_POS_V1)
|
||||
#define RATE_MCS_HE_TYPE_MSK_V1 (3 << RATE_MCS_HE_TYPE_POS_V1)
|
||||
|
||||
/* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */
|
||||
#define RATE_MCS_DUP_POS 24
|
||||
#define RATE_MCS_DUP_MSK (3 << RATE_MCS_DUP_POS)
|
||||
#define RATE_MCS_DUP_POS_V1 24
|
||||
#define RATE_MCS_DUP_MSK_V1 (3 << RATE_MCS_DUP_POS_V1)
|
||||
|
||||
/* Bit 27: (1) LDPC enabled, (0) LDPC disabled */
|
||||
#define RATE_MCS_LDPC_POS 27
|
||||
#define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS)
|
||||
#define RATE_MCS_LDPC_POS_V1 27
|
||||
#define RATE_MCS_LDPC_MSK_V1 BIT(RATE_MCS_LDPC_POS_V1)
|
||||
|
||||
/* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */
|
||||
#define RATE_MCS_HE_106T_POS 28
|
||||
#define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS)
|
||||
#define RATE_MCS_HE_106T_POS_V1 28
|
||||
#define RATE_MCS_HE_106T_MSK_V1 BIT(RATE_MCS_HE_106T_POS_V1)
|
||||
|
||||
/* Bit 30-31: (1) RTS, (2) CTS */
|
||||
#define RATE_MCS_RTS_REQUIRED_POS (30)
|
||||
@@ -440,6 +445,152 @@ enum {
|
||||
#define RATE_MCS_CTS_REQUIRED_POS (31)
|
||||
#define RATE_MCS_CTS_REQUIRED_MSK (0x1 << RATE_MCS_CTS_REQUIRED_POS)
|
||||
|
||||
/* rate_n_flags bit field version 2
|
||||
*
|
||||
* The 32-bit value has different layouts in the low 8 bits depending on the
|
||||
* format. There are three formats, HT, VHT and legacy (11abg, with subformats
|
||||
* for CCK and OFDM).
|
||||
*
|
||||
*/
|
||||
|
||||
/* Bits 10-8: rate format
|
||||
* (0) Legacy CCK (1) Legacy OFDM (2) High-throughput (HT)
|
||||
* (3) Very High-throughput (VHT) (4) High-efficiency (HE)
|
||||
* (5) Extremely High-throughput (EHT)
|
||||
*/
|
||||
#define RATE_MCS_MOD_TYPE_POS 8
|
||||
#define RATE_MCS_MOD_TYPE_MSK (0x7 << RATE_MCS_MOD_TYPE_POS)
|
||||
#define RATE_MCS_CCK_MSK (0 << RATE_MCS_MOD_TYPE_POS)
|
||||
#define RATE_MCS_LEGACY_OFDM_MSK (1 << RATE_MCS_MOD_TYPE_POS)
|
||||
#define RATE_MCS_HT_MSK (2 << RATE_MCS_MOD_TYPE_POS)
|
||||
#define RATE_MCS_VHT_MSK (3 << RATE_MCS_MOD_TYPE_POS)
|
||||
#define RATE_MCS_HE_MSK (4 << RATE_MCS_MOD_TYPE_POS)
|
||||
#define RATE_MCS_EHT_MSK (5 << RATE_MCS_MOD_TYPE_POS)
|
||||
|
||||
/*
|
||||
* Legacy CCK rate format for bits 0:3:
|
||||
*
|
||||
* (0) 0xa - 1 Mbps
|
||||
* (1) 0x14 - 2 Mbps
|
||||
* (2) 0x37 - 5.5 Mbps
|
||||
* (3) 0x6e - 11 nbps
|
||||
*
|
||||
* Legacy OFDM rate format for bis 3:0:
|
||||
*
|
||||
* (0) 6 Mbps
|
||||
* (1) 9 Mbps
|
||||
* (2) 12 Mbps
|
||||
* (3) 18 Mbps
|
||||
* (4) 24 Mbps
|
||||
* (5) 36 Mbps
|
||||
* (6) 48 Mbps
|
||||
* (7) 54 Mbps
|
||||
*
|
||||
*/
|
||||
#define RATE_LEGACY_RATE_MSK 0x7
|
||||
|
||||
/*
|
||||
* HT, VHT, HE, EHT rate format for bits 3:0
|
||||
* 3-0: MCS
|
||||
*
|
||||
*/
|
||||
#define RATE_HT_MCS_CODE_MSK 0x7
|
||||
#define RATE_MCS_NSS_POS 4
|
||||
#define RATE_MCS_NSS_MSK (1 << RATE_MCS_NSS_POS)
|
||||
#define RATE_MCS_CODE_MSK 0xf
|
||||
#define RATE_HT_MCS_INDEX(r) ((((r) & RATE_MCS_NSS_MSK) >> 1) | \
|
||||
((r) & RATE_HT_MCS_CODE_MSK))
|
||||
|
||||
/* Bits 7-5: reserved */
|
||||
|
||||
/*
|
||||
* Bits 13-11: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz, (4) 320MHz
|
||||
*/
|
||||
#define RATE_MCS_CHAN_WIDTH_MSK (0x7 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
#define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
#define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
#define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
#define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
#define RATE_MCS_CHAN_WIDTH_320 (4 << RATE_MCS_CHAN_WIDTH_POS)
|
||||
|
||||
/* Bit 15-14: Antenna selection:
|
||||
* Bit 14: Ant A active
|
||||
* Bit 15: Ant B active
|
||||
*
|
||||
* All relevant definitions are same as in v1
|
||||
*/
|
||||
|
||||
/* Bit 16 (1) LDPC enables, (0) LDPC disabled */
|
||||
#define RATE_MCS_LDPC_POS 16
|
||||
#define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS)
|
||||
|
||||
/* Bit 17: (0) SS, (1) SS*2 (same as v1) */
|
||||
|
||||
/* Bit 18: OFDM-HE dual carrier mode (same as v1) */
|
||||
|
||||
/* Bit 19: (0) Beamforming is off, (1) Beamforming is on (same as v1) */
|
||||
|
||||
/*
|
||||
* Bit 22-20: HE LTF type and guard interval
|
||||
* CCK:
|
||||
* 0 long preamble
|
||||
* 1 short preamble
|
||||
* HT/VHT:
|
||||
* 0 0.8us
|
||||
* 1 0.4us
|
||||
* HE (ext) SU:
|
||||
* 0 1xLTF+0.8us
|
||||
* 1 2xLTF+0.8us
|
||||
* 2 2xLTF+1.6us
|
||||
* 3 4xLTF+3.2us
|
||||
* 4 4xLTF+0.8us
|
||||
* HE MU:
|
||||
* 0 4xLTF+0.8us
|
||||
* 1 2xLTF+0.8us
|
||||
* 2 2xLTF+1.6us
|
||||
* 3 4xLTF+3.2us
|
||||
* HE TRIG:
|
||||
* 0 1xLTF+1.6us
|
||||
* 1 2xLTF+1.6us
|
||||
* 2 4xLTF+3.2us
|
||||
* */
|
||||
#define RATE_MCS_HE_GI_LTF_MSK (0x7 << RATE_MCS_HE_GI_LTF_POS)
|
||||
#define RATE_MCS_SGI_POS RATE_MCS_HE_GI_LTF_POS
|
||||
#define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS)
|
||||
#define RATE_MCS_HE_SU_4_LTF 3
|
||||
#define RATE_MCS_HE_SU_4_LTF_08_GI 4
|
||||
|
||||
/* Bit 24-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
|
||||
#define RATE_MCS_HE_TYPE_POS 23
|
||||
#define RATE_MCS_HE_TYPE_SU (0 << RATE_MCS_HE_TYPE_POS)
|
||||
#define RATE_MCS_HE_TYPE_EXT_SU (1 << RATE_MCS_HE_TYPE_POS)
|
||||
#define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS)
|
||||
#define RATE_MCS_HE_TYPE_TRIG (3 << RATE_MCS_HE_TYPE_POS)
|
||||
#define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS)
|
||||
|
||||
/* Bit 25: duplicate channel enabled
|
||||
*
|
||||
* if this bit is set, duplicate is according to BW (bits 11-13):
|
||||
*
|
||||
* CCK: 2x 20MHz
|
||||
* OFDM Legacy: N x 20Mhz, (N = BW \ 2 , either 2, 4, 8, 16)
|
||||
* EHT: 2 x BW/2, (80 - 2x40, 160 - 2x80, 320 - 2x160)
|
||||
* */
|
||||
#define RATE_MCS_DUP_POS 25
|
||||
#define RATE_MCS_DUP_MSK (1 << RATE_MCS_DUP_POS)
|
||||
|
||||
/* Bit 26: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */
|
||||
#define RATE_MCS_HE_106T_POS 26
|
||||
#define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS)
|
||||
|
||||
/* Bit 27: EHT extra LTF:
|
||||
* instead of 1 LTF for SISO use 2 LTFs,
|
||||
* instead of 2 LTFs for NSTS=2 use 4 LTFs*/
|
||||
#define RATE_MCS_EHT_EXTRA_LTF_POS 27
|
||||
#define RATE_MCS_EHT_EXTRA_LTF_MSK (1 << RATE_MCS_EHT_EXTRA_LTF_POS)
|
||||
|
||||
/* Bit 31-28: reserved */
|
||||
|
||||
/* Link Quality definitions */
|
||||
|
||||
/* # entries in rate scale table to support Tx retries */
|
||||
@@ -557,4 +708,13 @@ struct iwl_lq_cmd {
|
||||
__le32 ss_params;
|
||||
}; /* LINK_QUALITY_CMD_API_S_VER_1 */
|
||||
|
||||
u8 iwl_fw_rate_idx_to_plcp(int idx);
|
||||
u32 iwl_new_rate_from_v1(u32 rate_v1);
|
||||
u32 iwl_legacy_rate_to_fw_idx(u32 rate_n_flags);
|
||||
const struct iwl_rate_mcs_info *iwl_rate_mcs(int idx);
|
||||
const char *iwl_rs_pretty_ant(u8 ant);
|
||||
const char *iwl_rs_pretty_bw(int bw);
|
||||
int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate);
|
||||
bool iwl_he_is_sgi(u32 rate_n_flags);
|
||||
|
||||
#endif /* __iwl_fw_api_rs_h__ */
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
|
||||
/*
|
||||
* Copyright (C) 2012-2014, 2018-2020 Intel Corporation
|
||||
* Copyright (C) 2012-2014, 2018-2021 Intel Corporation
|
||||
* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
|
||||
* Copyright (C) 2015-2017 Intel Deutschland GmbH
|
||||
*/
|
||||
@@ -13,7 +13,6 @@
|
||||
#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
|
||||
#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
|
||||
#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
|
||||
#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
|
||||
#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
|
||||
#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
|
||||
#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
|
||||
@@ -126,14 +125,12 @@ enum iwl_rx_phy_flags {
|
||||
* @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
|
||||
* @RX_MPDU_RES_STATUS_SRC_STA_FOUND: station was found
|
||||
* @RX_MPDU_RES_STATUS_KEY_VALID: key was valid
|
||||
* @RX_MPDU_RES_STATUS_KEY_PARAM_OK: key parameters were usable
|
||||
* @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
|
||||
* @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
|
||||
* in the driver.
|
||||
* @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
|
||||
* @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
|
||||
* alg = CCM only. Checks replay attack for 11w frames. Relevant only if
|
||||
* %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
|
||||
* alg = CCM only. Checks replay attack for 11w frames.
|
||||
* @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
|
||||
* @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
|
||||
* @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
|
||||
@@ -145,9 +142,6 @@ enum iwl_rx_phy_flags {
|
||||
* @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
|
||||
* @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
|
||||
* @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
|
||||
* @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP: extended IV (set with TKIP)
|
||||
* @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT: key ID comparison done
|
||||
* @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
|
||||
* @RX_MPDU_RES_STATUS_CSUM_DONE: checksum was done by the hw
|
||||
* @RX_MPDU_RES_STATUS_CSUM_OK: checksum found no errors
|
||||
* @RX_MPDU_RES_STATUS_STA_ID_MSK: station ID mask
|
||||
@@ -158,7 +152,6 @@ enum iwl_mvm_rx_status {
|
||||
RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
|
||||
RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
|
||||
RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
|
||||
RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
|
||||
RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
|
||||
RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
|
||||
RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
|
||||
@@ -172,9 +165,6 @@ enum iwl_mvm_rx_status {
|
||||
RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
|
||||
RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
|
||||
RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
|
||||
RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
|
||||
RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
|
||||
RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
|
||||
RX_MPDU_RES_STATUS_CSUM_DONE = BIT(16),
|
||||
RX_MPDU_RES_STATUS_CSUM_OK = BIT(17),
|
||||
RX_MDPU_RES_STATUS_STA_ID_SHIFT = 24,
|
||||
@@ -236,7 +226,6 @@ enum iwl_rx_mpdu_status {
|
||||
IWL_RX_MPDU_STATUS_OVERRUN_OK = BIT(1),
|
||||
IWL_RX_MPDU_STATUS_SRC_STA_FOUND = BIT(2),
|
||||
IWL_RX_MPDU_STATUS_KEY_VALID = BIT(3),
|
||||
IWL_RX_MPDU_STATUS_KEY_PARAM_OK = BIT(4),
|
||||
IWL_RX_MPDU_STATUS_ICV_OK = BIT(5),
|
||||
IWL_RX_MPDU_STATUS_MIC_OK = BIT(6),
|
||||
IWL_RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
|
||||
@@ -251,12 +240,8 @@ enum iwl_rx_mpdu_status {
|
||||
IWL_RX_MPDU_STATUS_SEC_EXT_ENC = 0x4 << 8,
|
||||
IWL_RX_MPDU_STATUS_SEC_GCM = 0x5 << 8,
|
||||
IWL_RX_MPDU_STATUS_DECRYPTED = BIT(11),
|
||||
IWL_RX_MPDU_STATUS_WEP_MATCH = BIT(12),
|
||||
IWL_RX_MPDU_STATUS_EXT_IV_MATCH = BIT(13),
|
||||
IWL_RX_MPDU_STATUS_KEY_ID_MATCH = BIT(14),
|
||||
IWL_RX_MPDU_STATUS_ROBUST_MNG_FRAME = BIT(15),
|
||||
|
||||
IWL_RX_MPDU_STATUS_KEY = 0x3f0000,
|
||||
IWL_RX_MPDU_STATUS_DUPLICATE = BIT(22),
|
||||
|
||||
IWL_RX_MPDU_STATUS_STA_ID = 0x1f000000,
|
||||
@@ -460,7 +445,7 @@ struct iwl_rx_mpdu_desc_v1 {
|
||||
__le32 phy_data1;
|
||||
};
|
||||
};
|
||||
} __packed;
|
||||
} __packed; /* RX_MPDU_RES_START_API_S_VER_4 */
|
||||
|
||||
/**
|
||||
* struct iwl_rx_mpdu_desc_v3 - RX MPDU descriptor
|
||||
@@ -560,7 +545,8 @@ struct iwl_rx_mpdu_desc_v3 {
|
||||
* @reserved: reserved
|
||||
*/
|
||||
__le32 reserved[2];
|
||||
} __packed; /* RX_MPDU_RES_START_API_S_VER_3 */
|
||||
} __packed; /* RX_MPDU_RES_START_API_S_VER_3,
|
||||
RX_MPDU_RES_START_API_S_VER_5 */
|
||||
|
||||
/**
|
||||
* struct iwl_rx_mpdu_desc - RX MPDU descriptor
|
||||
@@ -625,7 +611,9 @@ struct iwl_rx_mpdu_desc {
|
||||
struct iwl_rx_mpdu_desc_v1 v1;
|
||||
struct iwl_rx_mpdu_desc_v3 v3;
|
||||
};
|
||||
} __packed; /* RX_MPDU_RES_START_API_S_VER_3 */
|
||||
} __packed; /* RX_MPDU_RES_START_API_S_VER_3,
|
||||
RX_MPDU_RES_START_API_S_VER_4,
|
||||
RX_MPDU_RES_START_API_S_VER_5 */
|
||||
|
||||
#define IWL_RX_DESC_SIZE_V1 offsetofend(struct iwl_rx_mpdu_desc, v1)
|
||||
|
||||
@@ -679,7 +667,8 @@ struct iwl_rx_no_data {
|
||||
__le32 rate;
|
||||
__le32 phy_info[2];
|
||||
__le32 rx_vec[2];
|
||||
} __packed; /* RX_NO_DATA_NTFY_API_S_VER_1 */
|
||||
} __packed; /* RX_NO_DATA_NTFY_API_S_VER_1,
|
||||
TX_NO_DATA_NTFY_API_S_VER_2 */
|
||||
|
||||
struct iwl_frame_release {
|
||||
u8 baid;
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
|
||||
/*
|
||||
* Copyright (C) 2012-2014, 2018-2020 Intel Corporation
|
||||
* Copyright (C) 2012-2014, 2018-2021 Intel Corporation
|
||||
* Copyright (C) 2016-2017 Intel Deutschland GmbH
|
||||
*/
|
||||
#ifndef __iwl_fw_api_tx_h__
|
||||
@@ -81,6 +81,10 @@ enum iwl_tx_cmd_flags {
|
||||
IWL_TX_FLAGS_CMD_RATE = BIT(0),
|
||||
IWL_TX_FLAGS_ENCRYPT_DIS = BIT(1),
|
||||
IWL_TX_FLAGS_HIGH_PRI = BIT(2),
|
||||
/* Use these flags only from
|
||||
* TX_FLAGS_BITS_API_S_VER_4 and above */
|
||||
IWL_TX_FLAGS_RTS = BIT(3),
|
||||
IWL_TX_FLAGS_CTS = BIT(4),
|
||||
}; /* TX_FLAGS_BITS_API_S_VER_3 */
|
||||
|
||||
/**
|
||||
@@ -267,7 +271,8 @@ struct iwl_tx_cmd_gen2 {
|
||||
struct iwl_dram_sec_info dram_info;
|
||||
__le32 rate_n_flags;
|
||||
struct ieee80211_hdr hdr[];
|
||||
} __packed; /* TX_CMD_API_S_VER_7 */
|
||||
} __packed; /* TX_CMD_API_S_VER_7,
|
||||
TX_CMD_API_S_VER_9 */
|
||||
|
||||
/**
|
||||
* struct iwl_tx_cmd_gen3 - TX command struct to FW for AX210+ devices
|
||||
@@ -290,7 +295,8 @@ struct iwl_tx_cmd_gen3 {
|
||||
__le32 rate_n_flags;
|
||||
__le64 ttl;
|
||||
struct ieee80211_hdr hdr[];
|
||||
} __packed; /* TX_CMD_API_S_VER_8 */
|
||||
} __packed; /* TX_CMD_API_S_VER_8,
|
||||
TX_CMD_API_S_VER_10 */
|
||||
|
||||
/*
|
||||
* TX response related data
|
||||
@@ -591,7 +597,8 @@ struct iwl_mvm_tx_resp {
|
||||
__le16 tx_queue;
|
||||
__le16 reserved2;
|
||||
struct agg_tx_status status;
|
||||
} __packed; /* TX_RSP_API_S_VER_6 */
|
||||
} __packed; /* TX_RSP_API_S_VER_6,
|
||||
TX_RSP_API_S_VER_7 */
|
||||
|
||||
/**
|
||||
* struct iwl_mvm_ba_notif - notifies about reception of BA
|
||||
@@ -715,7 +722,8 @@ struct iwl_mvm_compressed_ba_notif {
|
||||
__le16 ra_tid_cnt;
|
||||
struct iwl_mvm_compressed_ba_ratid ra_tid[0];
|
||||
struct iwl_mvm_compressed_ba_tfd tfd[];
|
||||
} __packed; /* COMPRESSED_BA_RES_API_S_VER_4 */
|
||||
} __packed; /* COMPRESSED_BA_RES_API_S_VER_4,
|
||||
COMPRESSED_BA_RES_API_S_VER_5 */
|
||||
|
||||
/**
|
||||
* struct iwl_mac_beacon_cmd_v6 - beacon template command
|
||||
@@ -755,12 +763,20 @@ struct iwl_mac_beacon_cmd_v7 {
|
||||
struct ieee80211_hdr frame[];
|
||||
} __packed; /* BEACON_TEMPLATE_CMD_API_S_VER_7 */
|
||||
|
||||
/* Bit flags for BEACON_TEMPLATE_CMD_API until version 10 */
|
||||
enum iwl_mac_beacon_flags_v1 {
|
||||
IWL_MAC_BEACON_CCK_V1 = BIT(8),
|
||||
IWL_MAC_BEACON_ANT_A_V1 = BIT(9),
|
||||
IWL_MAC_BEACON_ANT_B_V1 = BIT(10),
|
||||
IWL_MAC_BEACON_FILS_V1 = BIT(12),
|
||||
};
|
||||
|
||||
/* Bit flags for BEACON_TEMPLATE_CMD_API version 11 and above */
|
||||
enum iwl_mac_beacon_flags {
|
||||
IWL_MAC_BEACON_CCK = BIT(8),
|
||||
IWL_MAC_BEACON_ANT_A = BIT(9),
|
||||
IWL_MAC_BEACON_ANT_B = BIT(10),
|
||||
IWL_MAC_BEACON_ANT_C = BIT(11),
|
||||
IWL_MAC_BEACON_FILS = BIT(12),
|
||||
IWL_MAC_BEACON_CCK = BIT(5),
|
||||
IWL_MAC_BEACON_ANT_A = BIT(6),
|
||||
IWL_MAC_BEACON_ANT_B = BIT(7),
|
||||
IWL_MAC_BEACON_FILS = BIT(8),
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -788,7 +804,9 @@ struct iwl_mac_beacon_cmd {
|
||||
__le32 ecsa_offset;
|
||||
__le32 csa_offset;
|
||||
struct ieee80211_hdr frame[];
|
||||
} __packed; /* BEACON_TEMPLATE_CMD_API_S_VER_10 */
|
||||
} __packed; /* BEACON_TEMPLATE_CMD_API_S_VER_10,
|
||||
BEACON_TEMPLATE_CMD_API_S_VER_11,
|
||||
BEACON_TEMPLATE_CMD_API_S_VER_12 */
|
||||
|
||||
struct iwl_beacon_notif {
|
||||
struct iwl_mvm_tx_resp beacon_notify_hdr;
|
||||
|
||||
@@ -159,11 +159,15 @@ static void iwl_fwrt_dump_txf(struct iwl_fw_runtime *fwrt,
|
||||
iwl_trans_read_prph(fwrt->trans, TXF_READ_MODIFY_DATA + offset);
|
||||
|
||||
/* Read FIFO */
|
||||
fifo_len /= sizeof(u32); /* Size in DWORDS */
|
||||
for (i = 0; i < fifo_len; i++)
|
||||
for (i = 0; i < fifo_len / sizeof(u32); i++)
|
||||
fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
|
||||
TXF_READ_MODIFY_DATA +
|
||||
offset);
|
||||
|
||||
if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_txf)
|
||||
fwrt->sanitize_ops->frob_txf(fwrt->sanitize_ctx,
|
||||
fifo_data, fifo_len);
|
||||
|
||||
*dump_data = iwl_fw_error_next_data(*dump_data);
|
||||
}
|
||||
|
||||
@@ -659,6 +663,10 @@ static void iwl_fw_dump_mem(struct iwl_fw_runtime *fwrt,
|
||||
iwl_trans_read_mem_bytes(fwrt->trans, ofs, dump_mem->data, len);
|
||||
*dump_data = iwl_fw_error_next_data(*dump_data);
|
||||
|
||||
if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
|
||||
fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx, ofs,
|
||||
dump_mem->data, len);
|
||||
|
||||
IWL_DEBUG_INFO(fwrt, "WRT memory dump. Type=%u\n", dump_mem->type);
|
||||
}
|
||||
|
||||
@@ -752,6 +760,12 @@ static void iwl_dump_paging(struct iwl_fw_runtime *fwrt,
|
||||
PAGING_BLOCK_SIZE,
|
||||
DMA_BIDIRECTIONAL);
|
||||
(*data) = iwl_fw_error_next_data(*data);
|
||||
|
||||
if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
|
||||
fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx,
|
||||
fwrt->fw_paging_db[i].fw_offs,
|
||||
paging->data,
|
||||
PAGING_BLOCK_SIZE);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -980,6 +994,11 @@ iwl_fw_error_dump_file(struct iwl_fw_runtime *fwrt,
|
||||
dump_data->data + data_size,
|
||||
data_size);
|
||||
|
||||
if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
|
||||
fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx, addr,
|
||||
dump_data->data + data_size,
|
||||
data_size);
|
||||
|
||||
dump_data = iwl_fw_error_next_data(dump_data);
|
||||
}
|
||||
|
||||
@@ -1146,6 +1165,13 @@ static int iwl_dump_ini_dev_mem_iter(struct iwl_fw_runtime *fwrt,
|
||||
iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
|
||||
le32_to_cpu(reg->dev_addr.size));
|
||||
|
||||
if ((le32_to_cpu(reg->id) & IWL_FW_INI_REGION_V2_MASK) ==
|
||||
IWL_FW_INI_HW_SMEM_REGION_ID &&
|
||||
fwrt->sanitize_ops && fwrt->sanitize_ops->frob_txf)
|
||||
fwrt->sanitize_ops->frob_txf(fwrt->sanitize_ctx,
|
||||
range->data,
|
||||
le32_to_cpu(reg->dev_addr.size));
|
||||
|
||||
return sizeof(*range) + le32_to_cpu(range->range_data_size);
|
||||
}
|
||||
|
||||
@@ -1338,6 +1364,10 @@ static int iwl_dump_ini_txf_iter(struct iwl_fw_runtime *fwrt,
|
||||
for (i = 0; i < iter->fifo_size; i += sizeof(*data))
|
||||
*data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
|
||||
|
||||
if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_txf)
|
||||
fwrt->sanitize_ops->frob_txf(fwrt->sanitize_ctx,
|
||||
reg_dump, iter->fifo_size);
|
||||
|
||||
out:
|
||||
iwl_trans_release_nic_access(fwrt->trans);
|
||||
|
||||
@@ -2077,7 +2107,7 @@ static u32 iwl_dump_ini_info(struct iwl_fw_runtime *fwrt,
|
||||
*/
|
||||
hw_type = CSR_HW_REV_TYPE(fwrt->trans->hw_rev);
|
||||
if (hw_type == IWL_AX210_HW_TYPE) {
|
||||
u32 prph_val = iwl_read_prph(fwrt->trans, WFPM_OTP_CFG1_ADDR);
|
||||
u32 prph_val = iwl_read_prph(fwrt->trans, WFPM_OTP_CFG1_ADDR_GEN2);
|
||||
u32 is_jacket = !!(prph_val & WFPM_OTP_CFG1_IS_JACKET_BIT);
|
||||
u32 is_cdb = !!(prph_val & WFPM_OTP_CFG1_IS_CDB_BIT);
|
||||
u32 masked_bits = is_jacket | (is_cdb << 1);
|
||||
@@ -2360,7 +2390,9 @@ static void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt,
|
||||
if (dump_data->monitor_only)
|
||||
dump_mask &= BIT(IWL_FW_ERROR_DUMP_FW_MONITOR);
|
||||
|
||||
fw_error_dump.trans_ptr = iwl_trans_dump_data(fwrt->trans, dump_mask);
|
||||
fw_error_dump.trans_ptr = iwl_trans_dump_data(fwrt->trans, dump_mask,
|
||||
fwrt->sanitize_ops,
|
||||
fwrt->sanitize_ctx);
|
||||
file_len = le32_to_cpu(dump_file->file_len);
|
||||
fw_error_dump.fwrt_len = file_len;
|
||||
|
||||
@@ -2788,6 +2820,12 @@ void iwl_fw_dbg_read_d3_debug_data(struct iwl_fw_runtime *fwrt)
|
||||
iwl_trans_read_mem_bytes(fwrt->trans, cfg->d3_debug_data_base_addr,
|
||||
fwrt->dump.d3_debug_data,
|
||||
cfg->d3_debug_data_length);
|
||||
|
||||
if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
|
||||
fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx,
|
||||
cfg->d3_debug_data_base_addr,
|
||||
fwrt->dump.d3_debug_data,
|
||||
cfg->d3_debug_data_length);
|
||||
}
|
||||
IWL_EXPORT_SYMBOL(iwl_fw_dbg_read_d3_debug_data);
|
||||
|
||||
|
||||
@@ -214,7 +214,7 @@ static void iwl_fwrt_dump_lmac_error_log(struct iwl_fw_runtime *fwrt, u8 lmac_nu
|
||||
/* reset the device */
|
||||
iwl_trans_sw_reset(trans);
|
||||
|
||||
err = iwl_finish_nic_init(trans, trans->trans_cfg);
|
||||
err = iwl_finish_nic_init(trans);
|
||||
if (err)
|
||||
return;
|
||||
}
|
||||
@@ -328,6 +328,13 @@ static void iwl_fwrt_dump_tcm_error_log(struct iwl_fw_runtime *fwrt)
|
||||
for (i = 0; i < ARRAY_SIZE(table.sw_status); i++)
|
||||
IWL_ERR(fwrt, "0x%08X | tcm SW status[%d]\n",
|
||||
table.sw_status[i], i);
|
||||
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
|
||||
u32 scratch = iwl_read32(trans, CSR_FUNC_SCRATCH);
|
||||
|
||||
IWL_ERR(fwrt, "Function Scratch status:\n");
|
||||
IWL_ERR(fwrt, "0x%08X | Func Scratch\n", scratch);
|
||||
}
|
||||
}
|
||||
|
||||
static void iwl_fwrt_dump_iml_error_log(struct iwl_fw_runtime *fwrt)
|
||||
|
||||
@@ -342,10 +342,6 @@ struct iwl_fw_ini_dump_cfg_name {
|
||||
#define IWL_AX210_HW_TYPE 0x42
|
||||
/* How many bits to roll when adding to the HW type of AX210 HW */
|
||||
#define IWL_AX210_HW_TYPE_ADDITION_SHIFT 12
|
||||
/* This prph is used to tell apart HW_TYPE == 0x42 NICs */
|
||||
#define WFPM_OTP_CFG1_ADDR 0xd03098
|
||||
#define WFPM_OTP_CFG1_IS_JACKET_BIT BIT(4)
|
||||
#define WFPM_OTP_CFG1_IS_CDB_BIT BIT(5)
|
||||
|
||||
/* struct iwl_fw_ini_dump_info - ini dump information
|
||||
* @version: dump version
|
||||
|
||||
@@ -100,6 +100,9 @@ enum iwl_ucode_tlv_type {
|
||||
IWL_UCODE_TLV_PNVM_SKU = 64,
|
||||
IWL_UCODE_TLV_TCM_DEBUG_ADDRS = 65,
|
||||
|
||||
IWL_UCODE_TLV_SEC_TABLE_ADDR = 66,
|
||||
IWL_UCODE_TLV_D3_KEK_KCK_ADDR = 67,
|
||||
|
||||
IWL_UCODE_TLV_FW_NUM_STATIONS = IWL_UCODE_TLV_CONST_BASE + 0,
|
||||
|
||||
IWL_UCODE_TLV_TYPE_DEBUG_INFO = IWL_UCODE_TLV_DEBUG_BASE + 0,
|
||||
@@ -107,6 +110,7 @@ enum iwl_ucode_tlv_type {
|
||||
IWL_UCODE_TLV_TYPE_HCMD = IWL_UCODE_TLV_DEBUG_BASE + 2,
|
||||
IWL_UCODE_TLV_TYPE_REGIONS = IWL_UCODE_TLV_DEBUG_BASE + 3,
|
||||
IWL_UCODE_TLV_TYPE_TRIGGERS = IWL_UCODE_TLV_DEBUG_BASE + 4,
|
||||
IWL_UCODE_TLV_TYPE_CONF_SET = IWL_UCODE_TLV_DEBUG_BASE + 5,
|
||||
IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
|
||||
|
||||
/* TLVs 0x1000-0x2000 are for internal driver usage */
|
||||
@@ -416,6 +420,7 @@ enum iwl_ucode_tlv_capa {
|
||||
IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)58,
|
||||
IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)59,
|
||||
IWL_UCODE_TLV_CAPA_BROADCAST_TWT = (__force iwl_ucode_tlv_capa_t)60,
|
||||
IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO = (__force iwl_ucode_tlv_capa_t)61,
|
||||
|
||||
/* set 2 */
|
||||
IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64,
|
||||
@@ -450,6 +455,7 @@ enum iwl_ucode_tlv_capa {
|
||||
|
||||
IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100,
|
||||
IWL_UCODE_TLV_CAPA_RFIM_SUPPORT = (__force iwl_ucode_tlv_capa_t)102,
|
||||
IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT = (__force iwl_ucode_tlv_capa_t)104,
|
||||
|
||||
#ifdef __CHECKER__
|
||||
/* sparse says it cannot increment the previous enum member */
|
||||
@@ -956,6 +962,10 @@ struct iwl_fw_tcm_error_addr {
|
||||
__le32 addr;
|
||||
}; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */
|
||||
|
||||
struct iwl_fw_dump_exclude {
|
||||
__le32 addr, size;
|
||||
};
|
||||
|
||||
static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
|
||||
size_t fixed_size, size_t var_size)
|
||||
{
|
||||
|
||||
@@ -1,59 +1,7 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright(c) 2019 - 2020 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called COPYING.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2019 - 2020 Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*****************************************************************************/
|
||||
*/
|
||||
|
||||
#include "img.h"
|
||||
|
||||
|
||||
@@ -124,11 +124,13 @@ struct fw_img {
|
||||
* @fw_paging_phys: page phy pointer
|
||||
* @fw_paging_block: pointer to the allocated block
|
||||
* @fw_paging_size: page size
|
||||
* @fw_offs: offset in the device
|
||||
*/
|
||||
struct iwl_fw_paging {
|
||||
dma_addr_t fw_paging_phys;
|
||||
struct page *fw_paging_block;
|
||||
u32 fw_paging_size;
|
||||
u32 fw_offs;
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -174,6 +176,10 @@ struct iwl_fw_dbg {
|
||||
u32 dump_mask;
|
||||
};
|
||||
|
||||
struct iwl_dump_exclude {
|
||||
u32 addr, size;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_fw - variables associated with the firmware
|
||||
*
|
||||
@@ -194,6 +200,10 @@ struct iwl_fw_dbg {
|
||||
* @cipher_scheme: optional external cipher scheme.
|
||||
* @human_readable: human readable version
|
||||
* we get the ALIVE from the uCode
|
||||
* @phy_integration_ver: PHY integration version string
|
||||
* @phy_integration_ver_len: length of @phy_integration_ver
|
||||
* @dump_excl: image dump exclusion areas for RT image
|
||||
* @dump_excl_wowlan: image dump exclusion areas for WoWLAN image
|
||||
*/
|
||||
struct iwl_fw {
|
||||
u32 ucode_ver;
|
||||
@@ -225,6 +235,8 @@ struct iwl_fw {
|
||||
|
||||
u8 *phy_integration_ver;
|
||||
u32 phy_integration_ver_len;
|
||||
|
||||
struct iwl_dump_exclude dump_excl[2], dump_excl_wowlan[2];
|
||||
};
|
||||
|
||||
static inline const char *get_fw_dbg_mode_string(int mode)
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright (C) 2017 Intel Deutschland GmbH
|
||||
* Copyright (C) 2019-2020 Intel Corporation
|
||||
* Copyright (C) 2019-2021 Intel Corporation
|
||||
*/
|
||||
#include "iwl-drv.h"
|
||||
#include "runtime.h"
|
||||
@@ -16,6 +16,8 @@
|
||||
void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt, struct iwl_trans *trans,
|
||||
const struct iwl_fw *fw,
|
||||
const struct iwl_fw_runtime_ops *ops, void *ops_ctx,
|
||||
const struct iwl_dump_sanitize_ops *sanitize_ops,
|
||||
void *sanitize_ctx,
|
||||
struct dentry *dbgfs_dir)
|
||||
{
|
||||
int i;
|
||||
@@ -26,6 +28,8 @@ void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt, struct iwl_trans *trans,
|
||||
fwrt->dev = trans->dev;
|
||||
fwrt->dump.conf = FW_DBG_INVALID;
|
||||
fwrt->ops = ops;
|
||||
fwrt->sanitize_ops = sanitize_ops;
|
||||
fwrt->sanitize_ctx = sanitize_ctx;
|
||||
fwrt->ops_ctx = ops_ctx;
|
||||
for (i = 0; i < IWL_FW_RUNTIME_DUMP_WK_NUM; i++) {
|
||||
fwrt->dump.wks[i].idx = i;
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright (C) 2012-2014, 2018-2019 Intel Corporation
|
||||
* Copyright (C) 2012-2014, 2018-2019, 2021 Intel Corporation
|
||||
* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
|
||||
* Copyright (C) 2016-2017 Intel Deutschland GmbH
|
||||
*/
|
||||
@@ -152,6 +152,7 @@ static int iwl_fill_paging_mem(struct iwl_fw_runtime *fwrt,
|
||||
memcpy(page_address(fwrt->fw_paging_db[0].fw_paging_block),
|
||||
image->sec[sec_idx].data,
|
||||
image->sec[sec_idx].len);
|
||||
fwrt->fw_paging_db[0].fw_offs = image->sec[sec_idx].offset;
|
||||
dma_sync_single_for_device(fwrt->trans->dev,
|
||||
fwrt->fw_paging_db[0].fw_paging_phys,
|
||||
fwrt->fw_paging_db[0].fw_paging_size,
|
||||
@@ -197,6 +198,7 @@ static int iwl_fill_paging_mem(struct iwl_fw_runtime *fwrt,
|
||||
|
||||
memcpy(page_address(block->fw_paging_block),
|
||||
image->sec[sec_idx].data + offset, len);
|
||||
block->fw_offs = image->sec[sec_idx].offset + offset;
|
||||
dma_sync_single_for_device(fwrt->trans->dev,
|
||||
block->fw_paging_phys,
|
||||
block->fw_paging_size,
|
||||
|
||||
@@ -162,7 +162,7 @@ done:
|
||||
goto out;
|
||||
}
|
||||
|
||||
IWL_INFO(trans, "loaded PNVM version 0x%0x\n", sha1);
|
||||
IWL_INFO(trans, "loaded PNVM version %08x\n", sha1);
|
||||
|
||||
ret = iwl_trans_set_pnvm(trans, pnvm_data, size);
|
||||
out:
|
||||
|
||||
252
drivers/net/wireless/intel/iwlwifi/fw/rs.c
Normal file
252
drivers/net/wireless/intel/iwlwifi/fw/rs.c
Normal file
@@ -0,0 +1,252 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright (C) 2021 Intel Corporation
|
||||
*/
|
||||
|
||||
#include <net/mac80211.h>
|
||||
#include "fw/api/rs.h"
|
||||
#include "iwl-drv.h"
|
||||
#include "iwl-config.h"
|
||||
|
||||
#define IWL_DECLARE_RATE_INFO(r) \
|
||||
[IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
|
||||
|
||||
/*
|
||||
* Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
|
||||
* */
|
||||
static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
|
||||
IWL_DECLARE_RATE_INFO(1),
|
||||
IWL_DECLARE_RATE_INFO(2),
|
||||
IWL_DECLARE_RATE_INFO(5),
|
||||
IWL_DECLARE_RATE_INFO(11),
|
||||
IWL_DECLARE_RATE_INFO(6),
|
||||
IWL_DECLARE_RATE_INFO(9),
|
||||
IWL_DECLARE_RATE_INFO(12),
|
||||
IWL_DECLARE_RATE_INFO(18),
|
||||
IWL_DECLARE_RATE_INFO(24),
|
||||
IWL_DECLARE_RATE_INFO(36),
|
||||
IWL_DECLARE_RATE_INFO(48),
|
||||
IWL_DECLARE_RATE_INFO(54),
|
||||
};
|
||||
|
||||
/* mbps, mcs */
|
||||
static const struct iwl_rate_mcs_info rate_mcs[IWL_RATE_COUNT] = {
|
||||
{ "1", "BPSK DSSS"},
|
||||
{ "2", "QPSK DSSS"},
|
||||
{"5.5", "BPSK CCK"},
|
||||
{ "11", "QPSK CCK"},
|
||||
{ "6", "BPSK 1/2"},
|
||||
{ "9", "BPSK 1/2"},
|
||||
{ "12", "QPSK 1/2"},
|
||||
{ "18", "QPSK 3/4"},
|
||||
{ "24", "16QAM 1/2"},
|
||||
{ "36", "16QAM 3/4"},
|
||||
{ "48", "64QAM 2/3"},
|
||||
{ "54", "64QAM 3/4"},
|
||||
{ "60", "64QAM 5/6"},
|
||||
};
|
||||
|
||||
static const char * const ant_name[] = {
|
||||
[ANT_NONE] = "None",
|
||||
[ANT_A] = "A",
|
||||
[ANT_B] = "B",
|
||||
[ANT_AB] = "AB",
|
||||
};
|
||||
|
||||
static const char * const pretty_bw[] = {
|
||||
"20Mhz",
|
||||
"40Mhz",
|
||||
"80Mhz",
|
||||
"160 Mhz",
|
||||
"320Mhz",
|
||||
};
|
||||
|
||||
u8 iwl_fw_rate_idx_to_plcp(int idx)
|
||||
{
|
||||
return fw_rate_idx_to_plcp[idx];
|
||||
}
|
||||
IWL_EXPORT_SYMBOL(iwl_fw_rate_idx_to_plcp);
|
||||
|
||||
const struct iwl_rate_mcs_info *iwl_rate_mcs(int idx)
|
||||
{
|
||||
return &rate_mcs[idx];
|
||||
}
|
||||
IWL_EXPORT_SYMBOL(iwl_rate_mcs);
|
||||
|
||||
const char *iwl_rs_pretty_ant(u8 ant)
|
||||
{
|
||||
if (ant >= ARRAY_SIZE(ant_name))
|
||||
return "UNKNOWN";
|
||||
|
||||
return ant_name[ant];
|
||||
}
|
||||
IWL_EXPORT_SYMBOL(iwl_rs_pretty_ant);
|
||||
|
||||
const char *iwl_rs_pretty_bw(int bw)
|
||||
{
|
||||
if (bw >= ARRAY_SIZE(pretty_bw))
|
||||
return "unknown bw";
|
||||
|
||||
return pretty_bw[bw];
|
||||
}
|
||||
IWL_EXPORT_SYMBOL(iwl_rs_pretty_bw);
|
||||
|
||||
u32 iwl_new_rate_from_v1(u32 rate_v1)
|
||||
{
|
||||
u32 rate_v2 = 0;
|
||||
u32 dup = 0;
|
||||
|
||||
if (rate_v1 == 0)
|
||||
return rate_v1;
|
||||
/* convert rate */
|
||||
if (rate_v1 & RATE_MCS_HT_MSK_V1) {
|
||||
u32 nss = 0;
|
||||
|
||||
rate_v2 |= RATE_MCS_HT_MSK;
|
||||
rate_v2 |=
|
||||
rate_v1 & RATE_HT_MCS_RATE_CODE_MSK_V1;
|
||||
nss = (rate_v1 & RATE_HT_MCS_MIMO2_MSK) >>
|
||||
RATE_HT_MCS_NSS_POS_V1;
|
||||
rate_v2 |= nss << RATE_MCS_NSS_POS;
|
||||
} else if (rate_v1 & RATE_MCS_VHT_MSK_V1 ||
|
||||
rate_v1 & RATE_MCS_HE_MSK_V1) {
|
||||
rate_v2 |= rate_v1 & RATE_VHT_MCS_RATE_CODE_MSK;
|
||||
|
||||
rate_v2 |= rate_v1 & RATE_VHT_MCS_MIMO2_MSK;
|
||||
|
||||
if (rate_v1 & RATE_MCS_HE_MSK_V1) {
|
||||
u32 he_type_bits = rate_v1 & RATE_MCS_HE_TYPE_MSK_V1;
|
||||
u32 he_type = he_type_bits >> RATE_MCS_HE_TYPE_POS_V1;
|
||||
u32 he_106t = (rate_v1 & RATE_MCS_HE_106T_MSK_V1) >>
|
||||
RATE_MCS_HE_106T_POS_V1;
|
||||
u32 he_gi_ltf = (rate_v1 & RATE_MCS_HE_GI_LTF_MSK_V1) >>
|
||||
RATE_MCS_HE_GI_LTF_POS;
|
||||
|
||||
if ((he_type_bits == RATE_MCS_HE_TYPE_SU ||
|
||||
he_type_bits == RATE_MCS_HE_TYPE_EXT_SU) &&
|
||||
he_gi_ltf == RATE_MCS_HE_SU_4_LTF)
|
||||
/* the new rate have an additional bit to
|
||||
* represent the value 4 rather then using SGI
|
||||
* bit for this purpose - as it was done in the old
|
||||
* rate */
|
||||
he_gi_ltf += (rate_v1 & RATE_MCS_SGI_MSK_V1) >>
|
||||
RATE_MCS_SGI_POS_V1;
|
||||
|
||||
rate_v2 |= he_gi_ltf << RATE_MCS_HE_GI_LTF_POS;
|
||||
rate_v2 |= he_type << RATE_MCS_HE_TYPE_POS;
|
||||
rate_v2 |= he_106t << RATE_MCS_HE_106T_POS;
|
||||
rate_v2 |= rate_v1 & RATE_HE_DUAL_CARRIER_MODE_MSK;
|
||||
rate_v2 |= RATE_MCS_HE_MSK;
|
||||
} else {
|
||||
rate_v2 |= RATE_MCS_VHT_MSK;
|
||||
}
|
||||
/* if legacy format */
|
||||
} else {
|
||||
u32 legacy_rate = iwl_legacy_rate_to_fw_idx(rate_v1);
|
||||
|
||||
WARN_ON(legacy_rate < 0);
|
||||
rate_v2 |= legacy_rate;
|
||||
if (!(rate_v1 & RATE_MCS_CCK_MSK_V1))
|
||||
rate_v2 |= RATE_MCS_LEGACY_OFDM_MSK;
|
||||
}
|
||||
|
||||
/* convert flags */
|
||||
if (rate_v1 & RATE_MCS_LDPC_MSK_V1)
|
||||
rate_v2 |= RATE_MCS_LDPC_MSK;
|
||||
rate_v2 |= (rate_v1 & RATE_MCS_CHAN_WIDTH_MSK_V1) |
|
||||
(rate_v1 & RATE_MCS_ANT_AB_MSK) |
|
||||
(rate_v1 & RATE_MCS_STBC_MSK) |
|
||||
(rate_v1 & RATE_MCS_BF_MSK);
|
||||
|
||||
dup = (rate_v1 & RATE_MCS_DUP_MSK_V1) >> RATE_MCS_DUP_POS_V1;
|
||||
if (dup) {
|
||||
rate_v2 |= RATE_MCS_DUP_MSK;
|
||||
rate_v2 |= dup << RATE_MCS_CHAN_WIDTH_POS;
|
||||
}
|
||||
|
||||
if ((!(rate_v1 & RATE_MCS_HE_MSK_V1)) &&
|
||||
(rate_v1 & RATE_MCS_SGI_MSK_V1))
|
||||
rate_v2 |= RATE_MCS_SGI_MSK;
|
||||
|
||||
return rate_v2;
|
||||
}
|
||||
IWL_EXPORT_SYMBOL(iwl_new_rate_from_v1);
|
||||
|
||||
u32 iwl_legacy_rate_to_fw_idx(u32 rate_n_flags)
|
||||
{
|
||||
int rate = rate_n_flags & RATE_LEGACY_RATE_MSK_V1;
|
||||
int idx;
|
||||
bool ofdm = !(rate_n_flags & RATE_MCS_CCK_MSK_V1);
|
||||
int offset = ofdm ? IWL_FIRST_OFDM_RATE : 0;
|
||||
int last = ofdm ? IWL_RATE_COUNT_LEGACY : IWL_FIRST_OFDM_RATE;
|
||||
|
||||
for (idx = offset; idx < last; idx++)
|
||||
if (iwl_fw_rate_idx_to_plcp(idx) == rate)
|
||||
return idx - offset;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate)
|
||||
{
|
||||
char *type;
|
||||
u8 mcs = 0, nss = 0;
|
||||
u8 ant = (rate & RATE_MCS_ANT_AB_MSK) >> RATE_MCS_ANT_POS;
|
||||
u32 bw = (rate & RATE_MCS_CHAN_WIDTH_MSK) >>
|
||||
RATE_MCS_CHAN_WIDTH_POS;
|
||||
u32 format = rate & RATE_MCS_MOD_TYPE_MSK;
|
||||
bool sgi;
|
||||
|
||||
if (format == RATE_MCS_CCK_MSK ||
|
||||
format == RATE_MCS_LEGACY_OFDM_MSK) {
|
||||
int legacy_rate = rate & RATE_LEGACY_RATE_MSK;
|
||||
int index = format == RATE_MCS_CCK_MSK ?
|
||||
legacy_rate :
|
||||
legacy_rate + IWL_FIRST_OFDM_RATE;
|
||||
|
||||
return scnprintf(buf, bufsz, "Legacy | ANT: %s Rate: %s Mbps",
|
||||
iwl_rs_pretty_ant(ant),
|
||||
index == IWL_RATE_INVALID ? "BAD" :
|
||||
iwl_rate_mcs(index)->mbps);
|
||||
}
|
||||
|
||||
if (format == RATE_MCS_VHT_MSK)
|
||||
type = "VHT";
|
||||
else if (format == RATE_MCS_HT_MSK)
|
||||
type = "HT";
|
||||
else if (format == RATE_MCS_HE_MSK)
|
||||
type = "HE";
|
||||
else
|
||||
type = "Unknown"; /* shouldn't happen */
|
||||
|
||||
mcs = format == RATE_MCS_HT_MSK ?
|
||||
RATE_HT_MCS_INDEX(rate) :
|
||||
rate & RATE_MCS_CODE_MSK;
|
||||
nss = ((rate & RATE_MCS_NSS_MSK)
|
||||
>> RATE_MCS_NSS_POS) + 1;
|
||||
sgi = format == RATE_MCS_HE_MSK ?
|
||||
iwl_he_is_sgi(rate) :
|
||||
rate & RATE_MCS_SGI_MSK;
|
||||
|
||||
return scnprintf(buf, bufsz,
|
||||
"0x%x: %s | ANT: %s BW: %s MCS: %d NSS: %d %s%s%s%s%s",
|
||||
rate, type, iwl_rs_pretty_ant(ant), iwl_rs_pretty_bw(bw), mcs, nss,
|
||||
(sgi) ? "SGI " : "NGI ",
|
||||
(rate & RATE_MCS_STBC_MSK) ? "STBC " : "",
|
||||
(rate & RATE_MCS_LDPC_MSK) ? "LDPC " : "",
|
||||
(rate & RATE_HE_DUAL_CARRIER_MODE_MSK) ? "DCM " : "",
|
||||
(rate & RATE_MCS_BF_MSK) ? "BF " : "");
|
||||
}
|
||||
IWL_EXPORT_SYMBOL(rs_pretty_print_rate);
|
||||
|
||||
bool iwl_he_is_sgi(u32 rate_n_flags)
|
||||
{
|
||||
u32 type = rate_n_flags & RATE_MCS_HE_TYPE_MSK;
|
||||
u32 ltf_gi = rate_n_flags & RATE_MCS_HE_GI_LTF_MSK;
|
||||
|
||||
if (type == RATE_MCS_HE_TYPE_SU ||
|
||||
type == RATE_MCS_HE_TYPE_EXT_SU)
|
||||
return ltf_gi == RATE_MCS_HE_SU_4_LTF_08_GI;
|
||||
return false;
|
||||
}
|
||||
IWL_EXPORT_SYMBOL(iwl_he_is_sgi);
|
||||
|
||||
@@ -105,6 +105,9 @@ struct iwl_fw_runtime {
|
||||
const struct iwl_fw_runtime_ops *ops;
|
||||
void *ops_ctx;
|
||||
|
||||
const struct iwl_dump_sanitize_ops *sanitize_ops;
|
||||
void *sanitize_ctx;
|
||||
|
||||
/* Paging */
|
||||
struct iwl_fw_paging fw_paging_db[NUM_OF_FW_PAGING_BLOCKS];
|
||||
u16 num_of_paging_blk;
|
||||
@@ -161,6 +164,8 @@ struct iwl_fw_runtime {
|
||||
void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt, struct iwl_trans *trans,
|
||||
const struct iwl_fw *fw,
|
||||
const struct iwl_fw_runtime_ops *ops, void *ops_ctx,
|
||||
const struct iwl_dump_sanitize_ops *sanitize_ops,
|
||||
void *sanitize_ctx,
|
||||
struct dentry *dbgfs_dir);
|
||||
|
||||
static inline void iwl_fw_runtime_free(struct iwl_fw_runtime *fwrt)
|
||||
|
||||
@@ -95,7 +95,6 @@ enum iwl_nvm_type {
|
||||
#define ANT_AC (ANT_A | ANT_C)
|
||||
#define ANT_BC (ANT_B | ANT_C)
|
||||
#define ANT_ABC (ANT_A | ANT_B | ANT_C)
|
||||
#define MAX_ANT_NUM 3
|
||||
|
||||
|
||||
static inline u8 num_of_ant(u8 mask)
|
||||
@@ -420,6 +419,7 @@ struct iwl_cfg {
|
||||
#define IWL_CFG_MAC_TYPE_SOF 0x43
|
||||
#define IWL_CFG_MAC_TYPE_MA 0x44
|
||||
#define IWL_CFG_MAC_TYPE_BZ 0x46
|
||||
#define IWL_CFG_MAC_TYPE_GL 0x47
|
||||
|
||||
#define IWL_CFG_RF_TYPE_TH 0x105
|
||||
#define IWL_CFG_RF_TYPE_TH1 0x108
|
||||
@@ -511,6 +511,10 @@ extern const char iwl_ax210_killer_1675w_name[];
|
||||
extern const char iwl_ax210_killer_1675x_name[];
|
||||
extern const char iwl9560_killer_1550i_160_name[];
|
||||
extern const char iwl9560_killer_1550s_160_name[];
|
||||
extern const char iwl_ax211_killer_1675s_name[];
|
||||
extern const char iwl_ax211_killer_1675i_name[];
|
||||
extern const char iwl_ax411_killer_1690s_name[];
|
||||
extern const char iwl_ax411_killer_1690i_name[];
|
||||
extern const char iwl_ax211_name[];
|
||||
extern const char iwl_ax221_name[];
|
||||
extern const char iwl_ax231_name[];
|
||||
@@ -628,6 +632,8 @@ extern const struct iwl_cfg iwl_cfg_bz_a0_hr_b0;
|
||||
extern const struct iwl_cfg iwl_cfg_bz_a0_gf_a0;
|
||||
extern const struct iwl_cfg iwl_cfg_bz_a0_gf4_a0;
|
||||
extern const struct iwl_cfg iwl_cfg_bz_a0_mr_a0;
|
||||
extern const struct iwl_cfg iwl_cfg_bz_a0_fm_a0;
|
||||
extern const struct iwl_cfg iwl_cfg_gl_a0_fm_a0;
|
||||
#endif /* CONFIG_IWLMVM */
|
||||
|
||||
#endif /* __IWL_CONFIG_H__ */
|
||||
|
||||
@@ -109,12 +109,12 @@ struct iwl_prph_scratch_pnvm_cfg {
|
||||
* struct iwl_prph_scratch_hwm_cfg - hwm config
|
||||
* @hwm_base_addr: hwm start address
|
||||
* @hwm_size: hwm size in DWs
|
||||
* @reserved: reserved
|
||||
* @debug_token_config: debug preset
|
||||
*/
|
||||
struct iwl_prph_scratch_hwm_cfg {
|
||||
__le64 hwm_base_addr;
|
||||
__le32 hwm_size;
|
||||
__le32 reserved;
|
||||
__le32 debug_token_config;
|
||||
} __packed; /* PERIPH_SCRATCH_HWM_CFG_S */
|
||||
|
||||
/*
|
||||
|
||||
@@ -34,6 +34,7 @@
|
||||
#define CSR_GPIO_IN (CSR_BASE+0x018) /* read external chip pins */
|
||||
#define CSR_RESET (CSR_BASE+0x020) /* busmaster enable, NMI, etc*/
|
||||
#define CSR_GP_CNTRL (CSR_BASE+0x024)
|
||||
#define CSR_FUNC_SCRATCH (CSR_BASE+0x02c) /* Scratch register - used for FW dbg */
|
||||
|
||||
/* 2nd byte of CSR_INT_COALESCING, not accessible via iwl_write32()! */
|
||||
#define CSR_INT_PERIODIC_REG (CSR_BASE+0x005)
|
||||
@@ -135,6 +136,12 @@
|
||||
#define CSR_DBG_HPET_MEM_REG (CSR_BASE+0x240)
|
||||
#define CSR_DBG_LINK_PWR_MGMT_REG (CSR_BASE+0x250)
|
||||
|
||||
/*
|
||||
* Scratch register initial configuration - this is set on init, and read
|
||||
* during a error FW error.
|
||||
*/
|
||||
#define CSR_FUNC_SCRATCH_INIT_VALUE (0x01010101)
|
||||
|
||||
/* Bits for CSR_HW_IF_CONFIG_REG */
|
||||
#define CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH (0x00000003)
|
||||
#define CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP (0x0000000C)
|
||||
|
||||
@@ -16,6 +16,7 @@
|
||||
* @IWL_DBG_TLV_TYPE_HCMD: host command TLV
|
||||
* @IWL_DBG_TLV_TYPE_REGION: region TLV
|
||||
* @IWL_DBG_TLV_TYPE_TRIGGER: trigger TLV
|
||||
* @IWL_DBG_TLV_TYPE_CONF_SET: conf set TLV
|
||||
* @IWL_DBG_TLV_TYPE_NUM: number of debug TLVs
|
||||
*/
|
||||
enum iwl_dbg_tlv_type {
|
||||
@@ -25,6 +26,7 @@ enum iwl_dbg_tlv_type {
|
||||
IWL_DBG_TLV_TYPE_HCMD,
|
||||
IWL_DBG_TLV_TYPE_REGION,
|
||||
IWL_DBG_TLV_TYPE_TRIGGER,
|
||||
IWL_DBG_TLV_TYPE_CONF_SET,
|
||||
IWL_DBG_TLV_TYPE_NUM,
|
||||
};
|
||||
|
||||
@@ -59,6 +61,7 @@ dbg_ver_table[IWL_DBG_TLV_TYPE_NUM] = {
|
||||
[IWL_DBG_TLV_TYPE_HCMD] = {.min_ver = 1, .max_ver = 1,},
|
||||
[IWL_DBG_TLV_TYPE_REGION] = {.min_ver = 1, .max_ver = 2,},
|
||||
[IWL_DBG_TLV_TYPE_TRIGGER] = {.min_ver = 1, .max_ver = 1,},
|
||||
[IWL_DBG_TLV_TYPE_CONF_SET] = {.min_ver = 1, .max_ver = 1,},
|
||||
};
|
||||
|
||||
static int iwl_dbg_tlv_add(const struct iwl_ucode_tlv *tlv,
|
||||
@@ -260,6 +263,37 @@ static int iwl_dbg_tlv_alloc_trigger(struct iwl_trans *trans,
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int iwl_dbg_tlv_config_set(struct iwl_trans *trans,
|
||||
const struct iwl_ucode_tlv *tlv)
|
||||
{
|
||||
struct iwl_fw_ini_conf_set_tlv *conf_set = (void *)tlv->data;
|
||||
u32 tp = le32_to_cpu(conf_set->time_point);
|
||||
u32 type = le32_to_cpu(conf_set->set_type);
|
||||
|
||||
if (tp <= IWL_FW_INI_TIME_POINT_INVALID ||
|
||||
tp >= IWL_FW_INI_TIME_POINT_NUM) {
|
||||
IWL_DEBUG_FW(trans,
|
||||
"WRT: Invalid time point %u for config set TLV\n", tp);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (type <= IWL_FW_INI_CONFIG_SET_TYPE_INVALID ||
|
||||
type >= IWL_FW_INI_CONFIG_SET_TYPE_MAX_NUM) {
|
||||
IWL_DEBUG_FW(trans,
|
||||
"WRT: Invalid config set type %u for config set TLV\n", type);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (type != IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM ||
|
||||
trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) {
|
||||
IWL_DEBUG_FW(trans,
|
||||
"WRT: Config set type %u is not supported\n", type);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].config_list);
|
||||
}
|
||||
|
||||
static int (*dbg_tlv_alloc[])(struct iwl_trans *trans,
|
||||
const struct iwl_ucode_tlv *tlv) = {
|
||||
[IWL_DBG_TLV_TYPE_DEBUG_INFO] = iwl_dbg_tlv_alloc_debug_info,
|
||||
@@ -267,6 +301,7 @@ static int (*dbg_tlv_alloc[])(struct iwl_trans *trans,
|
||||
[IWL_DBG_TLV_TYPE_HCMD] = iwl_dbg_tlv_alloc_hcmd,
|
||||
[IWL_DBG_TLV_TYPE_REGION] = iwl_dbg_tlv_alloc_region,
|
||||
[IWL_DBG_TLV_TYPE_TRIGGER] = iwl_dbg_tlv_alloc_trigger,
|
||||
[IWL_DBG_TLV_TYPE_CONF_SET] = iwl_dbg_tlv_config_set,
|
||||
};
|
||||
|
||||
void iwl_dbg_tlv_alloc(struct iwl_trans *trans, const struct iwl_ucode_tlv *tlv,
|
||||
@@ -399,6 +434,13 @@ void iwl_dbg_tlv_free(struct iwl_trans *trans)
|
||||
list_del(&tlv_node->list);
|
||||
kfree(tlv_node);
|
||||
}
|
||||
|
||||
list_for_each_entry_safe(tlv_node, tlv_node_tmp,
|
||||
&tp->config_list, list) {
|
||||
list_del(&tlv_node->list);
|
||||
kfree(tlv_node);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(trans->dbg.fw_mon_ini); i++)
|
||||
@@ -466,6 +508,7 @@ void iwl_dbg_tlv_init(struct iwl_trans *trans)
|
||||
INIT_LIST_HEAD(&tp->trig_list);
|
||||
INIT_LIST_HEAD(&tp->hcmd_list);
|
||||
INIT_LIST_HEAD(&tp->active_trig_list);
|
||||
INIT_LIST_HEAD(&tp->config_list);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -649,6 +692,10 @@ static void iwl_dbg_tlv_apply_buffers(struct iwl_fw_runtime *fwrt)
|
||||
{
|
||||
int ret, i;
|
||||
|
||||
if (fw_has_capa(&fwrt->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT))
|
||||
return;
|
||||
|
||||
for (i = 0; i < IWL_FW_INI_ALLOCATION_NUM; i++) {
|
||||
ret = iwl_dbg_tlv_apply_buffer(fwrt, i);
|
||||
if (ret)
|
||||
@@ -658,6 +705,87 @@ static void iwl_dbg_tlv_apply_buffers(struct iwl_fw_runtime *fwrt)
|
||||
}
|
||||
}
|
||||
|
||||
static int iwl_dbg_tlv_update_dram(struct iwl_fw_runtime *fwrt,
|
||||
enum iwl_fw_ini_allocation_id alloc_id,
|
||||
struct iwl_dram_info *dram_info)
|
||||
{
|
||||
struct iwl_fw_mon *fw_mon;
|
||||
u32 remain_frags, num_frags;
|
||||
int j, fw_mon_idx = 0;
|
||||
struct iwl_buf_alloc_cmd *data;
|
||||
|
||||
if (le32_to_cpu(fwrt->trans->dbg.fw_mon_cfg[alloc_id].buf_location) !=
|
||||
IWL_FW_INI_LOCATION_DRAM_PATH) {
|
||||
IWL_DEBUG_FW(fwrt, "DRAM_PATH is not supported alloc_id %u\n", alloc_id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];
|
||||
|
||||
/* the first fragment of DBGC1 is given to the FW via register
|
||||
* or context info
|
||||
*/
|
||||
if (alloc_id == IWL_FW_INI_ALLOCATION_ID_DBGC1)
|
||||
fw_mon_idx++;
|
||||
|
||||
remain_frags = fw_mon->num_frags - fw_mon_idx;
|
||||
if (!remain_frags)
|
||||
return -1;
|
||||
|
||||
num_frags = min_t(u32, remain_frags, BUF_ALLOC_MAX_NUM_FRAGS);
|
||||
data = &dram_info->dram_frags[alloc_id - 1];
|
||||
data->alloc_id = cpu_to_le32(alloc_id);
|
||||
data->num_frags = cpu_to_le32(num_frags);
|
||||
data->buf_location = cpu_to_le32(IWL_FW_INI_LOCATION_DRAM_PATH);
|
||||
|
||||
IWL_DEBUG_FW(fwrt, "WRT: DRAM buffer details alloc_id=%u, num_frags=%u\n",
|
||||
cpu_to_le32(alloc_id), cpu_to_le32(num_frags));
|
||||
|
||||
for (j = 0; j < num_frags; j++) {
|
||||
struct iwl_buf_alloc_frag *frag = &data->frags[j];
|
||||
struct iwl_dram_data *fw_mon_frag = &fw_mon->frags[fw_mon_idx++];
|
||||
|
||||
frag->addr = cpu_to_le64(fw_mon_frag->physical);
|
||||
frag->size = cpu_to_le32(fw_mon_frag->size);
|
||||
IWL_DEBUG_FW(fwrt, "WRT: DRAM fragment details\n");
|
||||
IWL_DEBUG_FW(fwrt, "frag=%u, addr=0x%016llx, size=0x%x)\n",
|
||||
j, cpu_to_le64(fw_mon_frag->physical),
|
||||
cpu_to_le32(fw_mon_frag->size));
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void iwl_dbg_tlv_update_drams(struct iwl_fw_runtime *fwrt)
|
||||
{
|
||||
int ret, i, dram_alloc = 0;
|
||||
struct iwl_dram_info dram_info;
|
||||
struct iwl_dram_data *frags =
|
||||
&fwrt->trans->dbg.fw_mon_ini[IWL_FW_INI_ALLOCATION_ID_DBGC1].frags[0];
|
||||
|
||||
if (!fw_has_capa(&fwrt->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT))
|
||||
return;
|
||||
|
||||
dram_info.first_word = cpu_to_le32(DRAM_INFO_FIRST_MAGIC_WORD);
|
||||
dram_info.second_word = cpu_to_le32(DRAM_INFO_SECOND_MAGIC_WORD);
|
||||
|
||||
for (i = IWL_FW_INI_ALLOCATION_ID_DBGC1;
|
||||
i <= IWL_FW_INI_ALLOCATION_ID_DBGC3; i++) {
|
||||
ret = iwl_dbg_tlv_update_dram(fwrt, i, &dram_info);
|
||||
if (!ret)
|
||||
dram_alloc++;
|
||||
else
|
||||
IWL_WARN(fwrt,
|
||||
"WRT: Failed to set DRAM buffer for alloc id %d, ret=%d\n",
|
||||
i, ret);
|
||||
}
|
||||
if (dram_alloc) {
|
||||
memcpy(frags->block, &dram_info, sizeof(dram_info));
|
||||
IWL_DEBUG_FW(fwrt, "block data after %016x\n",
|
||||
*((int *)fwrt->trans->dbg.fw_mon_ini[1].frags[0].block));
|
||||
}
|
||||
}
|
||||
|
||||
static void iwl_dbg_tlv_send_hcmds(struct iwl_fw_runtime *fwrt,
|
||||
struct list_head *hcmd_list)
|
||||
{
|
||||
@@ -677,6 +805,31 @@ static void iwl_dbg_tlv_send_hcmds(struct iwl_fw_runtime *fwrt,
|
||||
}
|
||||
}
|
||||
|
||||
static void iwl_dbg_tlv_apply_config(struct iwl_fw_runtime *fwrt,
|
||||
struct list_head *config_list)
|
||||
{
|
||||
struct iwl_dbg_tlv_node *node;
|
||||
|
||||
list_for_each_entry(node, config_list, list) {
|
||||
struct iwl_fw_ini_conf_set_tlv *config_list = (void *)node->tlv.data;
|
||||
u32 type = le32_to_cpu(config_list->set_type);
|
||||
|
||||
switch (type) {
|
||||
case IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM: {
|
||||
u32 debug_token_config =
|
||||
le32_to_cpu(config_list->addr_val[0].value);
|
||||
|
||||
IWL_DEBUG_FW(fwrt, "WRT: Setting HWM debug token config: %u\n",
|
||||
debug_token_config);
|
||||
fwrt->trans->dbg.ucode_preset = debug_token_config;
|
||||
break;
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void iwl_dbg_tlv_periodic_trig_handler(struct timer_list *t)
|
||||
{
|
||||
struct iwl_dbg_tlv_timer_node *timer_node =
|
||||
@@ -996,8 +1149,10 @@ static void iwl_dbg_tlv_init_cfg(struct iwl_fw_runtime *fwrt)
|
||||
&fwrt->trans->dbg.fw_mon_cfg[i];
|
||||
u32 dest = le32_to_cpu(fw_mon_cfg->buf_location);
|
||||
|
||||
if (dest == IWL_FW_INI_LOCATION_INVALID)
|
||||
if (dest == IWL_FW_INI_LOCATION_INVALID) {
|
||||
failed_alloc |= BIT(i);
|
||||
continue;
|
||||
}
|
||||
|
||||
if (*ini_dest == IWL_FW_INI_LOCATION_INVALID)
|
||||
*ini_dest = dest;
|
||||
@@ -1024,8 +1179,10 @@ static void iwl_dbg_tlv_init_cfg(struct iwl_fw_runtime *fwrt)
|
||||
&fwrt->trans->dbg.active_regions[i];
|
||||
u32 reg_type;
|
||||
|
||||
if (!*active_reg)
|
||||
if (!*active_reg) {
|
||||
fwrt->trans->dbg.unsupported_region_msk |= BIT(i);
|
||||
continue;
|
||||
}
|
||||
|
||||
reg = (void *)(*active_reg)->data;
|
||||
reg_type = le32_to_cpu(reg->type);
|
||||
@@ -1051,7 +1208,7 @@ void _iwl_dbg_tlv_time_point(struct iwl_fw_runtime *fwrt,
|
||||
union iwl_dbg_tlv_tp_data *tp_data,
|
||||
bool sync)
|
||||
{
|
||||
struct list_head *hcmd_list, *trig_list;
|
||||
struct list_head *hcmd_list, *trig_list, *conf_list;
|
||||
|
||||
if (!iwl_trans_dbg_ini_valid(fwrt->trans) ||
|
||||
tp_id == IWL_FW_INI_TIME_POINT_INVALID ||
|
||||
@@ -1060,10 +1217,13 @@ void _iwl_dbg_tlv_time_point(struct iwl_fw_runtime *fwrt,
|
||||
|
||||
hcmd_list = &fwrt->trans->dbg.time_point[tp_id].hcmd_list;
|
||||
trig_list = &fwrt->trans->dbg.time_point[tp_id].active_trig_list;
|
||||
conf_list = &fwrt->trans->dbg.time_point[tp_id].config_list;
|
||||
|
||||
switch (tp_id) {
|
||||
case IWL_FW_INI_TIME_POINT_EARLY:
|
||||
iwl_dbg_tlv_init_cfg(fwrt);
|
||||
iwl_dbg_tlv_apply_config(fwrt, conf_list);
|
||||
iwl_dbg_tlv_update_drams(fwrt);
|
||||
iwl_dbg_tlv_tp_trigger(fwrt, sync, trig_list, tp_data, NULL);
|
||||
break;
|
||||
case IWL_FW_INI_TIME_POINT_AFTER_ALIVE:
|
||||
|
||||
@@ -33,11 +33,13 @@ union iwl_dbg_tlv_tp_data {
|
||||
* @trig_list: list of triggers
|
||||
* @active_trig_list: list of active triggers
|
||||
* @hcmd_list: list of host commands
|
||||
* @config_list: list of configuration
|
||||
*/
|
||||
struct iwl_dbg_tlv_time_point_data {
|
||||
struct list_head trig_list;
|
||||
struct list_head active_trig_list;
|
||||
struct list_head hcmd_list;
|
||||
struct list_head config_list;
|
||||
};
|
||||
|
||||
struct iwl_trans;
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright (C) 2005-2011 Intel Corporation
|
||||
* Copyright (C) 2005-2011, 2021 Intel Corporation
|
||||
*/
|
||||
#include <linux/device.h>
|
||||
#include <linux/interrupt.h>
|
||||
@@ -31,21 +31,31 @@ IWL_EXPORT_SYMBOL(__iwl_info);
|
||||
__iwl_fn(crit)
|
||||
IWL_EXPORT_SYMBOL(__iwl_crit);
|
||||
|
||||
void __iwl_err(struct device *dev, bool rfkill_prefix, bool trace_only,
|
||||
const char *fmt, ...)
|
||||
void __iwl_err(struct device *dev, enum iwl_err_mode mode, const char *fmt, ...)
|
||||
{
|
||||
struct va_format vaf = {
|
||||
.fmt = fmt,
|
||||
};
|
||||
va_list args;
|
||||
va_list args, args2;
|
||||
|
||||
va_start(args, fmt);
|
||||
vaf.va = &args;
|
||||
if (!trace_only) {
|
||||
if (rfkill_prefix)
|
||||
switch (mode) {
|
||||
case IWL_ERR_MODE_RATELIMIT:
|
||||
if (net_ratelimit())
|
||||
break;
|
||||
fallthrough;
|
||||
case IWL_ERR_MODE_REGULAR:
|
||||
case IWL_ERR_MODE_RFKILL:
|
||||
va_copy(args2, args);
|
||||
vaf.va = &args2;
|
||||
if (mode == IWL_ERR_MODE_RFKILL)
|
||||
dev_err(dev, "(RFKILL) %pV", &vaf);
|
||||
else
|
||||
dev_err(dev, "%pV", &vaf);
|
||||
va_end(args2);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
trace_iwlwifi_err(&vaf);
|
||||
va_end(args);
|
||||
|
||||
@@ -2,14 +2,9 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2018 - 2020 Intel Corporation
|
||||
* Copyright(c) 2018 - 2021 Intel Corporation
|
||||
*
|
||||
* Portions of this file are derived from the ipw3945 project.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __iwl_debug_h__
|
||||
@@ -27,9 +22,16 @@ static inline bool iwl_have_debug_level(u32 level)
|
||||
#endif
|
||||
}
|
||||
|
||||
enum iwl_err_mode {
|
||||
IWL_ERR_MODE_REGULAR,
|
||||
IWL_ERR_MODE_RFKILL,
|
||||
IWL_ERR_MODE_TRACE_ONLY,
|
||||
IWL_ERR_MODE_RATELIMIT,
|
||||
};
|
||||
|
||||
struct device;
|
||||
void __iwl_err(struct device *dev, bool rfkill_prefix, bool only_trace,
|
||||
const char *fmt, ...) __printf(4, 5);
|
||||
void __iwl_err(struct device *dev, enum iwl_err_mode mode, const char *fmt, ...)
|
||||
__printf(3, 4);
|
||||
void __iwl_warn(struct device *dev, const char *fmt, ...) __printf(2, 3);
|
||||
void __iwl_info(struct device *dev, const char *fmt, ...) __printf(2, 3);
|
||||
void __iwl_crit(struct device *dev, const char *fmt, ...) __printf(2, 3);
|
||||
@@ -38,13 +40,17 @@ void __iwl_crit(struct device *dev, const char *fmt, ...) __printf(2, 3);
|
||||
#define CHECK_FOR_NEWLINE(f) BUILD_BUG_ON(f[sizeof(f) - 2] != '\n')
|
||||
|
||||
/* No matter what is m (priv, bus, trans), this will work */
|
||||
#define IWL_ERR_DEV(d, f, a...) \
|
||||
#define __IWL_ERR_DEV(d, mode, f, a...) \
|
||||
do { \
|
||||
CHECK_FOR_NEWLINE(f); \
|
||||
__iwl_err((d), false, false, f, ## a); \
|
||||
__iwl_err((d), mode, f, ## a); \
|
||||
} while (0)
|
||||
#define IWL_ERR_DEV(d, f, a...) \
|
||||
__IWL_ERR_DEV(d, IWL_ERR_MODE_REGULAR, f, ## a)
|
||||
#define IWL_ERR(m, f, a...) \
|
||||
IWL_ERR_DEV((m)->dev, f, ## a)
|
||||
#define IWL_ERR_LIMIT(m, f, a...) \
|
||||
__IWL_ERR_DEV((m)->dev, IWL_ERR_MODE_RATELIMIT, f, ## a)
|
||||
#define IWL_WARN(m, f, a...) \
|
||||
do { \
|
||||
CHECK_FOR_NEWLINE(f); \
|
||||
|
||||
@@ -4,11 +4,6 @@
|
||||
* Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2015 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 - 2019 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#if !defined(__IWLWIFI_DEVICE_TRACE_DATA) || defined(TRACE_HEADER_MULTI_READ)
|
||||
|
||||
@@ -3,11 +3,6 @@
|
||||
*
|
||||
* Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2016-2017 Intel Deutschland GmbH
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#if !defined(__IWLWIFI_DEVICE_TRACE_IO) || defined(TRACE_HEADER_MULTI_READ)
|
||||
|
||||
@@ -5,11 +5,6 @@
|
||||
* Copyright(c) 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#if !defined(__IWLWIFI_DEVICE_TRACE_IWLWIFI) || defined(TRACE_HEADER_MULTI_READ)
|
||||
|
||||
@@ -2,11 +2,6 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#if !defined(__IWLWIFI_DEVICE_TRACE_MSG) || defined(TRACE_HEADER_MULTI_READ)
|
||||
|
||||
@@ -2,11 +2,6 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#if !defined(__IWLWIFI_DEVICE_TRACE_UCODE) || defined(TRACE_HEADER_MULTI_READ)
|
||||
|
||||
@@ -3,11 +3,6 @@
|
||||
*
|
||||
* Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright (C) 2018 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
||||
@@ -4,11 +4,6 @@
|
||||
* Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(C) 2016 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __IWLWIFI_DEVICE_TRACE
|
||||
|
||||
@@ -31,7 +31,6 @@
|
||||
|
||||
#define DRV_DESCRIPTION "Intel(R) Wireless WiFi driver for Linux"
|
||||
MODULE_DESCRIPTION(DRV_DESCRIPTION);
|
||||
MODULE_AUTHOR(DRV_AUTHOR);
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
#ifdef CONFIG_IWLWIFI_DEBUGFS
|
||||
@@ -550,6 +549,43 @@ static int iwl_parse_v1_v2_firmware(struct iwl_drv *drv,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void iwl_drv_set_dump_exclude(struct iwl_drv *drv,
|
||||
enum iwl_ucode_tlv_type tlv_type,
|
||||
const void *tlv_data, u32 tlv_len)
|
||||
{
|
||||
const struct iwl_fw_dump_exclude *fw = tlv_data;
|
||||
struct iwl_dump_exclude *excl;
|
||||
|
||||
if (tlv_len < sizeof(*fw))
|
||||
return;
|
||||
|
||||
if (tlv_type == IWL_UCODE_TLV_SEC_TABLE_ADDR) {
|
||||
excl = &drv->fw.dump_excl[0];
|
||||
|
||||
/* second time we find this, it's for WoWLAN */
|
||||
if (excl->addr)
|
||||
excl = &drv->fw.dump_excl_wowlan[0];
|
||||
} else if (fw_has_capa(&drv->fw.ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG)) {
|
||||
/* IWL_UCODE_TLV_D3_KEK_KCK_ADDR is regular image */
|
||||
excl = &drv->fw.dump_excl[0];
|
||||
} else {
|
||||
/* IWL_UCODE_TLV_D3_KEK_KCK_ADDR is WoWLAN image */
|
||||
excl = &drv->fw.dump_excl_wowlan[0];
|
||||
}
|
||||
|
||||
if (excl->addr)
|
||||
excl++;
|
||||
|
||||
if (excl->addr) {
|
||||
IWL_DEBUG_FW_INFO(drv, "found too many excludes in fw file\n");
|
||||
return;
|
||||
}
|
||||
|
||||
excl->addr = le32_to_cpu(fw->addr) & ~FW_ADDR_CACHE_CONTROL;
|
||||
excl->size = le32_to_cpu(fw->size);
|
||||
}
|
||||
|
||||
static int iwl_parse_tlv_firmware(struct iwl_drv *drv,
|
||||
const struct firmware *ucode_raw,
|
||||
struct iwl_firmware_pieces *pieces,
|
||||
@@ -1133,6 +1169,7 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv,
|
||||
case IWL_UCODE_TLV_TYPE_HCMD:
|
||||
case IWL_UCODE_TLV_TYPE_REGIONS:
|
||||
case IWL_UCODE_TLV_TYPE_TRIGGERS:
|
||||
case IWL_UCODE_TLV_TYPE_CONF_SET:
|
||||
if (iwlwifi_mod_params.enable_ini)
|
||||
iwl_dbg_tlv_alloc(drv->trans, tlv, false);
|
||||
break;
|
||||
@@ -1166,6 +1203,11 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv,
|
||||
return -ENOMEM;
|
||||
drv->fw.phy_integration_ver_len = tlv_len;
|
||||
break;
|
||||
case IWL_UCODE_TLV_SEC_TABLE_ADDR:
|
||||
case IWL_UCODE_TLV_D3_KEK_KCK_ADDR:
|
||||
iwl_drv_set_dump_exclude(drv, tlv_type,
|
||||
tlv_data, tlv_len);
|
||||
break;
|
||||
default:
|
||||
IWL_DEBUG_INFO(drv, "unknown TLV: %d\n", tlv_type);
|
||||
break;
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
|
||||
/*
|
||||
* Copyright (C) 2005-2014, 2020 Intel Corporation
|
||||
* Copyright (C) 2005-2014, 2020-2021 Intel Corporation
|
||||
* Copyright (C) 2013-2014 Intel Mobile Communications GmbH
|
||||
*/
|
||||
#ifndef __iwl_drv_h__
|
||||
@@ -9,7 +9,6 @@
|
||||
|
||||
/* for all modules */
|
||||
#define DRV_NAME "iwlwifi"
|
||||
#define DRV_AUTHOR "Intel Corporation <linuxwifi@intel.com>"
|
||||
|
||||
/* radio config bits (actual values from NVM definition) */
|
||||
#define NVM_RF_CFG_DASH_MSK(x) (x & 0x3) /* bits 0-1 */
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright (C) 2005-2014, 2018-2019 Intel Corporation
|
||||
* Copyright (C) 2005-2014, 2018-2019, 2021 Intel Corporation
|
||||
*/
|
||||
#include <linux/types.h>
|
||||
#include <linux/slab.h>
|
||||
@@ -139,7 +139,7 @@ static int iwl_init_otp_access(struct iwl_trans *trans)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = iwl_finish_nic_init(trans, trans->trans_cfg);
|
||||
ret = iwl_finish_nic_init(trans);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
||||
@@ -398,9 +398,9 @@ int iwl_dump_fh(struct iwl_trans *trans, char **buf)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int iwl_finish_nic_init(struct iwl_trans *trans,
|
||||
const struct iwl_cfg_trans_params *cfg_trans)
|
||||
int iwl_finish_nic_init(struct iwl_trans *trans)
|
||||
{
|
||||
const struct iwl_cfg_trans_params *cfg_trans = trans->trans_cfg;
|
||||
u32 poll_ready;
|
||||
int err;
|
||||
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
|
||||
/*
|
||||
* Copyright (C) 2018-2020 Intel Corporation
|
||||
* Copyright (C) 2018-2021 Intel Corporation
|
||||
*/
|
||||
#ifndef __iwl_io_h__
|
||||
#define __iwl_io_h__
|
||||
@@ -52,8 +52,7 @@ void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
|
||||
void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask);
|
||||
void iwl_force_nmi(struct iwl_trans *trans);
|
||||
|
||||
int iwl_finish_nic_init(struct iwl_trans *trans,
|
||||
const struct iwl_cfg_trans_params *cfg_trans);
|
||||
int iwl_finish_nic_init(struct iwl_trans *trans);
|
||||
|
||||
/* Error handling */
|
||||
int iwl_dump_fh(struct iwl_trans *trans, char **buf);
|
||||
|
||||
@@ -534,6 +534,17 @@ static void iwl_init_vht_hw_capab(struct iwl_trans *trans,
|
||||
cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE);
|
||||
}
|
||||
|
||||
static const u8 iwl_vendor_caps[] = {
|
||||
0xdd, /* vendor element */
|
||||
0x06, /* length */
|
||||
0x00, 0x17, 0x35, /* Intel OUI */
|
||||
0x08, /* type (Intel Capabilities) */
|
||||
/* followed by 16 bits of capabilities */
|
||||
#define IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE BIT(0)
|
||||
IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE,
|
||||
0x00
|
||||
};
|
||||
|
||||
static const struct ieee80211_sband_iftype_data iwl_he_capa[] = {
|
||||
{
|
||||
.types_mask = BIT(NL80211_IFTYPE_STATION),
|
||||
@@ -781,6 +792,12 @@ iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans,
|
||||
if (fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_BROADCAST_TWT))
|
||||
iftype_data->he_cap.he_cap_elem.mac_cap_info[2] |=
|
||||
IEEE80211_HE_MAC_CAP2_BCAST_TWT;
|
||||
|
||||
if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000 &&
|
||||
!is_ap) {
|
||||
iftype_data->vendor_elems.data = iwl_vendor_caps;
|
||||
iftype_data->vendor_elems.len = ARRAY_SIZE(iwl_vendor_caps);
|
||||
}
|
||||
}
|
||||
|
||||
static void iwl_init_he_hw_capab(struct iwl_trans *trans,
|
||||
|
||||
@@ -347,6 +347,12 @@
|
||||
#define RADIO_REG_SYS_MANUAL_DFT_0 0xAD4078
|
||||
#define RFIC_REG_RD 0xAD0470
|
||||
#define WFPM_CTRL_REG 0xA03030
|
||||
#define WFPM_CTRL_REG_GEN2 0xd03030
|
||||
#define WFPM_OTP_CFG1_ADDR 0x00a03098
|
||||
#define WFPM_OTP_CFG1_ADDR_GEN2 0x00d03098
|
||||
#define WFPM_OTP_CFG1_IS_JACKET_BIT BIT(4)
|
||||
#define WFPM_OTP_CFG1_IS_CDB_BIT BIT(5)
|
||||
|
||||
#define WFPM_GP2 0xA030B4
|
||||
|
||||
/* DBGI SRAM Register details */
|
||||
@@ -399,10 +405,40 @@ enum {
|
||||
LMPM_PAGE_PASS_NOTIF_POS = BIT(20),
|
||||
};
|
||||
|
||||
/*
|
||||
* CRF ID register
|
||||
*
|
||||
* type: bits 0-11
|
||||
* reserved: bits 12-18
|
||||
* slave_exist: bit 19
|
||||
* dash: bits 20-23
|
||||
* step: bits 24-26
|
||||
* flavor: bits 27-31
|
||||
*/
|
||||
#define REG_CRF_ID_TYPE(val) (((val) & 0x00000FFF) >> 0)
|
||||
#define REG_CRF_ID_SLAVE(val) (((val) & 0x00080000) >> 19)
|
||||
#define REG_CRF_ID_DASH(val) (((val) & 0x00F00000) >> 20)
|
||||
#define REG_CRF_ID_STEP(val) (((val) & 0x07000000) >> 24)
|
||||
#define REG_CRF_ID_FLAVOR(val) (((val) & 0xF8000000) >> 27)
|
||||
|
||||
#define UREG_CHICK (0xA05C00)
|
||||
#define UREG_CHICK_MSI_ENABLE BIT(24)
|
||||
#define UREG_CHICK_MSIX_ENABLE BIT(25)
|
||||
|
||||
#define SD_REG_VER 0xa29600
|
||||
#define SD_REG_VER_GEN2 0x00a2b800
|
||||
|
||||
#define REG_CRF_ID_TYPE_JF_1 0x201
|
||||
#define REG_CRF_ID_TYPE_JF_2 0x202
|
||||
#define REG_CRF_ID_TYPE_HR_CDB 0x503
|
||||
#define REG_CRF_ID_TYPE_HR_NONE_CDB 0x504
|
||||
#define REG_CRF_ID_TYPE_HR_NONE_CDB_1X1 0x501
|
||||
#define REG_CRF_ID_TYPE_HR_NONE_CDB_CCP 0x532
|
||||
#define REG_CRF_ID_TYPE_GF 0x410
|
||||
#define REG_CRF_ID_TYPE_GF_TC 0xF08
|
||||
#define REG_CRF_ID_TYPE_MR 0x810
|
||||
#define REG_CRF_ID_TYPE_FM 0x910
|
||||
|
||||
#define HPM_DEBUG 0xA03440
|
||||
#define PERSISTENCE_BIT BIT(12)
|
||||
#define PREG_WFPM_ACCESS BIT(12)
|
||||
|
||||
@@ -362,6 +362,20 @@ struct iwl_hcmd_arr {
|
||||
#define HCMD_ARR(x) \
|
||||
{ .arr = x, .size = ARRAY_SIZE(x) }
|
||||
|
||||
/**
|
||||
* struct iwl_dump_sanitize_ops - dump sanitization operations
|
||||
* @frob_txf: Scrub the TX FIFO data
|
||||
* @frob_hcmd: Scrub a host command, the %hcmd pointer is to the header
|
||||
* but that might be short or long (&struct iwl_cmd_header or
|
||||
* &struct iwl_cmd_header_wide)
|
||||
* @frob_mem: Scrub memory data
|
||||
*/
|
||||
struct iwl_dump_sanitize_ops {
|
||||
void (*frob_txf)(void *ctx, void *buf, size_t buflen);
|
||||
void (*frob_hcmd)(void *ctx, void *hcmd, size_t buflen);
|
||||
void (*frob_mem)(void *ctx, u32 mem_addr, void *mem, size_t buflen);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_trans_config - transport configuration
|
||||
*
|
||||
@@ -586,7 +600,9 @@ struct iwl_trans_ops {
|
||||
u32 value);
|
||||
|
||||
struct iwl_trans_dump_data *(*dump_data)(struct iwl_trans *trans,
|
||||
u32 dump_mask);
|
||||
u32 dump_mask,
|
||||
const struct iwl_dump_sanitize_ops *sanitize_ops,
|
||||
void *sanitize_ctx);
|
||||
void (*debugfs_cleanup)(struct iwl_trans *trans);
|
||||
void (*sync_nmi)(struct iwl_trans *trans);
|
||||
int (*set_pnvm)(struct iwl_trans *trans, const void *data, u32 len);
|
||||
@@ -723,8 +739,8 @@ struct iwl_self_init_dram {
|
||||
* @debug_info_tlv_list: list of debug info TLVs
|
||||
* @time_point: array of debug time points
|
||||
* @periodic_trig_list: periodic triggers list
|
||||
* @domains_bitmap: bitmap of active domains other than
|
||||
* &IWL_FW_INI_DOMAIN_ALWAYS_ON
|
||||
* @domains_bitmap: bitmap of active domains other than &IWL_FW_INI_DOMAIN_ALWAYS_ON
|
||||
* @ucode_preset: preset based on ucode
|
||||
*/
|
||||
struct iwl_trans_debug {
|
||||
u8 n_dest_reg;
|
||||
@@ -758,6 +774,7 @@ struct iwl_trans_debug {
|
||||
struct list_head periodic_trig_list;
|
||||
|
||||
u32 domains_bitmap;
|
||||
u32 ucode_preset;
|
||||
};
|
||||
|
||||
struct iwl_dma_ptr {
|
||||
@@ -1086,11 +1103,14 @@ static inline int iwl_trans_d3_resume(struct iwl_trans *trans,
|
||||
}
|
||||
|
||||
static inline struct iwl_trans_dump_data *
|
||||
iwl_trans_dump_data(struct iwl_trans *trans, u32 dump_mask)
|
||||
iwl_trans_dump_data(struct iwl_trans *trans, u32 dump_mask,
|
||||
const struct iwl_dump_sanitize_ops *sanitize_ops,
|
||||
void *sanitize_ctx)
|
||||
{
|
||||
if (!trans->ops->dump_data)
|
||||
return NULL;
|
||||
return trans->ops->dump_data(trans, dump_mask);
|
||||
return trans->ops->dump_data(trans, dump_mask,
|
||||
sanitize_ops, sanitize_ctx);
|
||||
}
|
||||
|
||||
static inline struct iwl_device_tx_cmd *
|
||||
|
||||
@@ -395,10 +395,9 @@ static ssize_t iwl_dbgfs_rs_data_read(struct file *file, char __user *user_buf,
|
||||
"A-MPDU size limit %d\n",
|
||||
lq_sta->pers.dbg_agg_frame_count_lim);
|
||||
desc += scnprintf(buff + desc, bufsz - desc,
|
||||
"valid_tx_ant %s%s%s\n",
|
||||
"valid_tx_ant %s%s\n",
|
||||
(iwl_mvm_get_valid_tx_ant(mvm) & ANT_A) ? "ANT_A," : "",
|
||||
(iwl_mvm_get_valid_tx_ant(mvm) & ANT_B) ? "ANT_B," : "",
|
||||
(iwl_mvm_get_valid_tx_ant(mvm) & ANT_C) ? "ANT_C" : "");
|
||||
(iwl_mvm_get_valid_tx_ant(mvm) & ANT_B) ? "ANT_B," : "");
|
||||
desc += scnprintf(buff + desc, bufsz - desc,
|
||||
"last tx rate=0x%X ",
|
||||
lq_sta->last_rate_n_flags);
|
||||
@@ -986,8 +985,8 @@ static ssize_t iwl_dbgfs_frame_stats_read(struct iwl_mvm *mvm,
|
||||
continue;
|
||||
pos += scnprintf(pos, endpos - pos, "Rate[%d]: ",
|
||||
(int)(ARRAY_SIZE(stats->last_rates) - i));
|
||||
pos += rs_pretty_print_rate(pos, endpos - pos,
|
||||
stats->last_rates[idx]);
|
||||
pos += rs_pretty_print_rate_v1(pos, endpos - pos,
|
||||
stats->last_rates[idx]);
|
||||
if (pos < endpos - 1)
|
||||
*pos++ = '\n';
|
||||
}
|
||||
@@ -1060,8 +1059,6 @@ iwl_dbgfs_scan_ant_rxchain_read(struct file *file,
|
||||
pos += scnprintf(buf + pos, bufsz - pos, "A");
|
||||
if (mvm->scan_rx_ant & ANT_B)
|
||||
pos += scnprintf(buf + pos, bufsz - pos, "B");
|
||||
if (mvm->scan_rx_ant & ANT_C)
|
||||
pos += scnprintf(buf + pos, bufsz - pos, "C");
|
||||
pos += scnprintf(buf + pos, bufsz - pos, " (%hhx)\n", mvm->scan_rx_ant);
|
||||
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, pos);
|
||||
@@ -1196,7 +1193,6 @@ static int _iwl_dbgfs_inject_beacon_ie(struct iwl_mvm *mvm, char *bin, int len)
|
||||
struct ieee80211_tx_info *info;
|
||||
struct iwl_mac_beacon_cmd beacon_cmd = {};
|
||||
u8 rate;
|
||||
u16 flags;
|
||||
int i;
|
||||
|
||||
len /= 2;
|
||||
@@ -1243,12 +1239,9 @@ static int _iwl_dbgfs_inject_beacon_ie(struct iwl_mvm *mvm, char *bin, int len)
|
||||
mvmvif = iwl_mvm_vif_from_mac80211(vif);
|
||||
info = IEEE80211_SKB_CB(beacon);
|
||||
rate = iwl_mvm_mac_ctxt_get_lowest_rate(info, vif);
|
||||
flags = iwl_mvm_mac80211_idx_to_hwrate(rate);
|
||||
|
||||
if (rate == IWL_FIRST_CCK_RATE)
|
||||
flags |= IWL_MAC_BEACON_CCK;
|
||||
|
||||
beacon_cmd.flags = cpu_to_le16(flags);
|
||||
beacon_cmd.flags =
|
||||
cpu_to_le16(iwl_mvm_mac_ctxt_get_beacon_flags(mvm->fw, rate));
|
||||
beacon_cmd.byte_cnt = cpu_to_le16((u16)beacon->len);
|
||||
beacon_cmd.template_id = cpu_to_le32((u32)mvmvif->id);
|
||||
|
||||
|
||||
@@ -324,6 +324,7 @@ iwl_mvm_ftm_target_chandef_v2(struct iwl_mvm *mvm,
|
||||
u8 *ctrl_ch_position)
|
||||
{
|
||||
u32 freq = peer->chandef.chan->center_freq;
|
||||
u8 cmd_ver;
|
||||
|
||||
*channel = ieee80211_frequency_to_channel(freq);
|
||||
|
||||
@@ -344,6 +345,17 @@ iwl_mvm_ftm_target_chandef_v2(struct iwl_mvm *mvm,
|
||||
*format_bw = IWL_LOCATION_FRAME_FORMAT_VHT;
|
||||
*format_bw |= IWL_LOCATION_BW_80MHZ << LOCATION_BW_POS;
|
||||
break;
|
||||
case NL80211_CHAN_WIDTH_160:
|
||||
cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LOCATION_GROUP,
|
||||
TOF_RANGE_REQ_CMD,
|
||||
IWL_FW_CMD_VER_UNKNOWN);
|
||||
|
||||
if (cmd_ver >= 13) {
|
||||
*format_bw = IWL_LOCATION_FRAME_FORMAT_HE;
|
||||
*format_bw |= IWL_LOCATION_BW_160MHZ << LOCATION_BW_POS;
|
||||
break;
|
||||
}
|
||||
fallthrough;
|
||||
default:
|
||||
IWL_ERR(mvm, "Unsupported BW in FTM request (%d)\n",
|
||||
peer->chandef.width);
|
||||
@@ -1142,6 +1154,7 @@ static u8 iwl_mvm_ftm_get_range_resp_ver(struct iwl_mvm *mvm)
|
||||
static bool iwl_mvm_ftm_resp_size_validation(u8 ver, unsigned int pkt_len)
|
||||
{
|
||||
switch (ver) {
|
||||
case 9:
|
||||
case 8:
|
||||
return pkt_len == sizeof(struct iwl_tof_range_rsp_ntfy_v8);
|
||||
case 7:
|
||||
@@ -1205,7 +1218,7 @@ void iwl_mvm_ftm_range_resp(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
|
||||
int peer_idx;
|
||||
|
||||
if (new_api) {
|
||||
if (notif_ver == 8) {
|
||||
if (notif_ver >= 8) {
|
||||
fw_ap = &fw_resp_v8->ap[i];
|
||||
iwl_mvm_ftm_pasn_update_pn(mvm, fw_ap);
|
||||
} else if (notif_ver == 7) {
|
||||
|
||||
@@ -46,8 +46,8 @@ static int iwl_mvm_ftm_responder_set_bw_v1(struct cfg80211_chan_def *chandef,
|
||||
}
|
||||
|
||||
static int iwl_mvm_ftm_responder_set_bw_v2(struct cfg80211_chan_def *chandef,
|
||||
u8 *format_bw,
|
||||
u8 *ctrl_ch_position)
|
||||
u8 *format_bw, u8 *ctrl_ch_position,
|
||||
u8 cmd_ver)
|
||||
{
|
||||
switch (chandef->width) {
|
||||
case NL80211_CHAN_WIDTH_20_NOHT:
|
||||
@@ -68,6 +68,14 @@ static int iwl_mvm_ftm_responder_set_bw_v2(struct cfg80211_chan_def *chandef,
|
||||
*format_bw |= IWL_LOCATION_BW_80MHZ << LOCATION_BW_POS;
|
||||
*ctrl_ch_position = iwl_mvm_get_ctrl_pos(chandef);
|
||||
break;
|
||||
case NL80211_CHAN_WIDTH_160:
|
||||
if (cmd_ver >= 9) {
|
||||
*format_bw = IWL_LOCATION_FRAME_FORMAT_HE;
|
||||
*format_bw |= IWL_LOCATION_BW_160MHZ << LOCATION_BW_POS;
|
||||
*ctrl_ch_position = iwl_mvm_get_ctrl_pos(chandef);
|
||||
break;
|
||||
}
|
||||
fallthrough;
|
||||
default:
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
@@ -140,7 +148,8 @@ iwl_mvm_ftm_responder_cmd(struct iwl_mvm *mvm,
|
||||
|
||||
if (cmd_ver >= 7)
|
||||
err = iwl_mvm_ftm_responder_set_bw_v2(chandef, &cmd.format_bw,
|
||||
&cmd.ctrl_ch_position);
|
||||
&cmd.ctrl_ch_position,
|
||||
cmd_ver);
|
||||
else
|
||||
err = iwl_mvm_ftm_responder_set_bw_v1(chandef, &cmd.format_bw,
|
||||
&cmd.ctrl_ch_position);
|
||||
|
||||
@@ -295,6 +295,7 @@ static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
|
||||
if (ret) {
|
||||
struct iwl_trans *trans = mvm->trans;
|
||||
|
||||
/* SecBoot info */
|
||||
if (trans->trans_cfg->device_family >=
|
||||
IWL_DEVICE_FAMILY_22000) {
|
||||
IWL_ERR(mvm,
|
||||
@@ -302,6 +303,17 @@ static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
|
||||
iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
|
||||
iwl_read_umac_prph(trans,
|
||||
UMAG_SB_CPU_2_STATUS));
|
||||
} else if (trans->trans_cfg->device_family >=
|
||||
IWL_DEVICE_FAMILY_8000) {
|
||||
IWL_ERR(mvm,
|
||||
"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
|
||||
iwl_read_prph(trans, SB_CPU_1_STATUS),
|
||||
iwl_read_prph(trans, SB_CPU_2_STATUS));
|
||||
}
|
||||
|
||||
/* LMAC/UMAC PC info */
|
||||
if (trans->trans_cfg->device_family >=
|
||||
IWL_DEVICE_FAMILY_9000) {
|
||||
IWL_ERR(mvm, "UMAC PC: 0x%x\n",
|
||||
iwl_read_umac_prph(trans,
|
||||
UREG_UMAC_CURRENT_PC));
|
||||
@@ -312,12 +324,6 @@ static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
|
||||
IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
|
||||
iwl_read_umac_prph(trans,
|
||||
UREG_LMAC2_CURRENT_PC));
|
||||
} else if (trans->trans_cfg->device_family >=
|
||||
IWL_DEVICE_FAMILY_8000) {
|
||||
IWL_ERR(mvm,
|
||||
"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
|
||||
iwl_read_prph(trans, SB_CPU_1_STATUS),
|
||||
iwl_read_prph(trans, SB_CPU_2_STATUS));
|
||||
}
|
||||
|
||||
if (ret == -ETIMEDOUT)
|
||||
@@ -1133,7 +1139,7 @@ static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
|
||||
{
|
||||
int ret;
|
||||
u32 value;
|
||||
struct iwl_lari_config_change_cmd_v4 cmd = {};
|
||||
struct iwl_lari_config_change_cmd_v5 cmd = {};
|
||||
|
||||
cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt);
|
||||
|
||||
@@ -1149,14 +1155,23 @@ static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
|
||||
if (!ret)
|
||||
cmd.oem_unii4_allow_bitmap = cpu_to_le32(value);
|
||||
|
||||
ret = iwl_acpi_get_dsm_u32((&mvm->fwrt)->dev, 0,
|
||||
DSM_FUNC_ACTIVATE_CHANNEL,
|
||||
&iwl_guid, &value);
|
||||
if (!ret)
|
||||
cmd.chan_state_active_bitmap = cpu_to_le32(value);
|
||||
|
||||
if (cmd.config_bitmap ||
|
||||
cmd.oem_11ax_allow_bitmap ||
|
||||
cmd.oem_unii4_allow_bitmap) {
|
||||
cmd.oem_unii4_allow_bitmap ||
|
||||
cmd.chan_state_active_bitmap) {
|
||||
size_t cmd_size;
|
||||
u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw,
|
||||
REGULATORY_AND_NVM_GROUP,
|
||||
LARI_CONFIG_CHANGE, 1);
|
||||
if (cmd_ver == 4)
|
||||
if (cmd_ver == 5)
|
||||
cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5);
|
||||
else if (cmd_ver == 4)
|
||||
cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4);
|
||||
else if (cmd_ver == 3)
|
||||
cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3);
|
||||
@@ -1170,8 +1185,9 @@ static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
|
||||
le32_to_cpu(cmd.config_bitmap),
|
||||
le32_to_cpu(cmd.oem_11ax_allow_bitmap));
|
||||
IWL_DEBUG_RADIO(mvm,
|
||||
"sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, cmd_ver=%d\n",
|
||||
"sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n",
|
||||
le32_to_cpu(cmd.oem_unii4_allow_bitmap),
|
||||
le32_to_cpu(cmd.chan_state_active_bitmap),
|
||||
cmd_ver);
|
||||
ret = iwl_mvm_send_cmd_pdu(mvm,
|
||||
WIDE_ID(REGULATORY_AND_NVM_GROUP,
|
||||
|
||||
@@ -604,6 +604,12 @@ static int iwl_mvm_mac_ctxt_cmd_sta(struct iwl_mvm *mvm,
|
||||
|
||||
ctxt_sta->is_assoc = cpu_to_le32(1);
|
||||
|
||||
if (!mvmvif->authorized &&
|
||||
fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO))
|
||||
ctxt_sta->data_policy |=
|
||||
cpu_to_le32(COEX_HIGH_PRIORITY_ENABLE);
|
||||
|
||||
/*
|
||||
* allow multicast data frames only as long as the station is
|
||||
* authorized, i.e., GTK keys are already installed (if needed)
|
||||
@@ -812,6 +818,21 @@ u8 iwl_mvm_mac_ctxt_get_lowest_rate(struct ieee80211_tx_info *info,
|
||||
return rate;
|
||||
}
|
||||
|
||||
u16 iwl_mvm_mac_ctxt_get_beacon_flags(const struct iwl_fw *fw, u8 rate_idx)
|
||||
{
|
||||
u16 flags = iwl_mvm_mac80211_idx_to_hwrate(fw, rate_idx);
|
||||
bool is_new_rate = iwl_fw_lookup_cmd_ver(fw,
|
||||
LONG_GROUP,
|
||||
BEACON_TEMPLATE_CMD,
|
||||
0) > 10;
|
||||
|
||||
if (rate_idx <= IWL_FIRST_CCK_RATE)
|
||||
flags |= is_new_rate ? IWL_MAC_BEACON_CCK
|
||||
: IWL_MAC_BEACON_CCK_V1;
|
||||
|
||||
return flags;
|
||||
}
|
||||
|
||||
static void iwl_mvm_mac_ctxt_set_tx(struct iwl_mvm *mvm,
|
||||
struct ieee80211_vif *vif,
|
||||
struct sk_buff *beacon,
|
||||
@@ -844,9 +865,10 @@ static void iwl_mvm_mac_ctxt_set_tx(struct iwl_mvm *mvm,
|
||||
|
||||
rate = iwl_mvm_mac_ctxt_get_lowest_rate(info, vif);
|
||||
|
||||
tx->rate_n_flags |= cpu_to_le32(iwl_mvm_mac80211_idx_to_hwrate(rate));
|
||||
tx->rate_n_flags |=
|
||||
cpu_to_le32(iwl_mvm_mac80211_idx_to_hwrate(mvm->fw, rate));
|
||||
if (rate == IWL_FIRST_CCK_RATE)
|
||||
tx->rate_n_flags |= cpu_to_le32(RATE_MCS_CCK_MSK);
|
||||
tx->rate_n_flags |= cpu_to_le32(RATE_MCS_CCK_MSK_V1);
|
||||
|
||||
}
|
||||
|
||||
@@ -929,11 +951,7 @@ static int iwl_mvm_mac_ctxt_send_beacon_v9(struct iwl_mvm *mvm,
|
||||
u16 flags;
|
||||
struct ieee80211_chanctx_conf *ctx;
|
||||
int channel;
|
||||
|
||||
flags = iwl_mvm_mac80211_idx_to_hwrate(rate);
|
||||
|
||||
if (rate == IWL_FIRST_CCK_RATE)
|
||||
flags |= IWL_MAC_BEACON_CCK;
|
||||
flags = iwl_mvm_mac_ctxt_get_beacon_flags(mvm->fw, rate);
|
||||
|
||||
/* Enable FILS on PSC channels only */
|
||||
rcu_read_lock();
|
||||
@@ -942,7 +960,11 @@ static int iwl_mvm_mac_ctxt_send_beacon_v9(struct iwl_mvm *mvm,
|
||||
WARN_ON(channel == 0);
|
||||
if (cfg80211_channel_is_psc(ctx->def.chan) &&
|
||||
!IWL_MVM_DISABLE_AP_FILS) {
|
||||
flags |= IWL_MAC_BEACON_FILS;
|
||||
flags |= iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
|
||||
BEACON_TEMPLATE_CMD,
|
||||
0) > 10 ?
|
||||
IWL_MAC_BEACON_FILS :
|
||||
IWL_MAC_BEACON_FILS_V1;
|
||||
beacon_cmd.short_ssid =
|
||||
cpu_to_le32(~crc32_le(~0, vif->bss_conf.ssid,
|
||||
vif->bss_conf.ssid_len));
|
||||
|
||||
@@ -145,7 +145,8 @@ static const struct cfg80211_pmsr_capabilities iwl_mvm_pmsr_capa = {
|
||||
.bandwidths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
|
||||
BIT(NL80211_CHAN_WIDTH_20) |
|
||||
BIT(NL80211_CHAN_WIDTH_40) |
|
||||
BIT(NL80211_CHAN_WIDTH_80),
|
||||
BIT(NL80211_CHAN_WIDTH_80) |
|
||||
BIT(NL80211_CHAN_WIDTH_160),
|
||||
.preambles = BIT(NL80211_PREAMBLE_LEGACY) |
|
||||
BIT(NL80211_PREAMBLE_HT) |
|
||||
BIT(NL80211_PREAMBLE_VHT) |
|
||||
@@ -2022,7 +2023,8 @@ static void iwl_mvm_cfg_he_sta(struct iwl_mvm *mvm,
|
||||
}
|
||||
|
||||
sband = mvm->hw->wiphy->bands[chanctx_conf->def.chan->band];
|
||||
own_he_cap = ieee80211_get_he_iftype_cap(sband, vif->type);
|
||||
own_he_cap = ieee80211_get_he_iftype_cap(sband,
|
||||
ieee80211_vif_type_p2p(vif));
|
||||
|
||||
sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_ctxt_cmd.sta_id]);
|
||||
if (IS_ERR_OR_NULL(sta)) {
|
||||
@@ -3192,32 +3194,43 @@ static int iwl_mvm_mac_sta_state(struct ieee80211_hw *hw,
|
||||
if (iwl_mvm_phy_ctx_count(mvm) > 1)
|
||||
iwl_mvm_teardown_tdls_peers(mvm);
|
||||
|
||||
if (sta->tdls)
|
||||
if (sta->tdls) {
|
||||
iwl_mvm_tdls_check_trigger(mvm, vif, sta->addr,
|
||||
NL80211_TDLS_ENABLE_LINK);
|
||||
} else {
|
||||
/* enable beacon filtering */
|
||||
WARN_ON(iwl_mvm_enable_beacon_filter(mvm, vif, 0));
|
||||
|
||||
/* enable beacon filtering */
|
||||
WARN_ON(iwl_mvm_enable_beacon_filter(mvm, vif, 0));
|
||||
mvmvif->authorized = 1;
|
||||
|
||||
/*
|
||||
* Now that the station is authorized, i.e., keys were already
|
||||
* installed, need to indicate to the FW that
|
||||
* multicast data frames can be forwarded to the driver
|
||||
*/
|
||||
iwl_mvm_mac_ctxt_changed(mvm, vif, false, NULL);
|
||||
/*
|
||||
* Now that the station is authorized, i.e., keys were already
|
||||
* installed, need to indicate to the FW that
|
||||
* multicast data frames can be forwarded to the driver
|
||||
*/
|
||||
iwl_mvm_mac_ctxt_changed(mvm, vif, false, NULL);
|
||||
}
|
||||
|
||||
iwl_mvm_rs_rate_init(mvm, sta, mvmvif->phy_ctxt->channel->band,
|
||||
true);
|
||||
} else if (old_state == IEEE80211_STA_AUTHORIZED &&
|
||||
new_state == IEEE80211_STA_ASSOC) {
|
||||
/* Multicast data frames are no longer allowed */
|
||||
iwl_mvm_mac_ctxt_changed(mvm, vif, false, NULL);
|
||||
if (!sta->tdls) {
|
||||
/* Multicast data frames are no longer allowed */
|
||||
iwl_mvm_mac_ctxt_changed(mvm, vif, false, NULL);
|
||||
|
||||
/* disable beacon filtering */
|
||||
ret = iwl_mvm_disable_beacon_filter(mvm, vif, 0);
|
||||
WARN_ON(ret &&
|
||||
!test_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED,
|
||||
&mvm->status));
|
||||
/*
|
||||
* Set this after the above iwl_mvm_mac_ctxt_changed()
|
||||
* to avoid sending high prio again for a little time.
|
||||
*/
|
||||
mvmvif->authorized = 0;
|
||||
|
||||
/* disable beacon filtering */
|
||||
ret = iwl_mvm_disable_beacon_filter(mvm, vif, 0);
|
||||
WARN_ON(ret &&
|
||||
!test_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED,
|
||||
&mvm->status));
|
||||
}
|
||||
ret = 0;
|
||||
} else if (old_state == IEEE80211_STA_ASSOC &&
|
||||
new_state == IEEE80211_STA_AUTH) {
|
||||
@@ -3342,6 +3355,21 @@ static void iwl_mvm_mac_mgd_prepare_tx(struct ieee80211_hw *hw,
|
||||
mutex_unlock(&mvm->mutex);
|
||||
}
|
||||
|
||||
static void iwl_mvm_mac_mgd_complete_tx(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_prep_tx_info *info)
|
||||
{
|
||||
struct iwl_mvm *mvm = IWL_MAC80211_GET_MVM(hw);
|
||||
|
||||
/* for successful cases (auth/assoc), don't cancel session protection */
|
||||
if (info->success)
|
||||
return;
|
||||
|
||||
mutex_lock(&mvm->mutex);
|
||||
iwl_mvm_stop_session_protection(mvm, vif);
|
||||
mutex_unlock(&mvm->mutex);
|
||||
}
|
||||
|
||||
static int iwl_mvm_mac_sched_scan_start(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
struct cfg80211_sched_scan_request *req,
|
||||
@@ -4704,6 +4732,9 @@ static void iwl_mvm_channel_switch_rx_beacon(struct ieee80211_hw *hw,
|
||||
if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_CS_MODIFY))
|
||||
return;
|
||||
|
||||
IWL_DEBUG_MAC80211(mvm, "Modify CSA on mac %d count = %d (old %d) mode = %d\n",
|
||||
mvmvif->id, chsw->count, mvmvif->csa_count, chsw->block_tx);
|
||||
|
||||
if (chsw->count >= mvmvif->csa_count && chsw->block_tx) {
|
||||
if (mvmvif->csa_misbehave) {
|
||||
/* Second time, give up on this AP*/
|
||||
@@ -4720,8 +4751,6 @@ static void iwl_mvm_channel_switch_rx_beacon(struct ieee80211_hw *hw,
|
||||
if (mvmvif->csa_failed)
|
||||
goto out_unlock;
|
||||
|
||||
IWL_DEBUG_MAC80211(mvm, "Modify CSA on mac %d count = %d mode = %d\n",
|
||||
mvmvif->id, chsw->count, chsw->block_tx);
|
||||
WARN_ON(iwl_mvm_send_cmd_pdu(mvm,
|
||||
WIDE_ID(MAC_CONF_GROUP,
|
||||
CHANNEL_SWITCH_TIME_EVENT_CMD),
|
||||
@@ -4873,6 +4902,8 @@ static int iwl_mvm_mac_get_survey(struct ieee80211_hw *hw, int idx,
|
||||
|
||||
static void iwl_mvm_set_sta_rate(u32 rate_n_flags, struct rate_info *rinfo)
|
||||
{
|
||||
u32 format = rate_n_flags & RATE_MCS_MOD_TYPE_MSK;
|
||||
|
||||
switch (rate_n_flags & RATE_MCS_CHAN_WIDTH_MSK) {
|
||||
case RATE_MCS_CHAN_WIDTH_20:
|
||||
rinfo->bw = RATE_INFO_BW_20;
|
||||
@@ -4888,30 +4919,65 @@ static void iwl_mvm_set_sta_rate(u32 rate_n_flags, struct rate_info *rinfo)
|
||||
break;
|
||||
}
|
||||
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK) {
|
||||
rinfo->flags |= RATE_INFO_FLAGS_MCS;
|
||||
rinfo->mcs = u32_get_bits(rate_n_flags, RATE_HT_MCS_INDEX_MSK);
|
||||
rinfo->nss = u32_get_bits(rate_n_flags,
|
||||
RATE_HT_MCS_NSS_MSK) + 1;
|
||||
if (rate_n_flags & RATE_MCS_SGI_MSK)
|
||||
rinfo->flags |= RATE_INFO_FLAGS_SHORT_GI;
|
||||
} else if (rate_n_flags & RATE_MCS_VHT_MSK) {
|
||||
rinfo->flags |= RATE_INFO_FLAGS_VHT_MCS;
|
||||
rinfo->mcs = u32_get_bits(rate_n_flags,
|
||||
RATE_VHT_MCS_RATE_CODE_MSK);
|
||||
rinfo->nss = u32_get_bits(rate_n_flags,
|
||||
RATE_VHT_MCS_NSS_MSK) + 1;
|
||||
if (rate_n_flags & RATE_MCS_SGI_MSK)
|
||||
rinfo->flags |= RATE_INFO_FLAGS_SHORT_GI;
|
||||
} else if (rate_n_flags & RATE_MCS_HE_MSK) {
|
||||
if (format == RATE_MCS_CCK_MSK ||
|
||||
format == RATE_MCS_LEGACY_OFDM_MSK) {
|
||||
int rate = u32_get_bits(rate_n_flags, RATE_LEGACY_RATE_MSK);
|
||||
|
||||
/* add the offset needed to get to the legacy ofdm indices */
|
||||
if (format == RATE_MCS_LEGACY_OFDM_MSK)
|
||||
rate += IWL_FIRST_OFDM_RATE;
|
||||
|
||||
switch (rate) {
|
||||
case IWL_RATE_1M_INDEX:
|
||||
rinfo->legacy = 10;
|
||||
break;
|
||||
case IWL_RATE_2M_INDEX:
|
||||
rinfo->legacy = 20;
|
||||
break;
|
||||
case IWL_RATE_5M_INDEX:
|
||||
rinfo->legacy = 55;
|
||||
break;
|
||||
case IWL_RATE_11M_INDEX:
|
||||
rinfo->legacy = 110;
|
||||
break;
|
||||
case IWL_RATE_6M_INDEX:
|
||||
rinfo->legacy = 60;
|
||||
break;
|
||||
case IWL_RATE_9M_INDEX:
|
||||
rinfo->legacy = 90;
|
||||
break;
|
||||
case IWL_RATE_12M_INDEX:
|
||||
rinfo->legacy = 120;
|
||||
break;
|
||||
case IWL_RATE_18M_INDEX:
|
||||
rinfo->legacy = 180;
|
||||
break;
|
||||
case IWL_RATE_24M_INDEX:
|
||||
rinfo->legacy = 240;
|
||||
break;
|
||||
case IWL_RATE_36M_INDEX:
|
||||
rinfo->legacy = 360;
|
||||
break;
|
||||
case IWL_RATE_48M_INDEX:
|
||||
rinfo->legacy = 480;
|
||||
break;
|
||||
case IWL_RATE_54M_INDEX:
|
||||
rinfo->legacy = 540;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
rinfo->nss = u32_get_bits(rate_n_flags,
|
||||
RATE_MCS_NSS_MSK) + 1;
|
||||
rinfo->mcs = format == RATE_MCS_HT_MSK ?
|
||||
RATE_HT_MCS_INDEX(rate_n_flags) :
|
||||
u32_get_bits(rate_n_flags, RATE_MCS_CODE_MSK);
|
||||
|
||||
if (format == RATE_MCS_HE_MSK) {
|
||||
u32 gi_ltf = u32_get_bits(rate_n_flags,
|
||||
RATE_MCS_HE_GI_LTF_MSK);
|
||||
|
||||
rinfo->flags |= RATE_INFO_FLAGS_HE_MCS;
|
||||
rinfo->mcs = u32_get_bits(rate_n_flags,
|
||||
RATE_VHT_MCS_RATE_CODE_MSK);
|
||||
rinfo->nss = u32_get_bits(rate_n_flags,
|
||||
RATE_VHT_MCS_NSS_MSK) + 1;
|
||||
|
||||
if (rate_n_flags & RATE_MCS_HE_106T_MSK) {
|
||||
rinfo->bw = RATE_INFO_BW_HE_RU;
|
||||
@@ -4925,10 +4991,10 @@ static void iwl_mvm_set_sta_rate(u32 rate_n_flags, struct rate_info *rinfo)
|
||||
rinfo->he_gi = NL80211_RATE_INFO_HE_GI_0_8;
|
||||
else if (gi_ltf == 2)
|
||||
rinfo->he_gi = NL80211_RATE_INFO_HE_GI_1_6;
|
||||
else if (rate_n_flags & RATE_MCS_SGI_MSK)
|
||||
rinfo->he_gi = NL80211_RATE_INFO_HE_GI_0_8;
|
||||
else
|
||||
else if (gi_ltf == 3)
|
||||
rinfo->he_gi = NL80211_RATE_INFO_HE_GI_3_2;
|
||||
else
|
||||
rinfo->he_gi = NL80211_RATE_INFO_HE_GI_0_8;
|
||||
break;
|
||||
case RATE_MCS_HE_TYPE_MU:
|
||||
if (gi_ltf == 0 || gi_ltf == 1)
|
||||
@@ -4948,46 +5014,19 @@ static void iwl_mvm_set_sta_rate(u32 rate_n_flags, struct rate_info *rinfo)
|
||||
|
||||
if (rate_n_flags & RATE_HE_DUAL_CARRIER_MODE_MSK)
|
||||
rinfo->he_dcm = 1;
|
||||
} else {
|
||||
switch (u32_get_bits(rate_n_flags, RATE_LEGACY_RATE_MSK)) {
|
||||
case IWL_RATE_1M_PLCP:
|
||||
rinfo->legacy = 10;
|
||||
break;
|
||||
case IWL_RATE_2M_PLCP:
|
||||
rinfo->legacy = 20;
|
||||
break;
|
||||
case IWL_RATE_5M_PLCP:
|
||||
rinfo->legacy = 55;
|
||||
break;
|
||||
case IWL_RATE_11M_PLCP:
|
||||
rinfo->legacy = 110;
|
||||
break;
|
||||
case IWL_RATE_6M_PLCP:
|
||||
rinfo->legacy = 60;
|
||||
break;
|
||||
case IWL_RATE_9M_PLCP:
|
||||
rinfo->legacy = 90;
|
||||
break;
|
||||
case IWL_RATE_12M_PLCP:
|
||||
rinfo->legacy = 120;
|
||||
break;
|
||||
case IWL_RATE_18M_PLCP:
|
||||
rinfo->legacy = 180;
|
||||
break;
|
||||
case IWL_RATE_24M_PLCP:
|
||||
rinfo->legacy = 240;
|
||||
break;
|
||||
case IWL_RATE_36M_PLCP:
|
||||
rinfo->legacy = 360;
|
||||
break;
|
||||
case IWL_RATE_48M_PLCP:
|
||||
rinfo->legacy = 480;
|
||||
break;
|
||||
case IWL_RATE_54M_PLCP:
|
||||
rinfo->legacy = 540;
|
||||
break;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
if (rate_n_flags & RATE_MCS_SGI_MSK)
|
||||
rinfo->flags |= RATE_INFO_FLAGS_SHORT_GI;
|
||||
|
||||
if (format == RATE_MCS_HT_MSK) {
|
||||
rinfo->flags |= RATE_INFO_FLAGS_MCS;
|
||||
|
||||
} else if (format == RATE_MCS_VHT_MSK) {
|
||||
rinfo->flags |= RATE_INFO_FLAGS_VHT_MCS;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
static void iwl_mvm_mac_sta_statistics(struct ieee80211_hw *hw,
|
||||
@@ -5332,6 +5371,7 @@ const struct ieee80211_ops iwl_mvm_hw_ops = {
|
||||
.sta_rc_update = iwl_mvm_sta_rc_update,
|
||||
.conf_tx = iwl_mvm_mac_conf_tx,
|
||||
.mgd_prepare_tx = iwl_mvm_mac_mgd_prepare_tx,
|
||||
.mgd_complete_tx = iwl_mvm_mac_mgd_complete_tx,
|
||||
.mgd_protect_tdls_discover = iwl_mvm_mac_mgd_protect_tdls_discover,
|
||||
.flush = iwl_mvm_mac_flush,
|
||||
.sched_scan_start = iwl_mvm_mac_sched_scan_start,
|
||||
|
||||
@@ -297,6 +297,7 @@ struct iwl_probe_resp_data {
|
||||
* see enum &iwl_mvm_low_latency_cause for causes.
|
||||
* @low_latency_actual: boolean, indicates low latency is set,
|
||||
* as a result from low_latency bit flags and takes force into account.
|
||||
* @authorized: indicates the AP station was set to authorized
|
||||
* @ps_disabled: indicates that this interface requires PS to be disabled
|
||||
* @queue_params: QoS params for this MAC
|
||||
* @bcast_sta: station used for broadcast packets. Used by the following
|
||||
@@ -330,6 +331,7 @@ struct iwl_mvm_vif {
|
||||
bool monitor_active;
|
||||
u8 low_latency: 6;
|
||||
u8 low_latency_actual: 1;
|
||||
u8 authorized:1;
|
||||
bool ps_disabled;
|
||||
struct iwl_mvm_vif_bf_data bf_data;
|
||||
|
||||
@@ -1443,12 +1445,17 @@ int __iwl_mvm_mac_start(struct iwl_mvm *mvm);
|
||||
int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm);
|
||||
|
||||
/* Utils */
|
||||
int iwl_mvm_legacy_hw_idx_to_mac80211_idx(u32 rate_n_flags,
|
||||
enum nl80211_band band);
|
||||
int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
|
||||
enum nl80211_band band);
|
||||
void iwl_mvm_hwrate_to_tx_rate(u32 rate_n_flags,
|
||||
enum nl80211_band band,
|
||||
struct ieee80211_tx_rate *r);
|
||||
u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx);
|
||||
void iwl_mvm_hwrate_to_tx_rate_v1(u32 rate_n_flags,
|
||||
enum nl80211_band band,
|
||||
struct ieee80211_tx_rate *r);
|
||||
u8 iwl_mvm_mac80211_idx_to_hwrate(const struct iwl_fw *fw, int rate_idx);
|
||||
u8 iwl_mvm_mac80211_ac_to_ucode_ac(enum ieee80211_ac_numbers ac);
|
||||
|
||||
static inline void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
|
||||
@@ -1629,6 +1636,8 @@ int iwl_mvm_mac_ctxt_send_beacon_cmd(struct iwl_mvm *mvm,
|
||||
void *data, int len);
|
||||
u8 iwl_mvm_mac_ctxt_get_lowest_rate(struct ieee80211_tx_info *info,
|
||||
struct ieee80211_vif *vif);
|
||||
u16 iwl_mvm_mac_ctxt_get_beacon_flags(const struct iwl_fw *fw,
|
||||
u8 rate_idx);
|
||||
void iwl_mvm_mac_ctxt_set_tim(struct iwl_mvm *mvm,
|
||||
__le32 *tim_index, __le32 *tim_size,
|
||||
u8 *beacon, u32 frame_size);
|
||||
@@ -1732,7 +1741,7 @@ iwl_mvm_vif_dbgfs_clean(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
|
||||
/* rate scaling */
|
||||
int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq);
|
||||
void iwl_mvm_update_frame_stats(struct iwl_mvm *mvm, u32 rate, bool agg);
|
||||
int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate);
|
||||
int rs_pretty_print_rate_v1(char *buf, int bufsz, const u32 rate);
|
||||
void rs_update_last_rssi(struct iwl_mvm *mvm,
|
||||
struct iwl_mvm_sta *mvmsta,
|
||||
struct ieee80211_rx_status *rx_status);
|
||||
|
||||
@@ -29,7 +29,6 @@
|
||||
|
||||
#define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux"
|
||||
MODULE_DESCRIPTION(DRV_DESCRIPTION);
|
||||
MODULE_AUTHOR(DRV_AUTHOR);
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
static const struct iwl_op_mode_ops iwl_mvm_ops;
|
||||
@@ -726,6 +725,183 @@ static int iwl_mvm_start_post_nvm(struct iwl_mvm *mvm)
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct iwl_mvm_frob_txf_data {
|
||||
u8 *buf;
|
||||
size_t buflen;
|
||||
};
|
||||
|
||||
static void iwl_mvm_frob_txf_key_iter(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta,
|
||||
struct ieee80211_key_conf *key,
|
||||
void *data)
|
||||
{
|
||||
struct iwl_mvm_frob_txf_data *txf = data;
|
||||
u8 keylen, match, matchend;
|
||||
u8 *keydata;
|
||||
size_t i;
|
||||
|
||||
switch (key->cipher) {
|
||||
case WLAN_CIPHER_SUITE_CCMP:
|
||||
keydata = key->key;
|
||||
keylen = key->keylen;
|
||||
break;
|
||||
case WLAN_CIPHER_SUITE_WEP40:
|
||||
case WLAN_CIPHER_SUITE_WEP104:
|
||||
case WLAN_CIPHER_SUITE_TKIP:
|
||||
/*
|
||||
* WEP has short keys which might show up in the payload,
|
||||
* and then you can deduce the key, so in this case just
|
||||
* remove all FIFO data.
|
||||
* For TKIP, we don't know the phase 2 keys here, so same.
|
||||
*/
|
||||
memset(txf->buf, 0xBB, txf->buflen);
|
||||
return;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
|
||||
/* scan for key material and clear it out */
|
||||
match = 0;
|
||||
for (i = 0; i < txf->buflen; i++) {
|
||||
if (txf->buf[i] != keydata[match]) {
|
||||
match = 0;
|
||||
continue;
|
||||
}
|
||||
match++;
|
||||
if (match == keylen) {
|
||||
memset(txf->buf + i - keylen, 0xAA, keylen);
|
||||
match = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* we're dealing with a FIFO, so check wrapped around data */
|
||||
matchend = match;
|
||||
for (i = 0; match && i < keylen - match; i++) {
|
||||
if (txf->buf[i] != keydata[match])
|
||||
break;
|
||||
match++;
|
||||
if (match == keylen) {
|
||||
memset(txf->buf, 0xAA, i + 1);
|
||||
memset(txf->buf + txf->buflen - matchend, 0xAA,
|
||||
matchend);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void iwl_mvm_frob_txf(void *ctx, void *buf, size_t buflen)
|
||||
{
|
||||
struct iwl_mvm_frob_txf_data txf = {
|
||||
.buf = buf,
|
||||
.buflen = buflen,
|
||||
};
|
||||
struct iwl_mvm *mvm = ctx;
|
||||
|
||||
/* embedded key material exists only on old API */
|
||||
if (iwl_mvm_has_new_tx_api(mvm))
|
||||
return;
|
||||
|
||||
rcu_read_lock();
|
||||
ieee80211_iter_keys_rcu(mvm->hw, NULL, iwl_mvm_frob_txf_key_iter, &txf);
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
static void iwl_mvm_frob_hcmd(void *ctx, void *hcmd, size_t len)
|
||||
{
|
||||
/* we only use wide headers for commands */
|
||||
struct iwl_cmd_header_wide *hdr = hcmd;
|
||||
unsigned int frob_start = sizeof(*hdr), frob_end = 0;
|
||||
|
||||
if (len < sizeof(hdr))
|
||||
return;
|
||||
|
||||
/* all the commands we care about are in LONG_GROUP */
|
||||
if (hdr->group_id != LONG_GROUP)
|
||||
return;
|
||||
|
||||
switch (hdr->cmd) {
|
||||
case WEP_KEY:
|
||||
case WOWLAN_TKIP_PARAM:
|
||||
case WOWLAN_KEK_KCK_MATERIAL:
|
||||
case ADD_STA_KEY:
|
||||
/*
|
||||
* blank out everything here, easier than dealing
|
||||
* with the various versions of the command
|
||||
*/
|
||||
frob_end = INT_MAX;
|
||||
break;
|
||||
case MGMT_MCAST_KEY:
|
||||
frob_start = offsetof(struct iwl_mvm_mgmt_mcast_key_cmd, igtk);
|
||||
BUILD_BUG_ON(offsetof(struct iwl_mvm_mgmt_mcast_key_cmd, igtk) !=
|
||||
offsetof(struct iwl_mvm_mgmt_mcast_key_cmd_v1, igtk));
|
||||
|
||||
frob_end = offsetofend(struct iwl_mvm_mgmt_mcast_key_cmd, igtk);
|
||||
BUILD_BUG_ON(offsetof(struct iwl_mvm_mgmt_mcast_key_cmd, igtk) <
|
||||
offsetof(struct iwl_mvm_mgmt_mcast_key_cmd_v1, igtk));
|
||||
break;
|
||||
}
|
||||
|
||||
if (frob_start >= frob_end)
|
||||
return;
|
||||
|
||||
if (frob_end > len)
|
||||
frob_end = len;
|
||||
|
||||
memset((u8 *)hcmd + frob_start, 0xAA, frob_end - frob_start);
|
||||
}
|
||||
|
||||
static void iwl_mvm_frob_mem(void *ctx, u32 mem_addr, void *mem, size_t buflen)
|
||||
{
|
||||
const struct iwl_dump_exclude *excl;
|
||||
struct iwl_mvm *mvm = ctx;
|
||||
int i;
|
||||
|
||||
switch (mvm->fwrt.cur_fw_img) {
|
||||
case IWL_UCODE_INIT:
|
||||
default:
|
||||
/* not relevant */
|
||||
return;
|
||||
case IWL_UCODE_REGULAR:
|
||||
case IWL_UCODE_REGULAR_USNIFFER:
|
||||
excl = mvm->fw->dump_excl;
|
||||
break;
|
||||
case IWL_UCODE_WOWLAN:
|
||||
excl = mvm->fw->dump_excl_wowlan;
|
||||
break;
|
||||
}
|
||||
|
||||
BUILD_BUG_ON(sizeof(mvm->fw->dump_excl) !=
|
||||
sizeof(mvm->fw->dump_excl_wowlan));
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mvm->fw->dump_excl); i++) {
|
||||
u32 start, end;
|
||||
|
||||
if (!excl[i].addr || !excl[i].size)
|
||||
continue;
|
||||
|
||||
start = excl[i].addr;
|
||||
end = start + excl[i].size;
|
||||
|
||||
if (end <= mem_addr || start >= mem_addr + buflen)
|
||||
continue;
|
||||
|
||||
if (start < mem_addr)
|
||||
start = mem_addr;
|
||||
|
||||
if (end > mem_addr + buflen)
|
||||
end = mem_addr + buflen;
|
||||
|
||||
memset((u8 *)mem + start - mem_addr, 0xAA, end - start);
|
||||
}
|
||||
}
|
||||
|
||||
static const struct iwl_dump_sanitize_ops iwl_mvm_sanitize_ops = {
|
||||
.frob_txf = iwl_mvm_frob_txf,
|
||||
.frob_hcmd = iwl_mvm_frob_hcmd,
|
||||
.frob_mem = iwl_mvm_frob_mem,
|
||||
};
|
||||
|
||||
static struct iwl_op_mode *
|
||||
iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
||||
const struct iwl_fw *fw, struct dentry *dbgfs_dir)
|
||||
@@ -775,7 +951,7 @@ iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
||||
mvm->hw = hw;
|
||||
|
||||
iwl_fw_runtime_init(&mvm->fwrt, trans, fw, &iwl_mvm_fwrt_ops, mvm,
|
||||
dbgfs_dir);
|
||||
&iwl_mvm_sanitize_ops, mvm, dbgfs_dir);
|
||||
|
||||
iwl_mvm_get_acpi_tables(mvm);
|
||||
|
||||
@@ -868,8 +1044,8 @@ iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
||||
mvm->cmd_ver.range_resp =
|
||||
iwl_fw_lookup_notif_ver(mvm->fw, LOCATION_GROUP,
|
||||
TOF_RANGE_RESPONSE_NOTIF, 5);
|
||||
/* we only support up to version 8 */
|
||||
if (WARN_ON_ONCE(mvm->cmd_ver.range_resp > 8))
|
||||
/* we only support up to version 9 */
|
||||
if (WARN_ON_ONCE(mvm->cmd_ver.range_resp > 9))
|
||||
goto out_free;
|
||||
|
||||
/*
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright (C) 2012-2014, 2018-2019 Intel Corporation
|
||||
* Copyright (C) 2012-2014, 2018-2019, 2021 Intel Corporation
|
||||
* Copyright (C) 2013-2014 Intel Mobile Communications GmbH
|
||||
* Copyright (C) 2015-2017 Intel Deutschland GmbH
|
||||
*/
|
||||
@@ -128,6 +128,19 @@ static void iwl_mvm_power_configure_uapsd(struct iwl_mvm *mvm,
|
||||
enum ieee80211_ac_numbers ac;
|
||||
bool tid_found = false;
|
||||
|
||||
if (test_bit(IWL_MVM_STATUS_IN_D3, &mvm->status) ||
|
||||
cmd->flags & cpu_to_le16(POWER_FLAGS_SNOOZE_ENA_MSK)) {
|
||||
cmd->rx_data_timeout_uapsd =
|
||||
cpu_to_le32(IWL_MVM_WOWLAN_PS_RX_DATA_TIMEOUT);
|
||||
cmd->tx_data_timeout_uapsd =
|
||||
cpu_to_le32(IWL_MVM_WOWLAN_PS_TX_DATA_TIMEOUT);
|
||||
} else {
|
||||
cmd->rx_data_timeout_uapsd =
|
||||
cpu_to_le32(IWL_MVM_UAPSD_RX_DATA_TIMEOUT);
|
||||
cmd->tx_data_timeout_uapsd =
|
||||
cpu_to_le32(IWL_MVM_UAPSD_TX_DATA_TIMEOUT);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_IWLWIFI_DEBUGFS
|
||||
/* set advanced pm flag with no uapsd ACs to enable ps-poll */
|
||||
if (mvmvif->dbgfs_pm.use_ps_poll) {
|
||||
@@ -182,19 +195,6 @@ static void iwl_mvm_power_configure_uapsd(struct iwl_mvm *mvm,
|
||||
|
||||
cmd->uapsd_max_sp = mvm->hw->uapsd_max_sp_len;
|
||||
|
||||
if (test_bit(IWL_MVM_STATUS_IN_D3, &mvm->status) ||
|
||||
cmd->flags & cpu_to_le16(POWER_FLAGS_SNOOZE_ENA_MSK)) {
|
||||
cmd->rx_data_timeout_uapsd =
|
||||
cpu_to_le32(IWL_MVM_WOWLAN_PS_RX_DATA_TIMEOUT);
|
||||
cmd->tx_data_timeout_uapsd =
|
||||
cpu_to_le32(IWL_MVM_WOWLAN_PS_TX_DATA_TIMEOUT);
|
||||
} else {
|
||||
cmd->rx_data_timeout_uapsd =
|
||||
cpu_to_le32(IWL_MVM_UAPSD_RX_DATA_TIMEOUT);
|
||||
cmd->tx_data_timeout_uapsd =
|
||||
cpu_to_le32(IWL_MVM_UAPSD_TX_DATA_TIMEOUT);
|
||||
}
|
||||
|
||||
if (cmd->flags & cpu_to_le16(POWER_FLAGS_SNOOZE_ENA_MSK)) {
|
||||
cmd->heavy_tx_thld_packets =
|
||||
IWL_MVM_PS_SNOOZE_HEAVY_TX_THLD_PACKETS;
|
||||
|
||||
@@ -32,10 +32,6 @@ static u8 rs_fw_set_active_chains(u8 chains)
|
||||
fw_chains |= IWL_TLC_MNG_CHAIN_A_MSK;
|
||||
if (chains & ANT_B)
|
||||
fw_chains |= IWL_TLC_MNG_CHAIN_B_MSK;
|
||||
if (chains & ANT_C)
|
||||
WARN(false,
|
||||
"tlc offload doesn't support antenna C. chains: 0x%x\n",
|
||||
chains);
|
||||
|
||||
return fw_chains;
|
||||
}
|
||||
@@ -314,7 +310,19 @@ void iwl_mvm_tlc_update_notif(struct iwl_mvm *mvm,
|
||||
|
||||
if (flags & IWL_TLC_NOTIF_FLAG_RATE) {
|
||||
char pretty_rate[100];
|
||||
|
||||
if (iwl_fw_lookup_notif_ver(mvm->fw, DATA_PATH_GROUP,
|
||||
TLC_MNG_UPDATE_NOTIF, 0) < 3) {
|
||||
rs_pretty_print_rate_v1(pretty_rate, sizeof(pretty_rate),
|
||||
le32_to_cpu(notif->rate));
|
||||
IWL_DEBUG_RATE(mvm,
|
||||
"Got rate in old format. Rate: %s. Converting.\n",
|
||||
pretty_rate);
|
||||
lq_sta->last_rate_n_flags =
|
||||
iwl_new_rate_from_v1(le32_to_cpu(notif->rate));
|
||||
} else {
|
||||
lq_sta->last_rate_n_flags = le32_to_cpu(notif->rate);
|
||||
}
|
||||
rs_pretty_print_rate(pretty_rate, sizeof(pretty_rate),
|
||||
lq_sta->last_rate_n_flags);
|
||||
IWL_DEBUG_RATE(mvm, "new rate: %s\n", pretty_rate);
|
||||
|
||||
@@ -4,11 +4,6 @@
|
||||
* Copyright(c) 2005 - 2014, 2018 - 2021 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/skbuff.h>
|
||||
@@ -335,15 +330,15 @@ static const struct rs_tx_column rs_tx_columns[] = {
|
||||
static inline u8 rs_extract_rate(u32 rate_n_flags)
|
||||
{
|
||||
/* also works for HT because bits 7:6 are zero there */
|
||||
return (u8)(rate_n_flags & RATE_LEGACY_RATE_MSK);
|
||||
return (u8)(rate_n_flags & RATE_LEGACY_RATE_MSK_V1);
|
||||
}
|
||||
|
||||
static int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
|
||||
{
|
||||
int idx = 0;
|
||||
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK) {
|
||||
idx = rate_n_flags & RATE_HT_MCS_RATE_CODE_MSK;
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK_V1) {
|
||||
idx = rate_n_flags & RATE_HT_MCS_RATE_CODE_MSK_V1;
|
||||
idx += IWL_RATE_MCS_0_INDEX;
|
||||
|
||||
/* skip 9M not supported in HT*/
|
||||
@@ -351,8 +346,8 @@ static int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
|
||||
idx += 1;
|
||||
if ((idx >= IWL_FIRST_HT_RATE) && (idx <= IWL_LAST_HT_RATE))
|
||||
return idx;
|
||||
} else if (rate_n_flags & RATE_MCS_VHT_MSK ||
|
||||
rate_n_flags & RATE_MCS_HE_MSK) {
|
||||
} else if (rate_n_flags & RATE_MCS_VHT_MSK_V1 ||
|
||||
rate_n_flags & RATE_MCS_HE_MSK_V1) {
|
||||
idx = rate_n_flags & RATE_VHT_MCS_RATE_CODE_MSK;
|
||||
idx += IWL_RATE_MCS_0_INDEX;
|
||||
|
||||
@@ -361,8 +356,8 @@ static int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
|
||||
idx++;
|
||||
if ((idx >= IWL_FIRST_VHT_RATE) && (idx <= IWL_LAST_VHT_RATE))
|
||||
return idx;
|
||||
if ((rate_n_flags & RATE_MCS_HE_MSK) &&
|
||||
(idx <= IWL_LAST_HE_RATE))
|
||||
if ((rate_n_flags & RATE_MCS_HE_MSK_V1) &&
|
||||
idx <= IWL_LAST_HE_RATE)
|
||||
return idx;
|
||||
} else {
|
||||
/* legacy rate format, search for match in table */
|
||||
@@ -459,44 +454,8 @@ static const u16 expected_tpt_mimo2_160MHz[4][IWL_RATE_COUNT] = {
|
||||
{0, 0, 0, 0, 971, 0, 1925, 2861, 3779, 5574, 7304, 8147, 8976, 10592, 11640},
|
||||
};
|
||||
|
||||
/* mbps, mcs */
|
||||
static const struct iwl_rate_mcs_info iwl_rate_mcs[IWL_RATE_COUNT] = {
|
||||
{ "1", "BPSK DSSS"},
|
||||
{ "2", "QPSK DSSS"},
|
||||
{"5.5", "BPSK CCK"},
|
||||
{ "11", "QPSK CCK"},
|
||||
{ "6", "BPSK 1/2"},
|
||||
{ "9", "BPSK 1/2"},
|
||||
{ "12", "QPSK 1/2"},
|
||||
{ "18", "QPSK 3/4"},
|
||||
{ "24", "16QAM 1/2"},
|
||||
{ "36", "16QAM 3/4"},
|
||||
{ "48", "64QAM 2/3"},
|
||||
{ "54", "64QAM 3/4"},
|
||||
{ "60", "64QAM 5/6"},
|
||||
};
|
||||
|
||||
#define MCS_INDEX_PER_STREAM (8)
|
||||
|
||||
static const char *rs_pretty_ant(u8 ant)
|
||||
{
|
||||
static const char * const ant_name[] = {
|
||||
[ANT_NONE] = "None",
|
||||
[ANT_A] = "A",
|
||||
[ANT_B] = "B",
|
||||
[ANT_AB] = "AB",
|
||||
[ANT_C] = "C",
|
||||
[ANT_AC] = "AC",
|
||||
[ANT_BC] = "BC",
|
||||
[ANT_ABC] = "ABC",
|
||||
};
|
||||
|
||||
if (ant > ANT_ABC)
|
||||
return "UNKNOWN";
|
||||
|
||||
return ant_name[ant];
|
||||
}
|
||||
|
||||
static const char *rs_pretty_lq_type(enum iwl_table_type type)
|
||||
{
|
||||
static const char * const lq_types[] = {
|
||||
@@ -558,7 +517,7 @@ static char *rs_pretty_rate(const struct rs_rate *rate)
|
||||
rate_str = "BAD_RATE";
|
||||
|
||||
sprintf(buf, "(%s|%s|%s)", rs_pretty_lq_type(rate->type),
|
||||
rs_pretty_ant(rate->ant), rate_str);
|
||||
iwl_rs_pretty_ant(rate->ant), rate_str);
|
||||
return buf;
|
||||
}
|
||||
|
||||
@@ -654,8 +613,7 @@ static void rs_tl_turn_on_agg(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvmsta,
|
||||
static inline int get_num_of_ant_from_rate(u32 rate_n_flags)
|
||||
{
|
||||
return !!(rate_n_flags & RATE_MCS_ANT_A_MSK) +
|
||||
!!(rate_n_flags & RATE_MCS_ANT_B_MSK) +
|
||||
!!(rate_n_flags & RATE_MCS_ANT_C_MSK);
|
||||
!!(rate_n_flags & RATE_MCS_ANT_B_MSK);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -820,12 +778,12 @@ static u32 ucode_rate_from_rs_rate(struct iwl_mvm *mvm,
|
||||
int index = rate->index;
|
||||
|
||||
ucode_rate |= ((rate->ant << RATE_MCS_ANT_POS) &
|
||||
RATE_MCS_ANT_ABC_MSK);
|
||||
RATE_MCS_ANT_AB_MSK);
|
||||
|
||||
if (is_legacy(rate)) {
|
||||
ucode_rate |= iwl_rates[index].plcp;
|
||||
if (index >= IWL_FIRST_CCK_RATE && index <= IWL_LAST_CCK_RATE)
|
||||
ucode_rate |= RATE_MCS_CCK_MSK;
|
||||
ucode_rate |= RATE_MCS_CCK_MSK_V1;
|
||||
return ucode_rate;
|
||||
}
|
||||
|
||||
@@ -840,7 +798,7 @@ static u32 ucode_rate_from_rs_rate(struct iwl_mvm *mvm,
|
||||
IWL_ERR(mvm, "Invalid HT rate index %d\n", index);
|
||||
index = IWL_LAST_HT_RATE;
|
||||
}
|
||||
ucode_rate |= RATE_MCS_HT_MSK;
|
||||
ucode_rate |= RATE_MCS_HT_MSK_V1;
|
||||
|
||||
if (is_ht_siso(rate))
|
||||
ucode_rate |= iwl_rates[index].plcp_ht_siso;
|
||||
@@ -853,7 +811,7 @@ static u32 ucode_rate_from_rs_rate(struct iwl_mvm *mvm,
|
||||
IWL_ERR(mvm, "Invalid VHT rate index %d\n", index);
|
||||
index = IWL_LAST_VHT_RATE;
|
||||
}
|
||||
ucode_rate |= RATE_MCS_VHT_MSK;
|
||||
ucode_rate |= RATE_MCS_VHT_MSK_V1;
|
||||
if (is_vht_siso(rate))
|
||||
ucode_rate |= iwl_rates[index].plcp_vht_siso;
|
||||
else if (is_vht_mimo2(rate))
|
||||
@@ -873,9 +831,9 @@ static u32 ucode_rate_from_rs_rate(struct iwl_mvm *mvm,
|
||||
|
||||
ucode_rate |= rate->bw;
|
||||
if (rate->sgi)
|
||||
ucode_rate |= RATE_MCS_SGI_MSK;
|
||||
ucode_rate |= RATE_MCS_SGI_MSK_V1;
|
||||
if (rate->ldpc)
|
||||
ucode_rate |= RATE_MCS_LDPC_MSK;
|
||||
ucode_rate |= RATE_MCS_LDPC_MSK_V1;
|
||||
|
||||
return ucode_rate;
|
||||
}
|
||||
@@ -885,7 +843,7 @@ static int rs_rate_from_ucode_rate(const u32 ucode_rate,
|
||||
enum nl80211_band band,
|
||||
struct rs_rate *rate)
|
||||
{
|
||||
u32 ant_msk = ucode_rate & RATE_MCS_ANT_ABC_MSK;
|
||||
u32 ant_msk = ucode_rate & RATE_MCS_ANT_AB_MSK;
|
||||
u8 num_of_ant = get_num_of_ant_from_rate(ucode_rate);
|
||||
u8 nss;
|
||||
|
||||
@@ -898,9 +856,9 @@ static int rs_rate_from_ucode_rate(const u32 ucode_rate,
|
||||
rate->ant = (ant_msk >> RATE_MCS_ANT_POS);
|
||||
|
||||
/* Legacy */
|
||||
if (!(ucode_rate & RATE_MCS_HT_MSK) &&
|
||||
!(ucode_rate & RATE_MCS_VHT_MSK) &&
|
||||
!(ucode_rate & RATE_MCS_HE_MSK)) {
|
||||
if (!(ucode_rate & RATE_MCS_HT_MSK_V1) &&
|
||||
!(ucode_rate & RATE_MCS_VHT_MSK_V1) &&
|
||||
!(ucode_rate & RATE_MCS_HE_MSK_V1)) {
|
||||
if (num_of_ant == 1) {
|
||||
if (band == NL80211_BAND_5GHZ)
|
||||
rate->type = LQ_LEGACY_A;
|
||||
@@ -912,20 +870,20 @@ static int rs_rate_from_ucode_rate(const u32 ucode_rate,
|
||||
}
|
||||
|
||||
/* HT, VHT or HE */
|
||||
if (ucode_rate & RATE_MCS_SGI_MSK)
|
||||
if (ucode_rate & RATE_MCS_SGI_MSK_V1)
|
||||
rate->sgi = true;
|
||||
if (ucode_rate & RATE_MCS_LDPC_MSK)
|
||||
if (ucode_rate & RATE_MCS_LDPC_MSK_V1)
|
||||
rate->ldpc = true;
|
||||
if (ucode_rate & RATE_MCS_STBC_MSK)
|
||||
rate->stbc = true;
|
||||
if (ucode_rate & RATE_MCS_BF_MSK)
|
||||
rate->bfer = true;
|
||||
|
||||
rate->bw = ucode_rate & RATE_MCS_CHAN_WIDTH_MSK;
|
||||
rate->bw = ucode_rate & RATE_MCS_CHAN_WIDTH_MSK_V1;
|
||||
|
||||
if (ucode_rate & RATE_MCS_HT_MSK) {
|
||||
nss = ((ucode_rate & RATE_HT_MCS_NSS_MSK) >>
|
||||
RATE_HT_MCS_NSS_POS) + 1;
|
||||
if (ucode_rate & RATE_MCS_HT_MSK_V1) {
|
||||
nss = ((ucode_rate & RATE_HT_MCS_NSS_MSK_V1) >>
|
||||
RATE_HT_MCS_NSS_POS_V1) + 1;
|
||||
|
||||
if (nss == 1) {
|
||||
rate->type = LQ_HT_SISO;
|
||||
@@ -938,7 +896,7 @@ static int rs_rate_from_ucode_rate(const u32 ucode_rate,
|
||||
} else {
|
||||
WARN_ON_ONCE(1);
|
||||
}
|
||||
} else if (ucode_rate & RATE_MCS_VHT_MSK) {
|
||||
} else if (ucode_rate & RATE_MCS_VHT_MSK_V1) {
|
||||
nss = ((ucode_rate & RATE_VHT_MCS_NSS_MSK) >>
|
||||
RATE_VHT_MCS_NSS_POS) + 1;
|
||||
|
||||
@@ -953,7 +911,7 @@ static int rs_rate_from_ucode_rate(const u32 ucode_rate,
|
||||
} else {
|
||||
WARN_ON_ONCE(1);
|
||||
}
|
||||
} else if (ucode_rate & RATE_MCS_HE_MSK) {
|
||||
} else if (ucode_rate & RATE_MCS_HE_MSK_V1) {
|
||||
nss = ((ucode_rate & RATE_VHT_MCS_NSS_MSK) >>
|
||||
RATE_VHT_MCS_NSS_POS) + 1;
|
||||
|
||||
@@ -981,9 +939,6 @@ static int rs_toggle_antenna(u32 valid_ant, struct rs_rate *rate)
|
||||
{
|
||||
u8 new_ant_type;
|
||||
|
||||
if (!rate->ant || WARN_ON_ONCE(rate->ant & ANT_C))
|
||||
return 0;
|
||||
|
||||
if (!rs_is_valid_ant(valid_ant, rate->ant))
|
||||
return 0;
|
||||
|
||||
@@ -2552,7 +2507,7 @@ static void rs_get_initial_rate(struct iwl_mvm *mvm,
|
||||
}
|
||||
|
||||
IWL_DEBUG_RATE(mvm, "Best ANT: %s Best RSSI: %d\n",
|
||||
rs_pretty_ant(best_ant), best_rssi);
|
||||
iwl_rs_pretty_ant(best_ant), best_rssi);
|
||||
|
||||
if (best_ant != ANT_A && best_ant != ANT_B)
|
||||
rate->ant = first_antenna(valid_tx_ant);
|
||||
@@ -2652,7 +2607,6 @@ void rs_update_last_rssi(struct iwl_mvm *mvm,
|
||||
lq_sta->pers.chains = rx_status->chains;
|
||||
lq_sta->pers.chain_signal[0] = rx_status->chain_signal[0];
|
||||
lq_sta->pers.chain_signal[1] = rx_status->chain_signal[1];
|
||||
lq_sta->pers.chain_signal[2] = rx_status->chain_signal[2];
|
||||
lq_sta->pers.last_rssi = S8_MIN;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(lq_sta->pers.chain_signal); i++) {
|
||||
@@ -2738,8 +2692,8 @@ static void rs_drv_get_rate(void *mvm_r, struct ieee80211_sta *sta,
|
||||
return;
|
||||
|
||||
lq_sta = mvm_sta;
|
||||
iwl_mvm_hwrate_to_tx_rate(lq_sta->last_rate_n_flags,
|
||||
info->band, &info->control.rates[0]);
|
||||
iwl_mvm_hwrate_to_tx_rate_v1(lq_sta->last_rate_n_flags,
|
||||
info->band, &info->control.rates[0]);
|
||||
info->control.rates[0].count = 1;
|
||||
|
||||
/* Report the optimal rate based on rssi and STA caps if we haven't
|
||||
@@ -2749,8 +2703,8 @@ static void rs_drv_get_rate(void *mvm_r, struct ieee80211_sta *sta,
|
||||
optimal_rate = rs_get_optimal_rate(mvm, lq_sta);
|
||||
last_ucode_rate = ucode_rate_from_rs_rate(mvm,
|
||||
optimal_rate);
|
||||
iwl_mvm_hwrate_to_tx_rate(last_ucode_rate, info->band,
|
||||
&txrc->reported_rate);
|
||||
iwl_mvm_hwrate_to_tx_rate_v1(last_ucode_rate, info->band,
|
||||
&txrc->reported_rate);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -2909,7 +2863,7 @@ void iwl_mvm_update_frame_stats(struct iwl_mvm *mvm, u32 rate, bool agg)
|
||||
|
||||
mvm->drv_rx_stats.success_frames++;
|
||||
|
||||
switch (rate & RATE_MCS_CHAN_WIDTH_MSK) {
|
||||
switch (rate & RATE_MCS_CHAN_WIDTH_MSK_V1) {
|
||||
case RATE_MCS_CHAN_WIDTH_20:
|
||||
mvm->drv_rx_stats.bw_20_frames++;
|
||||
break;
|
||||
@@ -2926,10 +2880,10 @@ void iwl_mvm_update_frame_stats(struct iwl_mvm *mvm, u32 rate, bool agg)
|
||||
WARN_ONCE(1, "bad BW. rate 0x%x", rate);
|
||||
}
|
||||
|
||||
if (rate & RATE_MCS_HT_MSK) {
|
||||
if (rate & RATE_MCS_HT_MSK_V1) {
|
||||
mvm->drv_rx_stats.ht_frames++;
|
||||
nss = ((rate & RATE_HT_MCS_NSS_MSK) >> RATE_HT_MCS_NSS_POS) + 1;
|
||||
} else if (rate & RATE_MCS_VHT_MSK) {
|
||||
nss = ((rate & RATE_HT_MCS_NSS_MSK_V1) >> RATE_HT_MCS_NSS_POS_V1) + 1;
|
||||
} else if (rate & RATE_MCS_VHT_MSK_V1) {
|
||||
mvm->drv_rx_stats.vht_frames++;
|
||||
nss = ((rate & RATE_VHT_MCS_NSS_MSK) >>
|
||||
RATE_VHT_MCS_NSS_POS) + 1;
|
||||
@@ -2942,7 +2896,7 @@ void iwl_mvm_update_frame_stats(struct iwl_mvm *mvm, u32 rate, bool agg)
|
||||
else if (nss == 2)
|
||||
mvm->drv_rx_stats.mimo2_frames++;
|
||||
|
||||
if (rate & RATE_MCS_SGI_MSK)
|
||||
if (rate & RATE_MCS_SGI_MSK_V1)
|
||||
mvm->drv_rx_stats.sgi_frames++;
|
||||
else
|
||||
mvm->drv_rx_stats.ngi_frames++;
|
||||
@@ -3323,7 +3277,7 @@ static void rs_build_rates_table_from_fixed(struct iwl_mvm *mvm,
|
||||
int i;
|
||||
int num_rates = ARRAY_SIZE(lq_cmd->rs_table);
|
||||
__le32 ucode_rate_le32 = cpu_to_le32(ucode_rate);
|
||||
u8 ant = (ucode_rate & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS;
|
||||
u8 ant = (ucode_rate & RATE_MCS_ANT_AB_MSK) >> RATE_MCS_ANT_POS;
|
||||
|
||||
for (i = 0; i < num_rates; i++)
|
||||
lq_cmd->rs_table[i] = ucode_rate_le32;
|
||||
@@ -3688,35 +3642,37 @@ static void rs_free_sta(void *mvm_r, struct ieee80211_sta *sta, void *mvm_sta)
|
||||
IWL_DEBUG_RATE(mvm, "leave\n");
|
||||
}
|
||||
|
||||
int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate)
|
||||
int rs_pretty_print_rate_v1(char *buf, int bufsz, const u32 rate)
|
||||
{
|
||||
|
||||
char *type, *bw;
|
||||
char *type;
|
||||
u8 mcs = 0, nss = 0;
|
||||
u8 ant = (rate & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS;
|
||||
u8 ant = (rate & RATE_MCS_ANT_AB_MSK) >> RATE_MCS_ANT_POS;
|
||||
u32 bw = (rate & RATE_MCS_CHAN_WIDTH_MSK_V1) >>
|
||||
RATE_MCS_CHAN_WIDTH_POS;
|
||||
|
||||
if (!(rate & RATE_MCS_HT_MSK) &&
|
||||
!(rate & RATE_MCS_VHT_MSK) &&
|
||||
!(rate & RATE_MCS_HE_MSK)) {
|
||||
if (!(rate & RATE_MCS_HT_MSK_V1) &&
|
||||
!(rate & RATE_MCS_VHT_MSK_V1) &&
|
||||
!(rate & RATE_MCS_HE_MSK_V1)) {
|
||||
int index = iwl_hwrate_to_plcp_idx(rate);
|
||||
|
||||
return scnprintf(buf, bufsz, "Legacy | ANT: %s Rate: %s Mbps",
|
||||
rs_pretty_ant(ant),
|
||||
iwl_rs_pretty_ant(ant),
|
||||
index == IWL_RATE_INVALID ? "BAD" :
|
||||
iwl_rate_mcs[index].mbps);
|
||||
iwl_rate_mcs(index)->mbps);
|
||||
}
|
||||
|
||||
if (rate & RATE_MCS_VHT_MSK) {
|
||||
if (rate & RATE_MCS_VHT_MSK_V1) {
|
||||
type = "VHT";
|
||||
mcs = rate & RATE_VHT_MCS_RATE_CODE_MSK;
|
||||
nss = ((rate & RATE_VHT_MCS_NSS_MSK)
|
||||
>> RATE_VHT_MCS_NSS_POS) + 1;
|
||||
} else if (rate & RATE_MCS_HT_MSK) {
|
||||
} else if (rate & RATE_MCS_HT_MSK_V1) {
|
||||
type = "HT";
|
||||
mcs = rate & RATE_HT_MCS_INDEX_MSK;
|
||||
nss = ((rate & RATE_HT_MCS_NSS_MSK)
|
||||
>> RATE_HT_MCS_NSS_POS) + 1;
|
||||
} else if (rate & RATE_MCS_HE_MSK) {
|
||||
mcs = rate & RATE_HT_MCS_INDEX_MSK_V1;
|
||||
nss = ((rate & RATE_HT_MCS_NSS_MSK_V1)
|
||||
>> RATE_HT_MCS_NSS_POS_V1) + 1;
|
||||
} else if (rate & RATE_MCS_HE_MSK_V1) {
|
||||
type = "HE";
|
||||
mcs = rate & RATE_VHT_MCS_RATE_CODE_MSK;
|
||||
nss = ((rate & RATE_VHT_MCS_NSS_MSK)
|
||||
@@ -3725,29 +3681,12 @@ int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate)
|
||||
type = "Unknown"; /* shouldn't happen */
|
||||
}
|
||||
|
||||
switch (rate & RATE_MCS_CHAN_WIDTH_MSK) {
|
||||
case RATE_MCS_CHAN_WIDTH_20:
|
||||
bw = "20Mhz";
|
||||
break;
|
||||
case RATE_MCS_CHAN_WIDTH_40:
|
||||
bw = "40Mhz";
|
||||
break;
|
||||
case RATE_MCS_CHAN_WIDTH_80:
|
||||
bw = "80Mhz";
|
||||
break;
|
||||
case RATE_MCS_CHAN_WIDTH_160:
|
||||
bw = "160Mhz";
|
||||
break;
|
||||
default:
|
||||
bw = "BAD BW";
|
||||
}
|
||||
|
||||
return scnprintf(buf, bufsz,
|
||||
"0x%x: %s | ANT: %s BW: %s MCS: %d NSS: %d %s%s%s%s%s",
|
||||
rate, type, rs_pretty_ant(ant), bw, mcs, nss,
|
||||
(rate & RATE_MCS_SGI_MSK) ? "SGI " : "NGI ",
|
||||
rate, type, iwl_rs_pretty_ant(ant), iwl_rs_pretty_bw(bw), mcs, nss,
|
||||
(rate & RATE_MCS_SGI_MSK_V1) ? "SGI " : "NGI ",
|
||||
(rate & RATE_MCS_STBC_MSK) ? "STBC " : "",
|
||||
(rate & RATE_MCS_LDPC_MSK) ? "LDPC " : "",
|
||||
(rate & RATE_MCS_LDPC_MSK_V1) ? "LDPC " : "",
|
||||
(rate & RATE_HE_DUAL_CARRIER_MODE_MSK) ? "DCM " : "",
|
||||
(rate & RATE_MCS_BF_MSK) ? "BF " : "");
|
||||
}
|
||||
@@ -3830,10 +3769,9 @@ static ssize_t rs_sta_dbgfs_scale_table_read(struct file *file,
|
||||
lq_sta->active_legacy_rate);
|
||||
desc += scnprintf(buff + desc, bufsz - desc, "fixed rate 0x%X\n",
|
||||
lq_sta->pers.dbg_fixed_rate);
|
||||
desc += scnprintf(buff + desc, bufsz - desc, "valid_tx_ant %s%s%s\n",
|
||||
desc += scnprintf(buff + desc, bufsz - desc, "valid_tx_ant %s%s\n",
|
||||
(iwl_mvm_get_valid_tx_ant(mvm) & ANT_A) ? "ANT_A," : "",
|
||||
(iwl_mvm_get_valid_tx_ant(mvm) & ANT_B) ? "ANT_B," : "",
|
||||
(iwl_mvm_get_valid_tx_ant(mvm) & ANT_C) ? "ANT_C" : "");
|
||||
(iwl_mvm_get_valid_tx_ant(mvm) & ANT_B) ? "ANT_B," : "");
|
||||
desc += scnprintf(buff + desc, bufsz - desc, "lq type %s\n",
|
||||
(is_legacy(rate)) ? "legacy" :
|
||||
is_vht(rate) ? "VHT" : "HT");
|
||||
@@ -3891,7 +3829,7 @@ static ssize_t rs_sta_dbgfs_scale_table_read(struct file *file,
|
||||
|
||||
desc += scnprintf(buff + desc, bufsz - desc,
|
||||
" rate[%d] 0x%X ", i, r);
|
||||
desc += rs_pretty_print_rate(buff + desc, bufsz - desc, r);
|
||||
desc += rs_pretty_print_rate_v1(buff + desc, bufsz - desc, r);
|
||||
if (desc < bufsz - 1)
|
||||
buff[desc++] = '\n';
|
||||
}
|
||||
|
||||
@@ -5,11 +5,6 @@
|
||||
* Copyright(c) 2015 Intel Mobile Communications GmbH
|
||||
* Copyright(c) 2017 Intel Deutschland GmbH
|
||||
* Copyright(c) 2018 - 2019 Intel Corporation
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <linuxwifi@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __rs_h__
|
||||
@@ -36,11 +31,6 @@ struct iwl_rs_rate_info {
|
||||
|
||||
#define IWL_RATE_60M_PLCP 3
|
||||
|
||||
enum {
|
||||
IWL_RATE_INVM_INDEX = IWL_RATE_COUNT,
|
||||
IWL_RATE_INVALID = IWL_RATE_COUNT,
|
||||
};
|
||||
|
||||
#define LINK_QUAL_MAX_RETRY_NUM 16
|
||||
|
||||
enum {
|
||||
@@ -211,13 +201,6 @@ struct rs_rate {
|
||||
#define is_ht80(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_80)
|
||||
#define is_ht160(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_160)
|
||||
|
||||
#define IWL_MAX_MCS_DISPLAY_SIZE 12
|
||||
|
||||
struct iwl_rate_mcs_info {
|
||||
char mbps[IWL_MAX_MCS_DISPLAY_SIZE];
|
||||
char mcs[IWL_MAX_MCS_DISPLAY_SIZE];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_lq_sta_rs_fw - rate and related statistics for RS in FW
|
||||
* @last_rate_n_flags: last rate reported by FW
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright (C) 2012-2014, 2018-2020 Intel Corporation
|
||||
* Copyright (C) 2012-2014, 2018-2021 Intel Corporation
|
||||
* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
|
||||
* Copyright (C) 2016-2017 Intel Deutschland GmbH
|
||||
*/
|
||||
@@ -103,7 +103,7 @@ static void iwl_mvm_get_signal_strength(struct iwl_mvm *mvm,
|
||||
struct iwl_rx_phy_info *phy_info,
|
||||
struct ieee80211_rx_status *rx_status)
|
||||
{
|
||||
int energy_a, energy_b, energy_c, max_energy;
|
||||
int energy_a, energy_b, max_energy;
|
||||
u32 val;
|
||||
|
||||
val =
|
||||
@@ -114,14 +114,10 @@ static void iwl_mvm_get_signal_strength(struct iwl_mvm *mvm,
|
||||
energy_b = (val & IWL_RX_INFO_ENERGY_ANT_B_MSK) >>
|
||||
IWL_RX_INFO_ENERGY_ANT_B_POS;
|
||||
energy_b = energy_b ? -energy_b : S8_MIN;
|
||||
energy_c = (val & IWL_RX_INFO_ENERGY_ANT_C_MSK) >>
|
||||
IWL_RX_INFO_ENERGY_ANT_C_POS;
|
||||
energy_c = energy_c ? -energy_c : S8_MIN;
|
||||
max_energy = max(energy_a, energy_b);
|
||||
max_energy = max(max_energy, energy_c);
|
||||
|
||||
IWL_DEBUG_STATS(mvm, "energy In A %d B %d C %d , and max %d\n",
|
||||
energy_a, energy_b, energy_c, max_energy);
|
||||
IWL_DEBUG_STATS(mvm, "energy In A %d B %d , and max %d\n",
|
||||
energy_a, energy_b, max_energy);
|
||||
|
||||
rx_status->signal = max_energy;
|
||||
rx_status->chains = (le16_to_cpu(phy_info->phy_flags) &
|
||||
@@ -129,7 +125,6 @@ static void iwl_mvm_get_signal_strength(struct iwl_mvm *mvm,
|
||||
>> RX_RES_PHY_FLAGS_ANTENNA_POS;
|
||||
rx_status->chain_signal[0] = energy_a;
|
||||
rx_status->chain_signal[1] = energy_b;
|
||||
rx_status->chain_signal[2] = energy_c;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -235,7 +230,7 @@ static void iwl_mvm_rx_handle_tcm(struct iwl_mvm *mvm,
|
||||
mdata->rx.airtime += le16_to_cpu(phy_info->frame_time);
|
||||
}
|
||||
|
||||
if (!(rate_n_flags & (RATE_MCS_HT_MSK | RATE_MCS_VHT_MSK)))
|
||||
if (!(rate_n_flags & (RATE_MCS_HT_MSK_V1 | RATE_MCS_VHT_MSK_V1)))
|
||||
return;
|
||||
|
||||
mvmvif = iwl_mvm_vif_from_mac80211(mvmsta->vif);
|
||||
@@ -249,10 +244,10 @@ static void iwl_mvm_rx_handle_tcm(struct iwl_mvm *mvm,
|
||||
mvmsta->sta_id != mvmvif->ap_sta_id)
|
||||
return;
|
||||
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK) {
|
||||
thr = thresh_tpt[rate_n_flags & RATE_HT_MCS_RATE_CODE_MSK];
|
||||
thr *= 1 + ((rate_n_flags & RATE_HT_MCS_NSS_MSK) >>
|
||||
RATE_HT_MCS_NSS_POS);
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK_V1) {
|
||||
thr = thresh_tpt[rate_n_flags & RATE_HT_MCS_RATE_CODE_MSK_V1];
|
||||
thr *= 1 + ((rate_n_flags & RATE_HT_MCS_NSS_MSK_V1) >>
|
||||
RATE_HT_MCS_NSS_POS_V1);
|
||||
} else {
|
||||
if (WARN_ON((rate_n_flags & RATE_VHT_MCS_RATE_CODE_MSK) >=
|
||||
ARRAY_SIZE(thresh_tpt)))
|
||||
@@ -262,7 +257,7 @@ static void iwl_mvm_rx_handle_tcm(struct iwl_mvm *mvm,
|
||||
RATE_VHT_MCS_NSS_POS);
|
||||
}
|
||||
|
||||
thr <<= ((rate_n_flags & RATE_MCS_CHAN_WIDTH_MSK) >>
|
||||
thr <<= ((rate_n_flags & RATE_MCS_CHAN_WIDTH_MSK_V1) >>
|
||||
RATE_MCS_CHAN_WIDTH_POS);
|
||||
|
||||
mdata->uapsd_nonagg_detect.rx_bytes += len;
|
||||
@@ -455,7 +450,7 @@ void iwl_mvm_rx_rx_mpdu(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
}
|
||||
|
||||
/* Set up the HT phy flags */
|
||||
switch (rate_n_flags & RATE_MCS_CHAN_WIDTH_MSK) {
|
||||
switch (rate_n_flags & RATE_MCS_CHAN_WIDTH_MSK_V1) {
|
||||
case RATE_MCS_CHAN_WIDTH_20:
|
||||
break;
|
||||
case RATE_MCS_CHAN_WIDTH_40:
|
||||
@@ -468,20 +463,20 @@ void iwl_mvm_rx_rx_mpdu(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
rx_status->bw = RATE_INFO_BW_160;
|
||||
break;
|
||||
}
|
||||
if (!(rate_n_flags & RATE_MCS_CCK_MSK) &&
|
||||
rate_n_flags & RATE_MCS_SGI_MSK)
|
||||
if (!(rate_n_flags & RATE_MCS_CCK_MSK_V1) &&
|
||||
rate_n_flags & RATE_MCS_SGI_MSK_V1)
|
||||
rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
|
||||
if (rate_n_flags & RATE_HT_MCS_GF_MSK)
|
||||
rx_status->enc_flags |= RX_ENC_FLAG_HT_GF;
|
||||
if (rate_n_flags & RATE_MCS_LDPC_MSK)
|
||||
if (rate_n_flags & RATE_MCS_LDPC_MSK_V1)
|
||||
rx_status->enc_flags |= RX_ENC_FLAG_LDPC;
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK) {
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK_V1) {
|
||||
u8 stbc = (rate_n_flags & RATE_MCS_STBC_MSK) >>
|
||||
RATE_MCS_STBC_POS;
|
||||
rx_status->encoding = RX_ENC_HT;
|
||||
rx_status->rate_idx = rate_n_flags & RATE_HT_MCS_INDEX_MSK;
|
||||
rx_status->rate_idx = rate_n_flags & RATE_HT_MCS_INDEX_MSK_V1;
|
||||
rx_status->enc_flags |= stbc << RX_ENC_FLAG_STBC_SHIFT;
|
||||
} else if (rate_n_flags & RATE_MCS_VHT_MSK) {
|
||||
} else if (rate_n_flags & RATE_MCS_VHT_MSK_V1) {
|
||||
u8 stbc = (rate_n_flags & RATE_MCS_STBC_MSK) >>
|
||||
RATE_MCS_STBC_POS;
|
||||
rx_status->nss =
|
||||
|
||||
@@ -240,8 +240,7 @@ static void iwl_mvm_add_rtap_sniffer_config(struct iwl_mvm *mvm,
|
||||
static void iwl_mvm_pass_packet_to_mac80211(struct iwl_mvm *mvm,
|
||||
struct napi_struct *napi,
|
||||
struct sk_buff *skb, int queue,
|
||||
struct ieee80211_sta *sta,
|
||||
bool csi)
|
||||
struct ieee80211_sta *sta)
|
||||
{
|
||||
if (iwl_mvm_check_pn(mvm, skb, queue, sta))
|
||||
kfree_skb(skb);
|
||||
@@ -269,7 +268,6 @@ static void iwl_mvm_get_signal_strength(struct iwl_mvm *mvm,
|
||||
(rate_flags & RATE_MCS_ANT_AB_MSK) >> RATE_MCS_ANT_POS;
|
||||
rx_status->chain_signal[0] = energy_a;
|
||||
rx_status->chain_signal[1] = energy_b;
|
||||
rx_status->chain_signal[2] = S8_MIN;
|
||||
}
|
||||
|
||||
static int iwl_mvm_rx_mgmt_prot(struct ieee80211_sta *sta,
|
||||
@@ -620,7 +618,7 @@ static void iwl_mvm_release_frames(struct iwl_mvm *mvm,
|
||||
while ((skb = __skb_dequeue(skb_list))) {
|
||||
iwl_mvm_pass_packet_to_mac80211(mvm, napi, skb,
|
||||
reorder_buf->queue,
|
||||
sta, false);
|
||||
sta);
|
||||
reorder_buf->num_stored--;
|
||||
}
|
||||
}
|
||||
@@ -1198,7 +1196,7 @@ static void iwl_mvm_decode_he_mu_ext(struct iwl_mvm *mvm,
|
||||
}
|
||||
|
||||
if (FIELD_GET(IWL_RX_PHY_DATA4_HE_MU_EXT_CH2_CRC_OK, phy_data4) &&
|
||||
(rate_n_flags & RATE_MCS_CHAN_WIDTH_MSK) != RATE_MCS_CHAN_WIDTH_20) {
|
||||
(rate_n_flags & RATE_MCS_CHAN_WIDTH_MSK_V1) != RATE_MCS_CHAN_WIDTH_20) {
|
||||
he_mu->flags1 |=
|
||||
cpu_to_le16(IEEE80211_RADIOTAP_HE_MU_FLAGS1_CH2_RU_KNOWN |
|
||||
IEEE80211_RADIOTAP_HE_MU_FLAGS1_CH2_CTR_26T_RU_KNOWN);
|
||||
@@ -1235,7 +1233,7 @@ iwl_mvm_decode_he_phy_ru_alloc(struct iwl_mvm_rx_phy_data *phy_data,
|
||||
* the TSF/timers are not be transmitted in HE-MU.
|
||||
*/
|
||||
u8 ru = le32_get_bits(phy_data->d1, IWL_RX_PHY_DATA1_HE_RU_ALLOC_MASK);
|
||||
u32 he_type = rate_n_flags & RATE_MCS_HE_TYPE_MSK;
|
||||
u32 he_type = rate_n_flags & RATE_MCS_HE_TYPE_MSK_V1;
|
||||
u8 offs = 0;
|
||||
|
||||
rx_status->bw = RATE_INFO_BW_HE_RU;
|
||||
@@ -1290,13 +1288,13 @@ iwl_mvm_decode_he_phy_ru_alloc(struct iwl_mvm_rx_phy_data *phy_data,
|
||||
|
||||
if (he_mu)
|
||||
he_mu->flags2 |=
|
||||
le16_encode_bits(FIELD_GET(RATE_MCS_CHAN_WIDTH_MSK,
|
||||
le16_encode_bits(FIELD_GET(RATE_MCS_CHAN_WIDTH_MSK_V1,
|
||||
rate_n_flags),
|
||||
IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW);
|
||||
else if (he_type == RATE_MCS_HE_TYPE_TRIG)
|
||||
else if (he_type == RATE_MCS_HE_TYPE_TRIG_V1)
|
||||
he->data6 |=
|
||||
cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA6_TB_PPDU_BW_KNOWN) |
|
||||
le16_encode_bits(FIELD_GET(RATE_MCS_CHAN_WIDTH_MSK,
|
||||
le16_encode_bits(FIELD_GET(RATE_MCS_CHAN_WIDTH_MSK_V1,
|
||||
rate_n_flags),
|
||||
IEEE80211_RADIOTAP_HE_DATA6_TB_PPDU_BW);
|
||||
}
|
||||
@@ -1508,9 +1506,9 @@ static void iwl_mvm_rx_he(struct iwl_mvm *mvm, struct sk_buff *skb,
|
||||
|
||||
stbc = (rate_n_flags & RATE_MCS_STBC_MSK) >> RATE_MCS_STBC_POS;
|
||||
rx_status->nss =
|
||||
((rate_n_flags & RATE_VHT_MCS_NSS_MSK) >>
|
||||
RATE_VHT_MCS_NSS_POS) + 1;
|
||||
rx_status->rate_idx = rate_n_flags & RATE_VHT_MCS_RATE_CODE_MSK;
|
||||
((rate_n_flags & RATE_MCS_NSS_MSK) >>
|
||||
RATE_MCS_NSS_POS) + 1;
|
||||
rx_status->rate_idx = rate_n_flags & RATE_MCS_CODE_MSK;
|
||||
rx_status->encoding = RX_ENC_HE;
|
||||
rx_status->enc_flags |= stbc << RX_ENC_FLAG_STBC_SHIFT;
|
||||
if (rate_n_flags & RATE_MCS_BF_MSK)
|
||||
@@ -1562,14 +1560,15 @@ static void iwl_mvm_rx_he(struct iwl_mvm *mvm, struct sk_buff *skb,
|
||||
}
|
||||
break;
|
||||
case 3:
|
||||
if ((he_type == RATE_MCS_HE_TYPE_SU ||
|
||||
he_type == RATE_MCS_HE_TYPE_EXT_SU) &&
|
||||
rate_n_flags & RATE_MCS_SGI_MSK)
|
||||
rx_status->he_gi = NL80211_RATE_INFO_HE_GI_0_8;
|
||||
else
|
||||
rx_status->he_gi = NL80211_RATE_INFO_HE_GI_3_2;
|
||||
rx_status->he_gi = NL80211_RATE_INFO_HE_GI_3_2;
|
||||
ltf = IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE_4X;
|
||||
break;
|
||||
case 4:
|
||||
rx_status->he_gi = NL80211_RATE_INFO_HE_GI_0_8;
|
||||
ltf = IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE_4X;
|
||||
break;
|
||||
default:
|
||||
ltf = IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE_UNKNOWN;
|
||||
}
|
||||
|
||||
he->data5 |= le16_encode_bits(ltf,
|
||||
@@ -1653,7 +1652,8 @@ void iwl_mvm_rx_mpdu_mq(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
struct iwl_mvm_rx_phy_data phy_data = {
|
||||
.info_type = IWL_RX_PHY_INFO_TYPE_NONE,
|
||||
};
|
||||
bool csi = false;
|
||||
u32 format;
|
||||
bool is_sgi;
|
||||
|
||||
if (unlikely(test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)))
|
||||
return;
|
||||
@@ -1691,6 +1691,13 @@ void iwl_mvm_rx_mpdu_mq(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
phy_data.d2 = desc->v1.phy_data2;
|
||||
phy_data.d3 = desc->v1.phy_data3;
|
||||
}
|
||||
if (iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
|
||||
REPLY_RX_MPDU_CMD, 0) < 4) {
|
||||
rate_n_flags = iwl_new_rate_from_v1(rate_n_flags);
|
||||
IWL_DEBUG_DROP(mvm, "Got old format rate, converting. New rate: 0x%x\n",
|
||||
rate_n_flags);
|
||||
}
|
||||
format = rate_n_flags & RATE_MCS_MOD_TYPE_MSK;
|
||||
|
||||
len = le16_to_cpu(desc->mpdu_len);
|
||||
|
||||
@@ -1744,7 +1751,7 @@ void iwl_mvm_rx_mpdu_mq(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
break;
|
||||
}
|
||||
|
||||
if (rate_n_flags & RATE_MCS_HE_MSK)
|
||||
if (format == RATE_MCS_HE_MSK)
|
||||
iwl_mvm_rx_he(mvm, skb, &phy_data, rate_n_flags,
|
||||
phy_info, queue);
|
||||
|
||||
@@ -1761,7 +1768,7 @@ void iwl_mvm_rx_mpdu_mq(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
|
||||
}
|
||||
/* set the preamble flag if appropriate */
|
||||
if (rate_n_flags & RATE_MCS_CCK_MSK &&
|
||||
if (format == RATE_MCS_CCK_MSK &&
|
||||
phy_info & IWL_RX_MPDU_PHY_SHORT_PREAMBLE)
|
||||
rx_status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
|
||||
|
||||
@@ -1937,33 +1944,34 @@ void iwl_mvm_rx_mpdu_mq(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
}
|
||||
}
|
||||
|
||||
if (!(rate_n_flags & RATE_MCS_CCK_MSK) &&
|
||||
rate_n_flags & RATE_MCS_SGI_MSK)
|
||||
is_sgi = format == RATE_MCS_HE_MSK ?
|
||||
iwl_he_is_sgi(rate_n_flags) :
|
||||
rate_n_flags & RATE_MCS_SGI_MSK;
|
||||
|
||||
if (!(format == RATE_MCS_CCK_MSK) && is_sgi)
|
||||
rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
|
||||
if (rate_n_flags & RATE_HT_MCS_GF_MSK)
|
||||
rx_status->enc_flags |= RX_ENC_FLAG_HT_GF;
|
||||
if (rate_n_flags & RATE_MCS_LDPC_MSK)
|
||||
rx_status->enc_flags |= RX_ENC_FLAG_LDPC;
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK) {
|
||||
if (format == RATE_MCS_HT_MSK) {
|
||||
u8 stbc = (rate_n_flags & RATE_MCS_STBC_MSK) >>
|
||||
RATE_MCS_STBC_POS;
|
||||
RATE_MCS_STBC_POS;
|
||||
rx_status->encoding = RX_ENC_HT;
|
||||
rx_status->rate_idx = rate_n_flags & RATE_HT_MCS_INDEX_MSK;
|
||||
rx_status->rate_idx = RATE_HT_MCS_INDEX(rate_n_flags);
|
||||
rx_status->enc_flags |= stbc << RX_ENC_FLAG_STBC_SHIFT;
|
||||
} else if (rate_n_flags & RATE_MCS_VHT_MSK) {
|
||||
} else if (format == RATE_MCS_VHT_MSK) {
|
||||
u8 stbc = (rate_n_flags & RATE_MCS_STBC_MSK) >>
|
||||
RATE_MCS_STBC_POS;
|
||||
rx_status->nss =
|
||||
((rate_n_flags & RATE_VHT_MCS_NSS_MSK) >>
|
||||
RATE_VHT_MCS_NSS_POS) + 1;
|
||||
rx_status->rate_idx = rate_n_flags & RATE_VHT_MCS_RATE_CODE_MSK;
|
||||
RATE_MCS_STBC_POS;
|
||||
rx_status->nss =
|
||||
((rate_n_flags & RATE_MCS_NSS_MSK) >>
|
||||
RATE_MCS_NSS_POS) + 1;
|
||||
rx_status->rate_idx = rate_n_flags & RATE_MCS_CODE_MSK;
|
||||
rx_status->encoding = RX_ENC_VHT;
|
||||
rx_status->enc_flags |= stbc << RX_ENC_FLAG_STBC_SHIFT;
|
||||
if (rate_n_flags & RATE_MCS_BF_MSK)
|
||||
rx_status->enc_flags |= RX_ENC_FLAG_BF;
|
||||
} else if (!(rate_n_flags & RATE_MCS_HE_MSK)) {
|
||||
int rate = iwl_mvm_legacy_rate_to_mac80211_idx(rate_n_flags,
|
||||
rx_status->band);
|
||||
} else if (!(format == RATE_MCS_HE_MSK)) {
|
||||
int rate = iwl_mvm_legacy_hw_idx_to_mac80211_idx(rate_n_flags,
|
||||
rx_status->band);
|
||||
|
||||
if (WARN(rate < 0 || rate > 0xFF,
|
||||
"Invalid rate flags 0x%x, band %d,\n",
|
||||
@@ -1994,7 +2002,7 @@ void iwl_mvm_rx_mpdu_mq(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
|
||||
if (!iwl_mvm_reorder(mvm, napi, queue, sta, skb, desc))
|
||||
iwl_mvm_pass_packet_to_mac80211(mvm, napi, skb, queue,
|
||||
sta, csi);
|
||||
sta);
|
||||
out:
|
||||
rcu_read_unlock();
|
||||
}
|
||||
@@ -2013,12 +2021,24 @@ void iwl_mvm_rx_monitor_no_data(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
struct ieee80211_sta *sta = NULL;
|
||||
struct sk_buff *skb;
|
||||
u8 channel, energy_a, energy_b;
|
||||
u32 format;
|
||||
struct iwl_mvm_rx_phy_data phy_data = {
|
||||
.info_type = le32_get_bits(desc->phy_info[1],
|
||||
IWL_RX_PHY_DATA1_INFO_TYPE_MASK),
|
||||
.d0 = desc->phy_info[0],
|
||||
.d1 = desc->phy_info[1],
|
||||
};
|
||||
bool is_sgi;
|
||||
|
||||
if (iwl_fw_lookup_notif_ver(mvm->fw, DATA_PATH_GROUP,
|
||||
RX_NO_DATA_NOTIF, 0) < 2) {
|
||||
IWL_DEBUG_DROP(mvm, "Got an old rate format. Old rate: 0x%x\n",
|
||||
rate_n_flags);
|
||||
rate_n_flags = iwl_new_rate_from_v1(rate_n_flags);
|
||||
IWL_DEBUG_DROP(mvm, " Rate after conversion to the new format: 0x%x\n",
|
||||
rate_n_flags);
|
||||
}
|
||||
format = rate_n_flags & RATE_MCS_MOD_TYPE_MSK;
|
||||
|
||||
if (unlikely(iwl_rx_packet_payload_len(pkt) < sizeof(*desc)))
|
||||
return;
|
||||
@@ -2075,7 +2095,7 @@ void iwl_mvm_rx_monitor_no_data(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
break;
|
||||
}
|
||||
|
||||
if (rate_n_flags & RATE_MCS_HE_MSK)
|
||||
if (format == RATE_MCS_HE_MSK)
|
||||
iwl_mvm_rx_he(mvm, skb, &phy_data, rate_n_flags,
|
||||
phy_info, queue);
|
||||
|
||||
@@ -2091,23 +2111,24 @@ void iwl_mvm_rx_monitor_no_data(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
|
||||
rcu_read_lock();
|
||||
|
||||
if (!(rate_n_flags & RATE_MCS_CCK_MSK) &&
|
||||
rate_n_flags & RATE_MCS_SGI_MSK)
|
||||
is_sgi = format == RATE_MCS_HE_MSK ?
|
||||
iwl_he_is_sgi(rate_n_flags) :
|
||||
rate_n_flags & RATE_MCS_SGI_MSK;
|
||||
|
||||
if (!(format == RATE_MCS_CCK_MSK) && is_sgi)
|
||||
rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
|
||||
if (rate_n_flags & RATE_HT_MCS_GF_MSK)
|
||||
rx_status->enc_flags |= RX_ENC_FLAG_HT_GF;
|
||||
if (rate_n_flags & RATE_MCS_LDPC_MSK)
|
||||
rx_status->enc_flags |= RX_ENC_FLAG_LDPC;
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK) {
|
||||
if (format == RATE_MCS_HT_MSK) {
|
||||
u8 stbc = (rate_n_flags & RATE_MCS_STBC_MSK) >>
|
||||
RATE_MCS_STBC_POS;
|
||||
rx_status->encoding = RX_ENC_HT;
|
||||
rx_status->rate_idx = rate_n_flags & RATE_HT_MCS_INDEX_MSK;
|
||||
rx_status->rate_idx = RATE_HT_MCS_INDEX(rate_n_flags);
|
||||
rx_status->enc_flags |= stbc << RX_ENC_FLAG_STBC_SHIFT;
|
||||
} else if (rate_n_flags & RATE_MCS_VHT_MSK) {
|
||||
} else if (format == RATE_MCS_VHT_MSK) {
|
||||
u8 stbc = (rate_n_flags & RATE_MCS_STBC_MSK) >>
|
||||
RATE_MCS_STBC_POS;
|
||||
rx_status->rate_idx = rate_n_flags & RATE_VHT_MCS_RATE_CODE_MSK;
|
||||
rx_status->rate_idx = rate_n_flags & RATE_MCS_CODE_MSK;
|
||||
rx_status->encoding = RX_ENC_VHT;
|
||||
rx_status->enc_flags |= stbc << RX_ENC_FLAG_STBC_SHIFT;
|
||||
if (rate_n_flags & RATE_MCS_BF_MSK)
|
||||
@@ -2120,12 +2141,12 @@ void iwl_mvm_rx_monitor_no_data(struct iwl_mvm *mvm, struct napi_struct *napi,
|
||||
rx_status->nss =
|
||||
le32_get_bits(desc->rx_vec[0],
|
||||
RX_NO_DATA_RX_VEC0_VHT_NSTS_MSK) + 1;
|
||||
} else if (rate_n_flags & RATE_MCS_HE_MSK) {
|
||||
} else if (format == RATE_MCS_HE_MSK) {
|
||||
rx_status->nss =
|
||||
le32_get_bits(desc->rx_vec[0],
|
||||
RX_NO_DATA_RX_VEC0_HE_NSTS_MSK) + 1;
|
||||
} else {
|
||||
int rate = iwl_mvm_legacy_rate_to_mac80211_idx(rate_n_flags,
|
||||
int rate = iwl_mvm_legacy_hw_idx_to_mac80211_idx(rate_n_flags,
|
||||
rx_status->band);
|
||||
|
||||
if (WARN(rate < 0 || rate > 0xFF,
|
||||
|
||||
@@ -163,7 +163,7 @@ iwl_mvm_scan_rate_n_flags(struct iwl_mvm *mvm, enum nl80211_band band,
|
||||
tx_ant = BIT(mvm->scan_last_antenna_idx) << RATE_MCS_ANT_POS;
|
||||
|
||||
if (band == NL80211_BAND_2GHZ && !no_cck)
|
||||
return cpu_to_le32(IWL_RATE_1M_PLCP | RATE_MCS_CCK_MSK |
|
||||
return cpu_to_le32(IWL_RATE_1M_PLCP | RATE_MCS_CCK_MSK_V1 |
|
||||
tx_ant);
|
||||
else
|
||||
return cpu_to_le32(IWL_RATE_6M_PLCP | tx_ant);
|
||||
|
||||
@@ -268,6 +268,7 @@ static u32 iwl_mvm_get_tx_rate(struct iwl_mvm *mvm,
|
||||
int rate_idx = -1;
|
||||
u8 rate_plcp;
|
||||
u32 rate_flags = 0;
|
||||
bool is_cck;
|
||||
struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
|
||||
|
||||
/* info->control is only relevant for non HW rate control */
|
||||
@@ -299,11 +300,18 @@ static u32 iwl_mvm_get_tx_rate(struct iwl_mvm *mvm,
|
||||
BUILD_BUG_ON(IWL_FIRST_CCK_RATE != 0);
|
||||
|
||||
/* Get PLCP rate for tx_cmd->rate_n_flags */
|
||||
rate_plcp = iwl_mvm_mac80211_idx_to_hwrate(rate_idx);
|
||||
rate_plcp = iwl_mvm_mac80211_idx_to_hwrate(mvm->fw, rate_idx);
|
||||
is_cck = (rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE);
|
||||
|
||||
/* Set CCK flag as needed */
|
||||
if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
|
||||
rate_flags |= RATE_MCS_CCK_MSK;
|
||||
/* Set CCK or OFDM flag */
|
||||
if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, TX_CMD, 0) > 8) {
|
||||
if (!is_cck)
|
||||
rate_flags |= RATE_MCS_LEGACY_OFDM_MSK;
|
||||
else
|
||||
rate_flags |= RATE_MCS_CCK_MSK;
|
||||
} else if (is_cck) {
|
||||
rate_flags |= RATE_MCS_CCK_MSK_V1;
|
||||
}
|
||||
|
||||
return (u32)rate_plcp | rate_flags;
|
||||
}
|
||||
@@ -1284,31 +1292,72 @@ const char *iwl_mvm_get_tx_fail_reason(u32 status)
|
||||
}
|
||||
#endif /* CONFIG_IWLWIFI_DEBUG */
|
||||
|
||||
static int iwl_mvm_get_hwrate_chan_width(u32 chan_width)
|
||||
{
|
||||
switch (chan_width) {
|
||||
case RATE_MCS_CHAN_WIDTH_20:
|
||||
return 0;
|
||||
case RATE_MCS_CHAN_WIDTH_40:
|
||||
return IEEE80211_TX_RC_40_MHZ_WIDTH;
|
||||
case RATE_MCS_CHAN_WIDTH_80:
|
||||
return IEEE80211_TX_RC_80_MHZ_WIDTH;
|
||||
case RATE_MCS_CHAN_WIDTH_160:
|
||||
return IEEE80211_TX_RC_160_MHZ_WIDTH;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
void iwl_mvm_hwrate_to_tx_rate(u32 rate_n_flags,
|
||||
enum nl80211_band band,
|
||||
struct ieee80211_tx_rate *r)
|
||||
{
|
||||
if (rate_n_flags & RATE_HT_MCS_GF_MSK)
|
||||
r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
|
||||
switch (rate_n_flags & RATE_MCS_CHAN_WIDTH_MSK) {
|
||||
case RATE_MCS_CHAN_WIDTH_20:
|
||||
break;
|
||||
case RATE_MCS_CHAN_WIDTH_40:
|
||||
r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
|
||||
break;
|
||||
case RATE_MCS_CHAN_WIDTH_80:
|
||||
r->flags |= IEEE80211_TX_RC_80_MHZ_WIDTH;
|
||||
break;
|
||||
case RATE_MCS_CHAN_WIDTH_160:
|
||||
r->flags |= IEEE80211_TX_RC_160_MHZ_WIDTH;
|
||||
break;
|
||||
}
|
||||
u32 format = rate_n_flags & RATE_MCS_MOD_TYPE_MSK;
|
||||
u32 rate = format == RATE_MCS_HT_MSK ?
|
||||
RATE_HT_MCS_INDEX(rate_n_flags) :
|
||||
rate_n_flags & RATE_MCS_CODE_MSK;
|
||||
|
||||
r->flags |=
|
||||
iwl_mvm_get_hwrate_chan_width(rate_n_flags &
|
||||
RATE_MCS_CHAN_WIDTH_MSK);
|
||||
|
||||
if (rate_n_flags & RATE_MCS_SGI_MSK)
|
||||
r->flags |= IEEE80211_TX_RC_SHORT_GI;
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK) {
|
||||
if (format == RATE_MCS_HT_MSK) {
|
||||
r->flags |= IEEE80211_TX_RC_MCS;
|
||||
r->idx = rate_n_flags & RATE_HT_MCS_INDEX_MSK;
|
||||
} else if (rate_n_flags & RATE_MCS_VHT_MSK) {
|
||||
r->idx = rate;
|
||||
} else if (format == RATE_MCS_VHT_MSK) {
|
||||
ieee80211_rate_set_vht(r, rate,
|
||||
((rate_n_flags & RATE_MCS_NSS_MSK) >>
|
||||
RATE_MCS_NSS_POS) + 1);
|
||||
r->flags |= IEEE80211_TX_RC_VHT_MCS;
|
||||
} else if (format == RATE_MCS_HE_MSK) {
|
||||
/* mac80211 cannot do this without ieee80211_tx_status_ext()
|
||||
* but it only matters for radiotap */
|
||||
r->idx = 0;
|
||||
} else {
|
||||
r->idx = iwl_mvm_legacy_hw_idx_to_mac80211_idx(rate_n_flags,
|
||||
band);
|
||||
}
|
||||
}
|
||||
|
||||
void iwl_mvm_hwrate_to_tx_rate_v1(u32 rate_n_flags,
|
||||
enum nl80211_band band,
|
||||
struct ieee80211_tx_rate *r)
|
||||
{
|
||||
if (rate_n_flags & RATE_HT_MCS_GF_MSK)
|
||||
r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
|
||||
|
||||
r->flags |=
|
||||
iwl_mvm_get_hwrate_chan_width(rate_n_flags &
|
||||
RATE_MCS_CHAN_WIDTH_MSK_V1);
|
||||
|
||||
if (rate_n_flags & RATE_MCS_SGI_MSK_V1)
|
||||
r->flags |= IEEE80211_TX_RC_SHORT_GI;
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK_V1) {
|
||||
r->flags |= IEEE80211_TX_RC_MCS;
|
||||
r->idx = rate_n_flags & RATE_HT_MCS_INDEX_MSK_V1;
|
||||
} else if (rate_n_flags & RATE_MCS_VHT_MSK_V1) {
|
||||
ieee80211_rate_set_vht(
|
||||
r, rate_n_flags & RATE_VHT_MCS_RATE_CODE_MSK,
|
||||
((rate_n_flags & RATE_VHT_MCS_NSS_MSK) >>
|
||||
@@ -1323,14 +1372,20 @@ void iwl_mvm_hwrate_to_tx_rate(u32 rate_n_flags,
|
||||
/*
|
||||
* translate ucode response to mac80211 tx status control values
|
||||
*/
|
||||
static void iwl_mvm_hwrate_to_tx_status(u32 rate_n_flags,
|
||||
static void iwl_mvm_hwrate_to_tx_status(const struct iwl_fw *fw,
|
||||
u32 rate_n_flags,
|
||||
struct ieee80211_tx_info *info)
|
||||
{
|
||||
struct ieee80211_tx_rate *r = &info->status.rates[0];
|
||||
|
||||
if (iwl_fw_lookup_notif_ver(fw, LONG_GROUP,
|
||||
TX_CMD, 0) > 6)
|
||||
rate_n_flags = iwl_new_rate_from_v1(rate_n_flags);
|
||||
|
||||
info->status.antenna =
|
||||
((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
|
||||
iwl_mvm_hwrate_to_tx_rate(rate_n_flags, info->band, r);
|
||||
((rate_n_flags & RATE_MCS_ANT_AB_MSK) >> RATE_MCS_ANT_POS);
|
||||
iwl_mvm_hwrate_to_tx_rate(rate_n_flags,
|
||||
info->band, r);
|
||||
}
|
||||
|
||||
static void iwl_mvm_tx_status_check_trigger(struct iwl_mvm *mvm,
|
||||
@@ -1450,7 +1505,9 @@ static void iwl_mvm_rx_tx_cmd_single(struct iwl_mvm *mvm,
|
||||
/* the FW should have stopped the queue and not
|
||||
* return this status
|
||||
*/
|
||||
WARN_ON(1);
|
||||
IWL_ERR_LIMIT(mvm,
|
||||
"FW reported TX filtered, status=0x%x, FC=0x%x\n",
|
||||
status, le16_to_cpu(hdr->frame_control));
|
||||
info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
|
||||
break;
|
||||
default:
|
||||
@@ -1472,8 +1529,14 @@ static void iwl_mvm_rx_tx_cmd_single(struct iwl_mvm *mvm,
|
||||
iwl_mvm_tx_status_check_trigger(mvm, status, hdr->frame_control);
|
||||
|
||||
info->status.rates[0].count = tx_resp->failure_frame + 1;
|
||||
iwl_mvm_hwrate_to_tx_status(le32_to_cpu(tx_resp->initial_rate),
|
||||
|
||||
iwl_mvm_hwrate_to_tx_status(mvm->fw,
|
||||
le32_to_cpu(tx_resp->initial_rate),
|
||||
info);
|
||||
|
||||
/* Don't assign the converted initial_rate, because driver
|
||||
* TLC uses this and doesn't support the new FW rate
|
||||
*/
|
||||
info->status.status_driver_data[1] =
|
||||
(void *)(uintptr_t)le32_to_cpu(tx_resp->initial_rate);
|
||||
|
||||
@@ -1835,7 +1898,7 @@ static void iwl_mvm_tx_reclaim(struct iwl_mvm *mvm, int sta_id, int tid,
|
||||
info->flags |= IEEE80211_TX_STAT_AMPDU;
|
||||
memcpy(&info->status, &tx_info->status,
|
||||
sizeof(tx_info->status));
|
||||
iwl_mvm_hwrate_to_tx_status(rate, info);
|
||||
iwl_mvm_hwrate_to_tx_status(mvm->fw, rate, info);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1856,7 +1919,7 @@ static void iwl_mvm_tx_reclaim(struct iwl_mvm *mvm, int sta_id, int tid,
|
||||
goto out;
|
||||
|
||||
tx_info->band = chanctx_conf->def.chan->band;
|
||||
iwl_mvm_hwrate_to_tx_status(rate, tx_info);
|
||||
iwl_mvm_hwrate_to_tx_status(mvm->fw, rate, tx_info);
|
||||
|
||||
if (!iwl_mvm_has_tlc_offload(mvm)) {
|
||||
IWL_DEBUG_TX_REPLY(mvm,
|
||||
|
||||
@@ -135,31 +135,25 @@ int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
|
||||
return iwl_mvm_send_cmd_status(mvm, &cmd, status);
|
||||
}
|
||||
|
||||
#define IWL_DECLARE_RATE_INFO(r) \
|
||||
[IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
|
||||
int iwl_mvm_legacy_hw_idx_to_mac80211_idx(u32 rate_n_flags,
|
||||
enum nl80211_band band)
|
||||
{
|
||||
int format = rate_n_flags & RATE_MCS_MOD_TYPE_MSK;
|
||||
int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
|
||||
bool is_LB = band == NL80211_BAND_2GHZ;
|
||||
|
||||
/*
|
||||
* Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
|
||||
*/
|
||||
static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
|
||||
IWL_DECLARE_RATE_INFO(1),
|
||||
IWL_DECLARE_RATE_INFO(2),
|
||||
IWL_DECLARE_RATE_INFO(5),
|
||||
IWL_DECLARE_RATE_INFO(11),
|
||||
IWL_DECLARE_RATE_INFO(6),
|
||||
IWL_DECLARE_RATE_INFO(9),
|
||||
IWL_DECLARE_RATE_INFO(12),
|
||||
IWL_DECLARE_RATE_INFO(18),
|
||||
IWL_DECLARE_RATE_INFO(24),
|
||||
IWL_DECLARE_RATE_INFO(36),
|
||||
IWL_DECLARE_RATE_INFO(48),
|
||||
IWL_DECLARE_RATE_INFO(54),
|
||||
};
|
||||
if (format == RATE_MCS_LEGACY_OFDM_MSK)
|
||||
return is_LB ? rate + IWL_FIRST_OFDM_RATE :
|
||||
rate;
|
||||
|
||||
/* CCK is not allowed in HB */
|
||||
return is_LB ? rate : -1;
|
||||
}
|
||||
|
||||
int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
|
||||
enum nl80211_band band)
|
||||
{
|
||||
int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
|
||||
int rate = rate_n_flags & RATE_LEGACY_RATE_MSK_V1;
|
||||
int idx;
|
||||
int band_offset = 0;
|
||||
|
||||
@@ -167,16 +161,24 @@ int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
|
||||
if (band != NL80211_BAND_2GHZ)
|
||||
band_offset = IWL_FIRST_OFDM_RATE;
|
||||
for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
|
||||
if (fw_rate_idx_to_plcp[idx] == rate)
|
||||
if (iwl_fw_rate_idx_to_plcp(idx) == rate)
|
||||
return idx - band_offset;
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
|
||||
u8 iwl_mvm_mac80211_idx_to_hwrate(const struct iwl_fw *fw, int rate_idx)
|
||||
{
|
||||
/* Get PLCP rate for tx_cmd->rate_n_flags */
|
||||
return fw_rate_idx_to_plcp[rate_idx];
|
||||
if (iwl_fw_lookup_cmd_ver(fw, LONG_GROUP,
|
||||
TX_CMD, 0) > 8)
|
||||
/* In the new rate legacy rates are indexed:
|
||||
* 0 - 3 for CCK and 0 - 7 for OFDM.
|
||||
*/
|
||||
return (rate_idx >= IWL_FIRST_OFDM_RATE ?
|
||||
rate_idx - IWL_FIRST_OFDM_RATE :
|
||||
rate_idx);
|
||||
|
||||
return iwl_fw_rate_idx_to_plcp(rate_idx);
|
||||
}
|
||||
|
||||
u8 iwl_mvm_mac80211_ac_to_ucode_ac(enum ieee80211_ac_numbers ac)
|
||||
@@ -217,6 +219,7 @@ u8 first_antenna(u8 mask)
|
||||
return BIT(ffs(mask) - 1);
|
||||
}
|
||||
|
||||
#define MAX_ANT_NUM 2
|
||||
/*
|
||||
* Toggles between TX antennas to send the probe request on.
|
||||
* Receives the bitmask of valid TX antennas and the *index* used
|
||||
@@ -405,6 +408,9 @@ bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm,
|
||||
|
||||
lockdep_assert_held(&mvm->mutex);
|
||||
|
||||
if (iwlmvm_mod_params.power_scheme != IWL_POWER_SCHEME_CAM)
|
||||
return false;
|
||||
|
||||
if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
|
||||
return false;
|
||||
|
||||
|
||||
@@ -57,6 +57,10 @@ iwl_pcie_ctxt_info_dbg_enable(struct iwl_trans *trans,
|
||||
dbg_flags |= IWL_PRPH_SCRATCH_EDBG_DEST_DRAM;
|
||||
dbg_cfg->hwm_base_addr = cpu_to_le64(frag->physical);
|
||||
dbg_cfg->hwm_size = cpu_to_le32(frag->size);
|
||||
dbg_cfg->debug_token_config = cpu_to_le32(trans->dbg.ucode_preset);
|
||||
IWL_DEBUG_FW(trans,
|
||||
"WRT: Applying DRAM destination (debug_token_config=%u)\n",
|
||||
dbg_cfg->debug_token_config);
|
||||
IWL_DEBUG_FW(trans,
|
||||
"WRT: Applying DRAM destination (alloc_id=%u, num_frags=%u)\n",
|
||||
alloc_id,
|
||||
|
||||
@@ -499,6 +499,7 @@ static const struct pci_device_id iwl_hw_card_ids[] = {
|
||||
/* Ma devices */
|
||||
{IWL_PCI_DEVICE(0x2729, PCI_ANY_ID, iwl_ma_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x7E40, PCI_ANY_ID, iwl_ma_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x7F70, PCI_ANY_ID, iwl_ma_trans_cfg)},
|
||||
|
||||
/* Bz devices */
|
||||
{IWL_PCI_DEVICE(0x2727, PCI_ANY_ID, iwl_bz_trans_cfg)},
|
||||
@@ -532,10 +533,20 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
IWL_DEV_INFO(0x31DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
|
||||
IWL_DEV_INFO(0xA370, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
|
||||
IWL_DEV_INFO(0xA370, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
|
||||
IWL_DEV_INFO(0x54F0, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name),
|
||||
IWL_DEV_INFO(0x54F0, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
|
||||
IWL_DEV_INFO(0x51F0, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name),
|
||||
IWL_DEV_INFO(0x51F0, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name),
|
||||
IWL_DEV_INFO(0x51F0, 0x1691, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name),
|
||||
IWL_DEV_INFO(0x51F0, 0x1692, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name),
|
||||
IWL_DEV_INFO(0x54F0, 0x1691, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name),
|
||||
IWL_DEV_INFO(0x54F0, 0x1692, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name),
|
||||
IWL_DEV_INFO(0x7A70, 0x1691, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name),
|
||||
IWL_DEV_INFO(0x7A70, 0x1692, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name),
|
||||
|
||||
IWL_DEV_INFO(0x271C, 0x0214, iwl9260_2ac_cfg, iwl9260_1_name),
|
||||
IWL_DEV_INFO(0x7E40, 0x1691, iwl_cfg_ma_a0_gf4_a0, iwl_ax411_killer_1690s_name),
|
||||
IWL_DEV_INFO(0x7E40, 0x1692, iwl_cfg_ma_a0_gf4_a0, iwl_ax411_killer_1690i_name),
|
||||
|
||||
/* AX200 */
|
||||
IWL_DEV_INFO(0x2723, 0x1653, iwl_ax200_cfg_cc, iwl_ax200_killer_1650w_name),
|
||||
@@ -639,6 +650,12 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
IWL_DEV_INFO(0x7AF0, 0x0510, iwlax211_2ax_cfg_so_gf_a0, NULL),
|
||||
IWL_DEV_INFO(0x7AF0, 0x0A10, iwlax211_2ax_cfg_so_gf_a0, NULL),
|
||||
|
||||
/* So with JF */
|
||||
IWL_DEV_INFO(0x7A70, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name),
|
||||
IWL_DEV_INFO(0x7A70, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name),
|
||||
IWL_DEV_INFO(0x7AF0, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name),
|
||||
IWL_DEV_INFO(0x7AF0, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name),
|
||||
|
||||
/* SnJ with HR */
|
||||
IWL_DEV_INFO(0x2725, 0x00B0, iwlax411_2ax_cfg_sosnj_gf4_a0, NULL),
|
||||
IWL_DEV_INFO(0x2726, 0x0090, iwlax211_cfg_snj_gf_a0, NULL),
|
||||
@@ -648,6 +665,12 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
IWL_DEV_INFO(0x2726, 0x0510, iwlax211_cfg_snj_gf_a0, NULL),
|
||||
IWL_DEV_INFO(0x2726, 0x1651, iwl_cfg_snj_hr_b0, iwl_ax201_killer_1650s_name),
|
||||
IWL_DEV_INFO(0x2726, 0x1652, iwl_cfg_snj_hr_b0, iwl_ax201_killer_1650i_name),
|
||||
IWL_DEV_INFO(0x2726, 0x1671, iwlax211_cfg_snj_gf_a0, iwl_ax211_killer_1675s_name),
|
||||
IWL_DEV_INFO(0x2726, 0x1672, iwlax211_cfg_snj_gf_a0, iwl_ax211_killer_1675i_name),
|
||||
IWL_DEV_INFO(0x2726, 0x1691, iwlax411_2ax_cfg_sosnj_gf4_a0, iwl_ax411_killer_1690s_name),
|
||||
IWL_DEV_INFO(0x2726, 0x1692, iwlax411_2ax_cfg_sosnj_gf4_a0, iwl_ax411_killer_1690i_name),
|
||||
IWL_DEV_INFO(0x7F70, 0x1691, iwlax411_2ax_cfg_sosnj_gf4_a0, iwl_ax411_killer_1690s_name),
|
||||
IWL_DEV_INFO(0x7F70, 0x1692, iwlax411_2ax_cfg_sosnj_gf4_a0, iwl_ax411_killer_1690i_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
|
||||
@@ -1112,6 +1135,17 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_bz_a0_mr_a0, iwl_bz_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_bz_a0_fm_a0, iwl_bz_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_GL, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_gl_a0_fm_a0, iwl_bz_name),
|
||||
|
||||
|
||||
/* SoF with JF2 */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
@@ -1191,6 +1225,95 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
#endif /* CONFIG_IWLMVM */
|
||||
};
|
||||
|
||||
/*
|
||||
* In case that there is no OTP on the NIC, get the rf id and cdb info
|
||||
* from the prph registers.
|
||||
*/
|
||||
static int get_crf_id(struct iwl_trans *iwl_trans)
|
||||
{
|
||||
int ret = 0;
|
||||
u32 wfpm_ctrl_addr;
|
||||
u32 wfpm_otp_cfg_addr;
|
||||
u32 sd_reg_ver_addr;
|
||||
u32 cdb = 0;
|
||||
u32 val;
|
||||
|
||||
if (iwl_trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
|
||||
wfpm_ctrl_addr = WFPM_CTRL_REG_GEN2;
|
||||
wfpm_otp_cfg_addr = WFPM_OTP_CFG1_ADDR_GEN2;
|
||||
sd_reg_ver_addr = SD_REG_VER_GEN2;
|
||||
/* Qu/Pu families have other addresses */
|
||||
} else {
|
||||
wfpm_ctrl_addr = WFPM_CTRL_REG;
|
||||
wfpm_otp_cfg_addr = WFPM_OTP_CFG1_ADDR;
|
||||
sd_reg_ver_addr = SD_REG_VER;
|
||||
}
|
||||
|
||||
if (!iwl_trans_grab_nic_access(iwl_trans)) {
|
||||
IWL_ERR(iwl_trans, "Failed to grab nic access before reading crf id\n");
|
||||
ret = -EIO;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Enable access to peripheral registers */
|
||||
val = iwl_read_umac_prph_no_grab(iwl_trans, wfpm_ctrl_addr);
|
||||
val |= ENABLE_WFPM;
|
||||
iwl_write_umac_prph_no_grab(iwl_trans, wfpm_ctrl_addr, val);
|
||||
|
||||
/* Read crf info */
|
||||
val = iwl_read_prph_no_grab(iwl_trans, sd_reg_ver_addr);
|
||||
|
||||
/* Read cdb info (also contains the jacket info if needed in the future */
|
||||
cdb = iwl_read_umac_prph_no_grab(iwl_trans, wfpm_otp_cfg_addr);
|
||||
|
||||
/* Map between crf id to rf id */
|
||||
switch (REG_CRF_ID_TYPE(val)) {
|
||||
case REG_CRF_ID_TYPE_JF_1:
|
||||
iwl_trans->hw_rf_id = (IWL_CFG_RF_TYPE_JF1 << 12);
|
||||
break;
|
||||
case REG_CRF_ID_TYPE_JF_2:
|
||||
iwl_trans->hw_rf_id = (IWL_CFG_RF_TYPE_JF2 << 12);
|
||||
break;
|
||||
case REG_CRF_ID_TYPE_HR_NONE_CDB:
|
||||
iwl_trans->hw_rf_id = (IWL_CFG_RF_TYPE_HR1 << 12);
|
||||
break;
|
||||
case REG_CRF_ID_TYPE_HR_CDB:
|
||||
iwl_trans->hw_rf_id = (IWL_CFG_RF_TYPE_HR2 << 12);
|
||||
break;
|
||||
case REG_CRF_ID_TYPE_GF:
|
||||
iwl_trans->hw_rf_id = (IWL_CFG_RF_TYPE_GF << 12);
|
||||
break;
|
||||
case REG_CRF_ID_TYPE_MR:
|
||||
iwl_trans->hw_rf_id = (IWL_CFG_RF_TYPE_MR << 12);
|
||||
break;
|
||||
case REG_CRF_ID_TYPE_FM:
|
||||
iwl_trans->hw_rf_id = (IWL_CFG_RF_TYPE_FM << 12);
|
||||
break;
|
||||
default:
|
||||
ret = -EIO;
|
||||
IWL_ERR(iwl_trans,
|
||||
"Can find a correct rfid for crf id 0x%x\n",
|
||||
REG_CRF_ID_TYPE(val));
|
||||
goto out_release;
|
||||
|
||||
}
|
||||
|
||||
/* Set CDB capabilities */
|
||||
if (cdb & BIT(4)) {
|
||||
iwl_trans->hw_rf_id += BIT(28);
|
||||
IWL_INFO(iwl_trans, "Adding cdb to rf id\n");
|
||||
}
|
||||
|
||||
IWL_INFO(iwl_trans, "Detected RF 0x%x from crf id 0x%x\n",
|
||||
iwl_trans->hw_rf_id, REG_CRF_ID_TYPE(val));
|
||||
|
||||
out_release:
|
||||
iwl_trans_release_nic_access(iwl_trans);
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* PCI registers */
|
||||
#define PCI_CFG_RETRY_TIMEOUT 0x041
|
||||
|
||||
@@ -1222,8 +1345,36 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
|
||||
trans_pcie = IWL_TRANS_GET_PCIE_TRANS(iwl_trans);
|
||||
|
||||
/*
|
||||
* Let's try to grab NIC access early here. Sometimes, NICs may
|
||||
* fail to initialize, and if that happens it's better if we see
|
||||
* issues early on (and can reprobe, per the logic inside), than
|
||||
* first trying to load the firmware etc. and potentially only
|
||||
* detecting any problems when the first interface is brought up.
|
||||
*/
|
||||
ret = iwl_finish_nic_init(iwl_trans);
|
||||
if (ret)
|
||||
goto out_free_trans;
|
||||
if (iwl_trans_grab_nic_access(iwl_trans)) {
|
||||
/* all good */
|
||||
iwl_trans_release_nic_access(iwl_trans);
|
||||
} else {
|
||||
ret = -EIO;
|
||||
goto out_free_trans;
|
||||
}
|
||||
|
||||
iwl_trans->hw_rf_id = iwl_read32(iwl_trans, CSR_HW_RF_ID);
|
||||
|
||||
/*
|
||||
* The RF_ID is set to zero in blank OTP so read version to
|
||||
* extract the RF_ID.
|
||||
* This is relevant only for family 9000 and up.
|
||||
*/
|
||||
if (iwl_trans->trans_cfg->rf_id &&
|
||||
iwl_trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_9000 &&
|
||||
!CSR_HW_RFID_TYPE(iwl_trans->hw_rf_id) && get_crf_id(iwl_trans))
|
||||
goto out_free_trans;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(iwl_dev_info_table); i++) {
|
||||
const struct iwl_dev_info *dev_info = &iwl_dev_info_table[i];
|
||||
if ((dev_info->device == (u16)IWL_CFG_ANY ||
|
||||
|
||||
@@ -47,7 +47,7 @@ int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
|
||||
|
||||
iwl_pcie_apm_config(trans);
|
||||
|
||||
ret = iwl_finish_nic_init(trans, trans->trans_cfg);
|
||||
ret = iwl_finish_nic_init(trans);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@@ -131,21 +131,9 @@ void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans)
|
||||
if (trans_pcie->is_down)
|
||||
return;
|
||||
|
||||
if (trans->state >= IWL_TRANS_FW_STARTED) {
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_BUS_MASTER_DISABLE_REQ);
|
||||
iwl_poll_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_BUS_MASTER_DISABLE_STATUS,
|
||||
CSR_GP_CNTRL_REG_FLAG_BUS_MASTER_DISABLE_STATUS,
|
||||
5000);
|
||||
msleep(100);
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_SW_RESET);
|
||||
} else if (trans_pcie->fw_reset_handshake) {
|
||||
if (trans->state >= IWL_TRANS_FW_STARTED)
|
||||
if (trans_pcie->fw_reset_handshake)
|
||||
iwl_trans_pcie_fw_reset_handshake(trans);
|
||||
}
|
||||
}
|
||||
|
||||
trans_pcie->is_down = true;
|
||||
|
||||
@@ -175,18 +163,6 @@ void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans)
|
||||
else
|
||||
iwl_pcie_ctxt_info_free(trans);
|
||||
|
||||
/* Make sure (redundant) we've released our request to stay awake */
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ);
|
||||
else
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_SW_RESET);
|
||||
}
|
||||
/* Stop the device, and put it in low power state */
|
||||
iwl_pcie_gen2_apm_stop(trans, false);
|
||||
|
||||
@@ -466,13 +442,15 @@ int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans,
|
||||
|
||||
iwl_pcie_set_ltr(trans);
|
||||
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
|
||||
iwl_write32(trans, CSR_FUNC_SCRATCH, CSR_FUNC_SCRATCH_INIT_VALUE);
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_ROM_START);
|
||||
else if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
|
||||
} else if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
|
||||
iwl_write_umac_prph(trans, UREG_CPU_INIT_RUN, 1);
|
||||
else
|
||||
} else {
|
||||
iwl_write_prph(trans, UREG_CPU_INIT_RUN, 1);
|
||||
}
|
||||
|
||||
/* re-check RF-Kill state since we may have missed the interrupt */
|
||||
hw_rfkill = iwl_pcie_check_hw_rf_kill(trans);
|
||||
|
||||
@@ -129,7 +129,12 @@ out:
|
||||
static void iwl_trans_pcie_sw_reset(struct iwl_trans *trans)
|
||||
{
|
||||
/* Reset entire device - do controller reset (results in SHRD_HW_RST) */
|
||||
iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_SW_RESET);
|
||||
else
|
||||
iwl_set_bit(trans, CSR_RESET,
|
||||
CSR_RESET_REG_FLAG_SW_RESET);
|
||||
usleep_range(5000, 6000);
|
||||
}
|
||||
|
||||
@@ -306,7 +311,7 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans)
|
||||
if (trans->trans_cfg->base_params->pll_cfg)
|
||||
iwl_set_bit(trans, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
|
||||
|
||||
ret = iwl_finish_nic_init(trans, trans->trans_cfg);
|
||||
ret = iwl_finish_nic_init(trans);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@@ -378,7 +383,7 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans)
|
||||
|
||||
iwl_trans_pcie_sw_reset(trans);
|
||||
|
||||
ret = iwl_finish_nic_init(trans, trans->trans_cfg);
|
||||
ret = iwl_finish_nic_init(trans);
|
||||
if (WARN_ON(ret)) {
|
||||
/* Release XTAL ON request */
|
||||
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
||||
@@ -458,6 +463,7 @@ void iwl_pcie_apm_stop_master(struct iwl_trans *trans)
|
||||
CSR_GP_CNTRL_REG_FLAG_BUS_MASTER_DISABLE_STATUS,
|
||||
CSR_GP_CNTRL_REG_FLAG_BUS_MASTER_DISABLE_STATUS,
|
||||
100);
|
||||
msleep(100);
|
||||
} else {
|
||||
iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
|
||||
|
||||
@@ -1208,8 +1214,12 @@ static void _iwl_trans_pcie_stop_device(struct iwl_trans *trans)
|
||||
}
|
||||
|
||||
/* Make sure (redundant) we've released our request to stay awake */
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ);
|
||||
else
|
||||
iwl_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
|
||||
/* Stop the device, and put it in low power state */
|
||||
iwl_pcie_apm_stop(trans, false);
|
||||
@@ -1501,7 +1511,7 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
|
||||
iwl_set_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
|
||||
ret = iwl_finish_nic_init(trans, trans->trans_cfg);
|
||||
ret = iwl_finish_nic_init(trans);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@@ -1734,7 +1744,7 @@ static int iwl_pcie_gen2_force_power_gating(struct iwl_trans *trans)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = iwl_finish_nic_init(trans, trans->trans_cfg);
|
||||
ret = iwl_finish_nic_init(trans);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
@@ -2140,9 +2150,12 @@ static void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans)
|
||||
|
||||
if (trans_pcie->cmd_hold_nic_awake)
|
||||
goto out;
|
||||
|
||||
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
|
||||
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ);
|
||||
else
|
||||
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
|
||||
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
|
||||
/*
|
||||
* Above we read the CSR_GP_CNTRL register, which will flush
|
||||
* any previous writes, but we need the write that clears the
|
||||
@@ -3203,9 +3216,11 @@ static int iwl_trans_get_fw_monitor_len(struct iwl_trans *trans, u32 *len)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct iwl_trans_dump_data
|
||||
*iwl_trans_pcie_dump_data(struct iwl_trans *trans,
|
||||
u32 dump_mask)
|
||||
static struct iwl_trans_dump_data *
|
||||
iwl_trans_pcie_dump_data(struct iwl_trans *trans,
|
||||
u32 dump_mask,
|
||||
const struct iwl_dump_sanitize_ops *sanitize_ops,
|
||||
void *sanitize_ctx)
|
||||
{
|
||||
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
|
||||
struct iwl_fw_error_dump_data *data;
|
||||
@@ -3305,6 +3320,10 @@ static struct iwl_trans_dump_data
|
||||
txcmd->caplen = cpu_to_le32(caplen);
|
||||
memcpy(txcmd->data, cmdq->entries[idx].cmd,
|
||||
caplen);
|
||||
if (sanitize_ops && sanitize_ops->frob_hcmd)
|
||||
sanitize_ops->frob_hcmd(sanitize_ctx,
|
||||
txcmd->data,
|
||||
caplen);
|
||||
txcmd = (void *)((u8 *)txcmd->data + caplen);
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user