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phy: rockchip: inno-usb2: add usb2 phy support for rk3568
RK3568 has two USB 2.0 PHYs, and each PHY has two ports, the OTG port of PHY0 support OTG mode with charging detection function, they are similar to previous Rockchip SoCs. However, there are three different designs for RK3568 USB 2.0 PHY. 1. RK3568 uses independent USB GRF module for each USB 2.0 PHY. 2. RK3568 accesses the registers of USB 2.0 PHY IP directly by APB. 3. The two ports of USB 2.0 PHY share one interrupt. Signed-off-by: William Wu <william.wu@rock-chips.com> Change-Id: Id05718e25a20abdf9a4cb353b0fb94f0cb8b2d75
This commit is contained in:
William Wu
@@ -266,6 +266,7 @@ struct rockchip_usb2phy_port {
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* struct rockchip_usb2phy: usb2.0 phy driver data.
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* @grf: General Register Files regmap.
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* @usbgrf: USB General Register Files regmap.
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* *phy_base: the base address of USB PHY.
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* @clk: clock struct of phy input clk.
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* @clk480m: clock struct of phy output clk.
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* @clk_hw: clock struct of phy output clk management.
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@@ -284,6 +285,7 @@ struct rockchip_usb2phy {
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struct device *dev;
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struct regmap *grf;
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struct regmap *usbgrf;
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void __iomem *phy_base;
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struct clk *clk;
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struct clk *clk480m;
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struct clk_hw clk480m_hw;
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@@ -1515,6 +1517,31 @@ static irqreturn_t rockchip_usb2phy_otg_mux_irq(int irq, void *data)
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return ret;
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}
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static irqreturn_t rockchip_usb2phy_irq(int irq, void *data)
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{
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struct rockchip_usb2phy *rphy = data;
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struct rockchip_usb2phy_port *rport;
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irqreturn_t ret = IRQ_NONE;
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unsigned int index;
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for (index = 0; index < rphy->phy_cfg->num_ports; index++) {
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rport = &rphy->ports[index];
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if (!rport->phy)
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continue;
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ret = rockchip_usb2phy_linestate_irq(irq, rport);
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if (rport->port_id == USB2PHY_PORT_OTG) {
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if (!rport->vbus_always_on)
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ret |= rockchip_usb2phy_bvalid_irq(irq, rport);
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ret |= rockchip_usb2phy_id_irq(irq, rport);
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}
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}
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return ret;
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}
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static int rockchip_usb2phy_port_irq_init(struct rockchip_usb2phy *rphy,
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struct rockchip_usb2phy_port *rport,
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struct device_node *child_np)
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@@ -1558,7 +1585,7 @@ static int rockchip_usb2phy_port_irq_init(struct rockchip_usb2phy *rphy,
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ret = devm_request_threaded_irq(rphy->dev, rport->ls_irq, NULL,
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rockchip_usb2phy_linestate_irq,
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IRQF_ONESHOT,
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"rockchip_usb2phy", rport);
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"rockchip_usb2phy_ls", rport);
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if (ret) {
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dev_err(rphy->dev, "failed to request linestate irq handle\n");
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return ret;
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@@ -1774,6 +1801,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
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struct device_node *child_np;
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struct phy_provider *provider;
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struct rockchip_usb2phy *rphy;
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struct resource *res;
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const struct rockchip_usb2phy_cfg *phy_cfgs;
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const struct of_device_id *match;
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unsigned int reg;
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@@ -1790,27 +1818,43 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
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return -EINVAL;
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}
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if (!dev->parent || !dev->parent->of_node)
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return -EINVAL;
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if (!dev->parent || !dev->parent->of_node) {
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(dev, "missing memory resource\n");
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return -ENODEV;
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}
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rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
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if (IS_ERR(rphy->grf))
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return PTR_ERR(rphy->grf);
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rphy->phy_base = devm_ioremap_resource(dev, res);
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if (IS_ERR(rphy->phy_base))
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return PTR_ERR(rphy->phy_base);
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if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) {
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rphy->usbgrf =
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syscon_regmap_lookup_by_phandle(dev->of_node,
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"rockchip,usbgrf");
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if (IS_ERR(rphy->usbgrf))
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return PTR_ERR(rphy->usbgrf);
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rphy->grf = syscon_regmap_lookup_by_phandle(np,
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"rockchip,usbgrf");
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if (IS_ERR(rphy->grf))
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return PTR_ERR(rphy->grf);
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reg = res->start;
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} else {
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rphy->usbgrf = NULL;
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}
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rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
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if (IS_ERR(rphy->grf))
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return PTR_ERR(rphy->grf);
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if (of_property_read_u32(np, "reg", ®)) {
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dev_err(dev, "the reg property is not assigned in %s node\n",
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np->name);
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return -EINVAL;
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if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) {
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rphy->usbgrf =
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syscon_regmap_lookup_by_phandle(dev->of_node,
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"rockchip,usbgrf");
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if (IS_ERR(rphy->usbgrf))
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return PTR_ERR(rphy->usbgrf);
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} else {
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rphy->usbgrf = NULL;
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}
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if (of_property_read_u32(np, "reg", ®)) {
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dev_err(dev, "missing reg property in %s node\n",
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np->name);
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return -EINVAL;
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}
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}
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rphy->dev = dev;
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@@ -1919,6 +1963,19 @@ next_child:
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goto put_child;
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}
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if (rphy->irq > 0) {
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ret = devm_request_threaded_irq(rphy->dev, rphy->irq, NULL,
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rockchip_usb2phy_irq,
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IRQF_ONESHOT,
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"rockchip_usb2phy",
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rphy);
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if (ret) {
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dev_err(rphy->dev,
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"failed to request usb2 phy irq handle\n");
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goto put_child;
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}
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}
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if (of_property_read_bool(np, "wakeup-source"))
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device_init_wakeup(rphy->dev, true);
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else
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@@ -2729,6 +2786,83 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
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{ /* sentinel */ }
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};
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static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
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{
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.reg = 0xfe8a0000,
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.num_ports = 2,
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.clkout_ctl = { 0x0008, 4, 4, 1, 0 },
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.port_cfgs = {
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[USB2PHY_PORT_OTG] = {
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.phy_sus = { 0x0000, 8, 0, 0, 0x1d1 },
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.bvalid_det_en = { 0x0080, 2, 2, 0, 1 },
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.bvalid_det_st = { 0x0084, 2, 2, 0, 1 },
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.bvalid_det_clr = { 0x0088, 2, 2, 0, 1 },
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.bypass_dm_en = { 0x0008, 2, 2, 0, 1},
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.bypass_sel = { 0x0008, 3, 3, 0, 1},
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.iddig_output = { 0x0000, 10, 10, 0, 1 },
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.iddig_en = { 0x0000, 9, 9, 0, 1 },
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.idfall_det_en = { 0x0080, 5, 5, 0, 1 },
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.idfall_det_st = { 0x0084, 5, 5, 0, 1 },
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.idfall_det_clr = { 0x008c, 5, 5, 0, 1 },
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.idrise_det_en = { 0x0080, 4, 4, 0, 1 },
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.idrise_det_st = { 0x0084, 4, 4, 0, 1 },
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.idrise_det_clr = { 0x008c, 4, 4, 0, 1 },
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.ls_det_en = { 0x0080, 0, 0, 0, 1 },
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.ls_det_st = { 0x0084, 0, 0, 0, 1 },
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.ls_det_clr = { 0x008c, 0, 0, 0, 1 },
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.utmi_avalid = { 0x00c0, 10, 10, 0, 1 },
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.utmi_bvalid = { 0x00c0, 9, 9, 0, 1 },
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.utmi_iddig = { 0x00c0, 6, 6, 0, 1 },
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.utmi_ls = { 0x00c0, 5, 4, 0, 1 },
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},
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[USB2PHY_PORT_HOST] = {
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.phy_sus = { 0x0004, 8, 0, 0, 0x1d1 },
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.ls_det_en = { 0x0080, 1, 1, 0, 1 },
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.ls_det_st = { 0x0084, 1, 1, 0, 1 },
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.ls_det_clr = { 0x008c, 1, 1, 0, 1 },
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.utmi_ls = { 0x00c0, 17, 16, 0, 1 },
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.utmi_hstdet = { 0x00c0, 19, 19, 0, 1 }
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}
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},
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.chg_det = {
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.opmode = { 0x0000, 3, 0, 5, 1 },
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.cp_det = { 0x00c0, 24, 24, 0, 1 },
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.dcp_det = { 0x00c0, 23, 23, 0, 1 },
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.dp_det = { 0x00c0, 25, 25, 0, 1 },
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.idm_sink_en = { 0x0008, 8, 8, 0, 1 },
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.idp_sink_en = { 0x0008, 7, 7, 0, 1 },
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.idp_src_en = { 0x0008, 9, 9, 0, 1 },
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.rdm_pdwn_en = { 0x0008, 10, 10, 0, 1 },
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.vdm_src_en = { 0x0008, 12, 12, 0, 1 },
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.vdp_src_en = { 0x0008, 11, 11, 0, 1 },
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},
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},
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{
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.reg = 0xfe8b0000,
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.num_ports = 2,
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.clkout_ctl = { 0x0008, 4, 4, 1, 0 },
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.port_cfgs = {
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[USB2PHY_PORT_OTG] = {
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.phy_sus = { 0x0000, 8, 0, 0, 0x1d1 },
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.ls_det_en = { 0x0080, 0, 0, 0, 1 },
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.ls_det_st = { 0x0084, 0, 0, 0, 1 },
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.ls_det_clr = { 0x008c, 0, 0, 0, 1 },
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.utmi_ls = { 0x00c0, 5, 4, 0, 1 },
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.utmi_hstdet = { 0x00c0, 7, 7, 0, 1 }
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},
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[USB2PHY_PORT_HOST] = {
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.phy_sus = { 0x0004, 8, 0, 0, 0x1d1 },
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.ls_det_en = { 0x0080, 1, 1, 0, 1 },
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.ls_det_st = { 0x0084, 1, 1, 0, 1 },
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.ls_det_clr = { 0x008c, 1, 1, 0, 1 },
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.utmi_ls = { 0x00c0, 17, 16, 0, 1 },
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.utmi_hstdet = { 0x00c0, 19, 19, 0, 1 }
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}
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},
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},
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{ /* sentinel */ }
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};
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static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
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{
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.reg = 0x100,
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@@ -2780,6 +2914,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
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{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
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{ .compatible = "rockchip,rk3368-usb2phy", .data = &rk3368_phy_cfgs },
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{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
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{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
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{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
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{}
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};
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