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ARM: dts: rockchip: remove unused nodes for rk3288 usb otg

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The legacy node "dwc_control_usb" and related properties
is used for dwc_otg_310 driver which has been deprecated,
so remove these unused nodes and properties for rk3288 usb.

Change-Id: I38004b84fb03e879d8910bc125090c3f8197afd1
Signed-off-by: William Wu <william.wu@rock-chips.com>
This commit is contained in:
William Wu
2019-12-18 09:01:43 +08:00
committed by Tao Huang
parent 5f5ab4607a
commit df6155fa81
2 changed files with 0 additions and 108 deletions
Download Patch File Download Diff File Expand all files Collapse all files

54
arch/arm/boot/dts/rk3288-android.dtsi
View File

@@ -304,48 +304,6 @@
};
};
dwc_control_usb: dwc-control-usb@ff770284 {
compatible = "rockchip,rk3288-dwc-control-usb";
status = "okay";
reg = <0x0 0xff770284 0x0 0x04>, <0x0 0xff770288 0x0 0x04>,
<0x0 0xff7702cc 0x0 0x04>, <0x0 0xff7702d4 0x0 0x04>,
<0x0 0xff770320 0x0 0x14>, <0x0 0xff770334 0x0 0x14>,
<0x0 0xff770348 0x0 0x10>, <0x0 0xff770358 0x0 0x08>,
<0x0 0xff770360 0x0 0x08>;
reg-names = "GRF_SOC_STATUS1" ,"GRF_SOC_STATUS2",
"GRF_SOC_STATUS19", "GRF_SOC_STATUS21",
"GRF_UOC0_BASE", "GRF_UOC1_BASE",
"GRF_UOC2_BASE", "GRF_UOC3_BASE",
"GRF_UOC4_BASE";
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "otg_id", "otg_bvalid",
"otg_linestate", "host0_linestate",
"host1_linestate";
clocks = <&cru HCLK_USB_PERI>;
clock-names = "hclk_usb_peri";
otg_drv_gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
rockchip,remote_wakeup;
rockchip,usb_irq_wakeup;
usb_bc {
compatible = "synopsys,phy";
rk_usb,bvalid = <0x288 14 1>;
rk_usb,iddig = <0x288 17 1>;
rk_usb,dcdenb = <0x328 14 1>;
rk_usb,vdatsrcenb = <0x328 7 1>;
rk_usb,vdatdetenb = <0x328 6 1>;
rk_usb,chrgsel = <0x328 5 1>;
rk_usb,chgdet = <0x2cc 23 1>;
rk_usb,fsvminus = <0x2cc 25 1>;
rk_usb,fsvplus = <0x2cc 24 1>;
};
};
nandc0: nandc@ff400000 {
compatible = "rockchip,rk-nandc";
reg = <0x0 0xff400000 0x0 0x4000>;
@@ -427,18 +385,6 @@
dma-coherent;
};
&usb_otg {
compatible = "rockchip,rk3288_usb20_otg";
clocks = <&usbphy0>, <&cru HCLK_OTG0>;
clock-names = "clk_usbphy0", "hclk_usb0";
resets = <&cru SRST_USBOTG_AHB>,
<&cru SRST_USBOTG_PHY>,
<&cru SRST_USBOTG_CON>;
reset-names = "otg_ahb", "otg_phy", "otg_controller";
/*0 - Normal, 1 - Force Host, 2 - Force Device*/
rockchip,usb-mode = <0>;
};
&video_phy {
status = "okay";
};

54
arch/arm/boot/dts/rk3288-firefly-rk808.dts
View File

@@ -274,48 +274,6 @@
};
};
dwc_control_usb: dwc-control-usb@ff770284 {
compatible = "rockchip,rk3288-dwc-control-usb";
status = "okay";
reg = <0x0 0xff770284 0x0 0x04>, <0x0 0xff770288 0x0 0x04>,
<0x0 0xff7702cc 0x0 0x04>, <0x0 0xff7702d4 0x0 0x04>,
<0x0 0xff770320 0x0 0x14>, <0x0 0xff770334 0x0 0x14>,
<0x0 0xff770348 0x0 0x10>, <0x0 0xff770358 0x0 0x08>,
<0x0 0xff770360 0x0 0x08>;
reg-names = "GRF_SOC_STATUS1" ,"GRF_SOC_STATUS2",
"GRF_SOC_STATUS19", "GRF_SOC_STATUS21",
"GRF_UOC0_BASE", "GRF_UOC1_BASE",
"GRF_UOC2_BASE", "GRF_UOC3_BASE",
"GRF_UOC4_BASE";
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "otg_id", "otg_bvalid",
"otg_linestate", "host0_linestate",
"host1_linestate";
clocks = <&cru HCLK_USB_PERI>;
clock-names = "hclk_usb_peri";
otg_drv_gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
rockchip,remote_wakeup;
rockchip,usb_irq_wakeup;
usb_bc {
compatible = "synopsys,phy";
rk_usb,bvalid = <0x288 14 1>;
rk_usb,iddig = <0x288 17 1>;
rk_usb,dcdenb = <0x328 14 1>;
rk_usb,vdatsrcenb = <0x328 7 1>;
rk_usb,vdatdetenb = <0x328 6 1>;
rk_usb,chrgsel = <0x328 5 1>;
rk_usb,chgdet = <0x2cc 23 1>;
rk_usb,fsvminus = <0x2cc 25 1>;
rk_usb,fsvplus = <0x2cc 24 1>;
};
};
/delete-node/ usb-otg-regulator;
};
@@ -719,18 +677,6 @@
&rockchip_suspend {
status = "okay";
};
&usb_otg {
compatible = "rockchip,rk3288_usb20_otg";
clocks = <&usbphy0>, <&cru HCLK_OTG0>;
clock-names = "clk_usbphy0", "hclk_usb0";
resets = <&cru SRST_USBOTG_AHB>,
<&cru SRST_USBOTG_PHY>,
<&cru SRST_USBOTG_CON>;
reset-names = "otg_ahb", "otg_phy", "otg_controller";
/*0 - Normal, 1 - Force Host, 2 - Force Device*/
rockchip,usb-mode = <0>;
status = "okay";
};
&pwm0 {
status = "okay";