shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-11 13:27:06 +09:00
Code Issues Packages Projects Releases Wiki Activity

hdmitx: bringup for g12b to g12b3

Browse Source 
PD#165090: hdmitx: bringup for g12b to g12b3

add g12b ic_type

Change-Id: I2b6871fc228a04dfffe0c5a0131b38a4cfbf6c64
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>
This commit is contained in:
Yi Zhou
2018-05-24 19:11:55 +08:00
committed by Yixun Lan
parent 02d17cfc98
commit e0e879114f
5 changed files with 20 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm64/boot/dts/amlogic/mesong12b.dtsi
View File

@@ -1108,9 +1108,9 @@
interrupt-names = "hdmitx_hpd";
/* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
* 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
* 10:G12A
* 10:G12A 11:G12B
*/
ic_type = <10>;
ic_type = <11>;
vend_data: vend_data{ /* Should modified by Customer */
vendor_name = "Amlogic"; /* Max Chars: 8 */
/* standards.ieee.org/develop/regauth/oui/oui.txt */

7
drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c
View File

@@ -116,6 +116,7 @@ int hdmitx_hpd_hw_op(enum hpd_op cmd)
case MESON_CPU_ID_TXLX:
return hdmitx_hpd_hw_op_txlx(cmd);
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
return hdmitx_hpd_hw_op_g12a(cmd);
default:
break;
@@ -138,6 +139,7 @@ int read_hpd_gpio(void)
return read_hpd_gpio_gxl();
case MESON_CPU_ID_TXLX:
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
return read_hpd_gpio_txlx();
default:
break;
@@ -160,6 +162,7 @@ int hdmitx_ddc_hw_op(enum ddc_op cmd)
return hdmitx_ddc_hw_op_gxl(cmd);
case MESON_CPU_ID_TXLX:
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
return hdmitx_ddc_hw_op_txlx(cmd);
default:
break;
@@ -357,6 +360,7 @@ static unsigned int hdmitx_get_format(void)
switch (hdev->chip_type) {
case MESON_CPU_ID_TXLX:
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
ret = hdmitx_get_format_txlx();
break;
case MESON_CPU_ID_GXBB:
@@ -402,6 +406,7 @@ void hdmitx_sys_reset(void)
switch (hdev->chip_type) {
case MESON_CPU_ID_TXLX:
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
hdmitx_sys_reset_txlx();
break;
case MESON_CPU_ID_GXBB:
@@ -1620,6 +1625,7 @@ static void set_phy_by_mode(unsigned int mode)
switch (hdev->chip_type) {
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
switch (mode) {
case 1: /* 5.94/4.5/3.7Gbps */
hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0x37eb65c4);
@@ -3004,6 +3010,7 @@ static void hdmitx_debug(struct hdmitx_dev *hdev, const char *buf)
} else if (strncmp(tmpbuf, "prbs", 4) == 0) {
switch (hdev->chip_type) {
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
for (i = 0; i < 4; i++) {
hd_write_reg(P_HHI_HDMI_PHY_CNTL1, 0x0390000f);
hd_write_reg(P_HHI_HDMI_PHY_CNTL1, 0x0390000e);

6
drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c
View File

@@ -164,6 +164,7 @@ void hdmitx_set_cts_hdcp22_clk(struct hdmitx_dev *hdev)
case MESON_CPU_ID_GXL:
case MESON_CPU_ID_GXM:
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
default:
hd_write_reg(P_HHI_HDCP22_CLK_CNTL, 0x01000100);
break;
@@ -439,6 +440,7 @@ static void set_hpll_clk_out(unsigned int clk)
set_gxl_hpll_clk_out(frac_rate, clk);
break;
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
set_g12a_hpll_clk_out(frac_rate, clk);
break;
default:
@@ -455,6 +457,7 @@ static void set_hpll_sspll(enum hdmi_vic vic)
switch (hdev->chip_type) {
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
set_hpll_sspll_g12a(vic);
break;
case MESON_CPU_ID_GXBB:
@@ -499,6 +502,7 @@ static void set_hpll_od1(unsigned int div)
set_hpll_od1_gxl(div);
break;
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
set_hpll_od1_g12a(div);
break;
default:
@@ -536,6 +540,7 @@ static void set_hpll_od2(unsigned int div)
set_hpll_od2_gxl(div);
break;
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
set_hpll_od2_g12a(div);
break;
default:
@@ -573,6 +578,7 @@ static void set_hpll_od3(unsigned int div)
set_hpll_od3_gxl(div);
break;
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
set_hpll_od3_g12a(div);
break;
default:

3
drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/reg_ops.c
View File

@@ -164,6 +164,7 @@ void init_reg_map(unsigned int type)
switch (type) {
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
map = reg_maps_g12a;
for (i = 0; i < REG_IDX_END; i++) {
map[i].p = ioremap(map[i].phy_addr, map[i].size);
@@ -250,6 +251,7 @@ unsigned int hd_read_reg(unsigned int addr)
case MESON_CPU_ID_GXL:
case MESON_CPU_ID_GXM:
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
default:
val = readl(TO_PMAP_ADDR(addr));
break;
@@ -298,6 +300,7 @@ void hd_write_reg(unsigned int addr, unsigned int val)
case MESON_CPU_ID_GXL:
case MESON_CPU_ID_GXM:
case MESON_CPU_ID_G12A:
case MESON_CPU_ID_G12B:
default:
writel(val, TO_PMAP_ADDR(addr));
break;

2
include/linux/amlogic/media/vout/hdmi_tx/hdmi_tx_module.h
View File

@@ -41,6 +41,8 @@
#define MESON_CPU_ID_GXLX 8
#define MESON_CPU_ID_TXHD 9
#define MESON_CPU_ID_G12A 10
#define MESON_CPU_ID_G12B 11
/*****************************
* hdmitx attr management