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clk: rockchip: add cpu/npu/enc pvtpll clk for rv1126b

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Change-Id: If735e96258b217df2410156e3b374843baa23d86
Signed-off-by: Liang Chen <cl@rock-chips.com>
This commit is contained in:
Liang Chen
2025-03-24 17:56:33 +08:00
committed by Tao Huang
parent d7c1ee5326
commit e1590dc298
2 changed files with 62 additions and 0 deletions
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55
drivers/clk/rockchip/clk-pvtpll.c
View File

@@ -139,6 +139,31 @@ static struct pvtpll_table rv1103b_npu_pvtpll_table[] = {
ROCKCHIP_PVTPLL_VOLT_SEL(700000000, 1, 32, 4),
};
static struct pvtpll_table rv1126b_core_pvtpll_table[] = {
/* rate_hz, ring_sel, length */
ROCKCHIP_PVTPLL_VOLT_SEL(1608000000, 0, 30, 0),
ROCKCHIP_PVTPLL_VOLT_SEL(1512000000, 0, 30, 0),
ROCKCHIP_PVTPLL_VOLT_SEL(1416000000, 0, 34, 0),
ROCKCHIP_PVTPLL_VOLT_SEL(1296000000, 0, 38, 0),
ROCKCHIP_PVTPLL_VOLT_SEL(1200000000, 0, 38, 0),
ROCKCHIP_PVTPLL_VOLT_SEL(1008000000, 0, 56, 0),
ROCKCHIP_PVTPLL_VOLT_SEL(816000000, 0, 88, 0),
};
static struct pvtpll_table rv1126b_enc_pvtpll_table[] = {
/* rate_hz, ring_se, length */
ROCKCHIP_PVTPLL(550000000, 0, 110),
};
static struct pvtpll_table rv1126b_npu_pvtpll_table[] = {
/* rate_hz, ring_se, length, volt_sel_thr */
ROCKCHIP_PVTPLL_VOLT_SEL(1000000000, 0, 12, 0),
ROCKCHIP_PVTPLL_VOLT_SEL(950000000, 0, 12, 0),
ROCKCHIP_PVTPLL_VOLT_SEL(900000000, 0, 12, 0),
ROCKCHIP_PVTPLL_VOLT_SEL(800000000, 0, 16, 0),
ROCKCHIP_PVTPLL_VOLT_SEL(700000000, 0, 36, 0),
};
static struct pvtpll_table rk3506_core_pvtpll_table[] = {
/* rate_hz, ring_sel, length, volt_sel_thr */
ROCKCHIP_PVTPLL_VOLT_SEL(1608000000, 0, 6, 7),
@@ -565,6 +590,24 @@ static const struct rockchip_clock_pvtpll_info rv1103b_npu_pvtpll_data = {
.pvtpll_calibrate = rv1103b_pvtpll_calibrate,
};
static const struct rockchip_clock_pvtpll_info rv1126b_core_pvtpll_data = {
.config = rv1103b_pvtpll_configs,
.table_size = ARRAY_SIZE(rv1126b_core_pvtpll_table),
.table = rv1126b_core_pvtpll_table,
};
static const struct rockchip_clock_pvtpll_info rv1126b_enc_pvtpll_data = {
.config = rv1103b_pvtpll_configs,
.table_size = ARRAY_SIZE(rv1126b_enc_pvtpll_table),
.table = rv1126b_enc_pvtpll_table,
};
static const struct rockchip_clock_pvtpll_info rv1126b_npu_pvtpll_data = {
.config = rv1103b_pvtpll_configs,
.table_size = ARRAY_SIZE(rv1126b_npu_pvtpll_table),
.table = rv1126b_npu_pvtpll_table,
};
static const struct rockchip_clock_pvtpll_info rk3506_core_pvtpll_data = {
.config = rk3506_pvtpll_configs,
.table_size = ARRAY_SIZE(rk3506_core_pvtpll_table),
@@ -592,6 +635,18 @@ static const struct of_device_id rockchip_clock_pvtpll_match[] = {
.compatible = "rockchip,rv1103b-npu-pvtpll",
.data = (void *)&rv1103b_npu_pvtpll_data,
},
{
.compatible = "rockchip,rv1126b-core-pvtpll",
.data = (void *)&rv1126b_core_pvtpll_data,
},
{
.compatible = "rockchip,rv1126b-enc-pvtpll",
.data = (void *)&rv1126b_enc_pvtpll_data,
},
{
.compatible = "rockchip,rv1126b-npu-pvtpll",
.data = (void *)&rv1126b_npu_pvtpll_data,
},
{
.compatible = "rockchip,rk3506-core-pvtpll",
.data = (void *)&rk3506_core_pvtpll_data,

7
drivers/clk/rockchip/clk-rv1126b.c
View File

@@ -1064,6 +1064,13 @@ static void __init rv1126b_clk_init(struct device_node *np)
if (!rk_dump_cru)
rk_dump_cru = rv1126b_dump_cru;
/* pvtpll src init */
writel_relaxed(PVTPLL_SRC_SEL_PVTPLL, reg_base + RV1126B_CORECLKSEL_CON(0));
writel_relaxed(PVTPLL_SRC_SEL_PVTPLL, reg_base + RV1126B_NPUCLKSEL_CON(0));
writel_relaxed(PVTPLL_SRC_SEL_PVTPLL, reg_base + RV1126B_VICLKSEL_CON(0));
writel_relaxed(PVTPLL_SRC_SEL_PVTPLL, reg_base + RV1126B_VEPUCLKSEL_CON(0));
writel_relaxed(PVTPLL_SRC_SEL_PVTPLL, reg_base + RV1126B_VCPCLKSEL_CON(0));
}
CLK_OF_DECLARE(rv1126b_cru, "rockchip,rv1126b-cru", rv1126b_clk_init);