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arm64: issue isb when trapping CNTVCT_EL0 access

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Change-Id: I6005a6e944494257bfc2243fde2f7a09c3fd76c6
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Hackmann
2017-10-04 09:31:34 -07:00
committed by Greg Kroah-Hartman
parent e4f4f43c20
commit e16a20b1b9
1 changed files with 2 additions and 0 deletions
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arch/arm64/kernel/traps.c
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@@ -33,6 +33,7 @@
#include <linux/syscalls.h>
#include <asm/atomic.h>
#include <asm/barrier.h>
#include <asm/bug.h>
#include <asm/debug-monitors.h>
#include <asm/esr.h>
@@ -499,6 +500,7 @@ static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
{
int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
isb();
if (rt != 31)
regs->regs[rt] = arch_counter_get_cntvct();
regs->pc += 4;