emmc: run hs400 200M on sm1 [1/1]

PD#SWPL-5404

Problem:
run hs400 200M on sm1

Solution:
config sm1 and modify dts

Verify:
passed on ac200

Change-Id: I34e54f88db79ce42f9effbf8d673ade613de328f
Signed-off-by: Ruixuan Li <ruixuan.li@amlogic.com>

Conflicts:
	arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts
	arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts
This commit is contained in:
Ruixuan Li
2019-04-23 16:07:12 +08:00
committed by Luke Go
parent 04c8f997a1
commit e2b93503cd
4 changed files with 13 additions and 12 deletions

View File

@@ -1365,7 +1365,7 @@
clocks = <&clkc CLKID_SD_EMMC_C>,
<&clkc CLKID_SD_EMMC_C_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_FCLK_DIV5>,
<&clkc CLKID_FCLK_DIV2P5>,
<&xtal>;
clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
@@ -1872,7 +1872,7 @@
function = "emmc";
input-enable;
bias-pull-up;
drive-strength = <2>;
drive-strength = <3>;
};
};
@@ -1891,7 +1891,7 @@
function = "emmc";
input-enable;
bias-pull-up;
drive-strength = <2>;
drive-strength = <3>;
};
};
@@ -1901,7 +1901,7 @@
function = "emmc";
input-enable;
bias-pull-down;
drive-strength = <2>;
drive-strength = <3>;
};
};

View File

@@ -1364,7 +1364,7 @@
clocks = <&clkc CLKID_SD_EMMC_C>,
<&clkc CLKID_SD_EMMC_C_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_FCLK_DIV5>,
<&clkc CLKID_FCLK_DIV2P5>,
<&xtal>;
clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
@@ -1832,7 +1832,7 @@
function = "emmc";
input-enable;
bias-pull-up;
drive-strength = <2>;
drive-strength = <3>;
};
};
@@ -1851,7 +1851,7 @@
function = "emmc";
input-enable;
bias-pull-up;
drive-strength = <2>;
drive-strength = <3>;
};
};
@@ -1861,7 +1861,7 @@
function = "emmc";
input-enable;
bias-pull-down;
drive-strength = <2>;
drive-strength = <3>;
};
};

View File

@@ -3649,7 +3649,7 @@ static struct meson_mmc_data mmc_data_sm1 = {
.sdmmc.ddr.tx_phase = 0,
.sdmmc.hs2.core_phase = 2,
.sdmmc.hs2.tx_phase = 0,
.sdmmc.hs4.tx_delay = 0,
.sdmmc.hs4.tx_delay = 16,
.sdmmc.sd_hs.core_phase = 3,
.sdmmc.sdr104.core_phase = 2,
.sdmmc.sdr104.tx_phase = 0,

View File

@@ -358,7 +358,7 @@ static void aml_sd_emmc_set_timing_v3(struct amlsd_platform *pdata,
if (pdata->tx_delay != 0)
clkc->tx_delay = pdata->tx_delay;
if (((host->data->chip_type == MMC_CHIP_TL1)
if (((host->data->chip_type >= MMC_CHIP_TL1)
|| (host->data->chip_type == MMC_CHIP_G12B))
&& aml_card_type_mmc(pdata)) {
clkc->core_phase = para->hs4.core_phase;
@@ -2275,7 +2275,7 @@ int aml_mmc_execute_tuning_v3(struct mmc_host *mmc, u32 opcode)
intf3 |= (1<<22);
writel(intf3, (host->base + SD_EMMC_INTF3));
pdata->intf3 = intf3;
if ((host->data->chip_type == MMC_CHIP_TL1)
if ((host->data->chip_type >= MMC_CHIP_TL1)
|| (host->data->chip_type == MMC_CHIP_G12B))
aml_emmc_hs200_tl1(mmc);
err = 0;
@@ -2293,7 +2293,8 @@ int aml_post_hs400_timming(struct mmc_host *mmc)
struct amlsd_platform *pdata = mmc_priv(mmc);
struct amlsd_host *host = pdata->host;
aml_sd_emmc_clktest(mmc);
if (host->data->chip_type == MMC_CHIP_TL1)
if ((host->data->chip_type == MMC_CHIP_TL1)
|| (host->data->chip_type == MMC_CHIP_SM1))
aml_emmc_hs400_tl1(mmc);
else if (host->data->chip_type == MMC_CHIP_G12B)
aml_emmc_hs400_Revb(mmc);