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video/rockchip: rga2: Remove the useless code about the src1 channel

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1. Remove the useless code about the coordinate after rotation in
   the src1 channel.
2. Remove 4 alignment of the src1 channel.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ib780c0143a76e4bfc50c0be95e483c503525ab9f
This commit is contained in:
Yu Qiaowei
2021-08-04 09:24:43 +08:00
parent 072228d44e
commit e35fa0a231
2 changed files with 2 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/video/rockchip/rga2/rga2_mmu_info.c
View File

@@ -704,7 +704,6 @@ static int rga2_mmu_info_BitBlt_mode(struct rga2_reg *reg, struct rga2_req *req)
req->src1.vir_w,
(req->src1.vir_h),
&Src1Start);
Src1PageCount = (Src1PageCount + 3) & (~3);
if (Src1PageCount == 0)
return -EINVAL;
}

26
drivers/video/rockchip/rga2/rga2_reg_info.c
View File

@@ -382,8 +382,6 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
RK_U32 u_lt_addr, u_ld_addr, u_rt_addr, u_rd_addr;
RK_U32 v_lt_addr, v_ld_addr, v_rt_addr, v_rd_addr;
RK_U32 s_y_lt_addr, s_y_ld_addr, s_y_rt_addr, s_y_rd_addr;
dpw = 1;
x_div = y_div = 1;
@@ -543,12 +541,9 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
*RGA_DST_NN_QUANTIZE_OFFSET = (msg->gr_color.gr_y_r & 0xffff) | (msg->gr_color.gr_y_g << 10) | (msg->gr_color.gr_y_b << 20);
}
yrgb_addr = (RK_U32)msg->src1.yrgb_addr + (msg->src1.y_offset * s_stride) + (msg->src1.x_offset * spw);
s_yrgb_addr = (RK_U32)msg->src1.yrgb_addr + (msg->src1.y_offset * s_stride) + (msg->src1.x_offset * spw);
s_y_lt_addr = yrgb_addr;
s_y_ld_addr = yrgb_addr + (msg->src1.act_h - 1) * s_stride;
s_y_rt_addr = yrgb_addr + (msg->dst.act_w - 1) * spw;
s_y_rd_addr = s_y_ld_addr + (msg->dst.act_w - 1) * spw;
*bRGA_SRC_BASE3 = s_yrgb_addr;
if (dst_fmt_y4_en) {
yrgb_addr = (RK_U32)msg->dst.yrgb_addr + (msg->dst.y_offset * d_stride) + ((msg->dst.x_offset * dpw)>>1);
@@ -607,16 +602,12 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
yrgb_addr = y_rd_addr;
u_addr = u_rd_addr;
v_addr = v_rd_addr;
s_yrgb_addr = s_y_rd_addr;
}
else
{
yrgb_addr = y_ld_addr;
u_addr = u_ld_addr;
v_addr = v_ld_addr;
s_yrgb_addr = s_y_ld_addr;
}
}
else
@@ -626,16 +617,12 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
yrgb_addr = y_rt_addr;
u_addr = u_rt_addr;
v_addr = v_rt_addr;
s_yrgb_addr = s_y_rt_addr;
}
else
{
yrgb_addr = y_lt_addr;
u_addr = u_lt_addr;
v_addr = v_lt_addr;
s_yrgb_addr = s_y_lt_addr;
}
}
}
@@ -648,16 +635,12 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
yrgb_addr = y_ld_addr;
u_addr = u_ld_addr;
v_addr = v_ld_addr;
s_yrgb_addr = s_y_ld_addr;
}
else
{
yrgb_addr = y_rd_addr;
u_addr = u_rd_addr;
v_addr = v_rd_addr;
s_yrgb_addr = s_y_rd_addr;
}
}
else
@@ -667,16 +650,12 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
yrgb_addr = y_lt_addr;
u_addr = u_lt_addr;
v_addr = v_lt_addr;
s_yrgb_addr = s_y_lt_addr;
}
else
{
yrgb_addr = y_rt_addr;
u_addr = u_rt_addr;
v_addr = v_rt_addr;
s_yrgb_addr = s_y_rt_addr;
}
}
}
@@ -702,7 +681,6 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
//if (msg->dst.format >= 0x18) {
// *bRGA_DST_BASE1 = msg->dst.x_offset;
//}
*bRGA_SRC_BASE3 = (RK_U32)s_y_lt_addr;
}
static void RGA2_set_reg_alpha_info(u8 *base, struct rga2_req *msg)