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ARM: dts: link ov4689 with rkcif by mipi on rv1126 evb

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Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
Change-Id: I4a167869bbb60834a6053d4e7f2fd906ad637f50
This commit is contained in:
Allon Huang
2020-05-15 16:06:14 +08:00
committed by Tao Huang
parent af648082b0
commit e41faf2861
1 changed files with 102 additions and 6 deletions
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108
arch/arm/boot/dts/rv11xx-evb-v10.dtsi
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@@ -499,6 +499,39 @@
};
};
&csi_dphy1 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy1_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&ucam_out1>;
data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy1_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_csi2_input>;
data-lanes = <1 2 3 4>;
};
};
};
};
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
@@ -813,11 +846,40 @@
rockchip,camera-module-lens-name = "YT-2929";
port {
cam_para_out1: endpoint {
remote-endpoint = <&cif_para_in>;
/* remote-endpoint = <&cif_para_in>;*/
};
};
};
ov4689: ov4689@36 {
compatible = "ovti,ov4689";
reg = <0x36>;
clocks = <&cru CLK_MIPICSI_OUT>;
clock-names = "xvclk";
power-domains = <&power RV1126_PD_VI>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&mipim1_pins>;
/*pinctrl-0 = <&mipi_csi_clk0>;*/
avdd-supply = <&vcc_avdd>;
dovdd-supply = <&vcc_dovdd>;
dvdd-supply = <&vcc_dvdd>;
pwdn-gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_HIGH>;
/*pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;*/
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "JSD3425-C1";
rockchip,camera-module-lens-name = "JSD3425-C1";
/* NO_HDR:0 HDR_X2:5 HDR_X3:6 */
rockchip,camera-hdr-mode = <0>;
port {
ucam_out1: endpoint {
remote-endpoint = <&csi_dphy1_input>;
data-lanes = <1 2 3 4>;
};
};
};
os04a10: os04a10@36 {
compatible = "ovti,os04a10";
reg = <0x36>;
@@ -864,6 +926,39 @@
};
};
&mipi_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csi_dphy1_output>;
data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in>;
data-lanes = <1 2 3 4>;
};
};
};
};
&mipi_dphy {
status = "okay";
};
@@ -999,19 +1094,20 @@
port {
/* Parallel bus endpoint */
/*
cif_para_in: endpoint {
remote-endpoint = <&cam_para_out1>;
bus-width = <12>;
hsync-active = <1>;
vsync-active = <0>;
};
*/
/* MIPI CSI-2 endpoint */
/*
* cif_mipi_in: endpoint {
* remote-endpoint = <&csi_host_output>;
* };
*/
cif_mipi_in: endpoint {
remote-endpoint = <&mipi_csi2_output>;
data-lanes = <1 2 3 4>;
};
};
};