ARM: dts: rockchip: disable hs park mode for usb dwc3 controller

Some high speed devices performance drop drastically on
Rockchip platforms when connected with DWC3-xHCI controller.
It's because that the DWC3 controller enable high speed
park mode by default, it aims to improve performance with
pipelining of multiple packet. However, for some devices
(such as UVC with bulk transfer VID:04b4, PID:02f9),
when an IN request is sent within 900ns of the ACK of the
previous packet, these devices NAKs more than 3 times, it
could decrease the performance.

These slow devices include:
1. idVendor=04b4, idProduct=02f9, Product: IRay UVC
2. idVendor=1921, idProduct=21863, Product: Sandisk
3. idVendor=3744, idProduct=8552, Manufacturer: Flex Drive

In order to improve compatibility with high speed devices,
this patch disable HS park mode for USB DWC3 controller on
all arm64 SoCs.

With this patch, we test RK3588 with one slow device
(IRay UVC VID:04b4, PID:02f9) and three fast devices
(U2 disk VID:058f, PID:6387; U2 disk VID:0781, PID:557c;
 U3 disk VID:174c, PID:55aa), all of these device have
no performance loss.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I0ac37e7af429392f65f339cf1448cf2958e03b57

arch/arm/boot/dts/rv1106.dtsi

@@ -1423,6 +1423,7 @@
 			snps,dis-tx-ipgap-linecheck-quirk;
 			snps,usb2-gadget-lpm-disable;
 			snps,usb2-lpm-disable;
+			snps,parkmode-disable-hs-quirk;
 			status = "disabled";
 		};
 	};

arch/arm/boot/dts/rv1126.dtsi

@@ -2556,6 +2556,7 @@
 			snps,tx-fifo-resize;
 			snps,xhci-trb-ent-quirk;
 			snps,usb2-lpm-disable;
+			snps,parkmode-disable-hs-quirk;
 			status = "disabled";
 		};
 	};