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drm/amd/amdgpu: Add missing BASE_IDX to dcn register

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The register mmOTG1_OTG_BLANK_CONTROL was missing BASE_IDX value.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tom St Denis
2021-03-04 10:52:09 -05:00
committed by Alex Deucher
parent c79fe9b436
commit e49db37634
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h
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@@ -8922,7 +8922,7 @@
#define mmOTG1_OTG_CONTROL 0x1bc1
#define mmOTG1_OTG_CONTROL_BASE_IDX 2
#define mmOTG1_OTG_BLANK_CONTROL 0x1bc2
#define mmOTG1_OTG_BLANK_CONTROL_BASE_IDX
#define mmOTG1_OTG_BLANK_CONTROL_BASE_IDX 2
#define mmOTG1_OTG_INTERLACE_CONTROL 0x1bc4
#define mmOTG1_OTG_INTERLACE_CONTROL_BASE_IDX 2
#define mmOTG1_OTG_INTERLACE_STATUS 0x1bc5