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dt-bindings: display: Add Document for Rockchip EINK panel
Change-Id: I542f7a38998a56bf4eab9d79d4c34bd4ad576eae Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
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Rockchip EINK panel
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================================
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EINK panel timing:
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│ │FBL+FSL
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│ │
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│ │
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LBL+LSL│ LDL │ LEL
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─────┼────────────────────────────┼───────
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│ │
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│ │
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│ Active Area │FDL
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│ │
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│ │
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─────┼────────────────────────────┼───────
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│ │
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│ │FEL
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│ │
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│ │
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┌─────────────────────────────────────────────┐
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│ Active Area │
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│ ┌────────────────────────────┐ │
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│ │ │ │
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│ │ │ │
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│ │ Visible Area │height │vir_height
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│ │ │ │
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│ │ │ │
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│ └────────────────────────────┘ │
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│ vidth │
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└─────────────────────────────────────────────┘
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vir_width
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----
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Required properties:
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- panel,width: visible width of panel in pixels
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- panel,height: visible height of panel in pixels
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- panel,vir_width: virtual width of panel pixels
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- panel,vir_height: virtual height of panel pixels
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- panel,sdck: frequency of sdclk in Hz
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- panel,lsl: line start length
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- panel,lbl: line back porch length
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- panel,ldl: line data length
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- panel,lel: line end porch length
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- panel,gdck-sta: gdck-sta length
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- panel,lgonl: lgonl length
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- panel,fsl: frame start length
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- panel,fbl: frame back porch length
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- panel,fdl: frame data length
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- panel,fel: frame end porch length
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- panel,panel_16bit: 1 for 16bit panel, 0 for 8bit panel
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- panel,panel_color: 1 for color panel, 0 for normal panel
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- panel,mirror: line scan direction. 0 for from left to right,
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1 for from right to left.
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- panel,rearrange: image data need special arrangement.
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1 for special arrangement, 0 for no arrangement.
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- panel,width-mm: physical width of panel in millimeters
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- panel,height-mm: physical height of panel in millimeters
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Optional properties:
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- panel,sdoe_mode: SDOE signal mode setting.
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Set to 1, SDOE is active during total horizon.
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Set to 0, SDOE is active during total vertical.
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If not set, the default value is 0.
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- panel,sdce_width: width of SDCE signal.
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If not set, the default value is same as "panel,ldl".
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- panel,disable_logo: disable show logo. 1 for disable logo, 0 for enable logo.
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If not set, the default value is 0.
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Example:
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&ebc_dev {
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/* ED103TC2 panel */
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panel,width = <1872>;
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panel,height = <1404>;
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panel,vir_width = <1872>;
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panel,vir_height = <1404>;
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panel,sdck = <34000000>;
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panel,lsl = <18>;
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panel,lbl = <17>;
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panel,ldl = <234>;
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panel,lel = <7>;
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panel,gdck-sta = <34>;
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panel,lgonl = <192>;
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panel,fsl = <1>;
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panel,fbl = <4>;
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panel,fdl = <1404>;
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panel,fel = <12>;
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panel,mirror = <1>;
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panel,panel_16bit = <1>;
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panel,panel_color = <0>;
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panel,width-mm = <157>;
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panel,height-mm = <210>;
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};
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