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PCI: aardvark: Set PIO_ADDR_LS correctly in advk_pcie_rd_conf()
commit4fa3999ee6upstream. When setting the PIO_ADDR_LS register during a configuration read, we were properly passing the device number, function number and register number, but not the bus number, causing issues when reading the configuration of PCIe devices. Fixes:8c39d71036("PCI: aardvark: Add Aardvark PCI host controller driver") Cc: <stable@vger.kernel.org> Signed-off-by: Victor Gu <xigu@marvell.com> Reviewed-by: Wilson Ding <dingwei@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> [Thomas: tweak commit log.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Greg Kroah-Hartman
parent
d6bc6d12b5
commit
e57bde8bbd
@@ -175,8 +175,6 @@
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#define PCIE_CONFIG_WR_TYPE0 0xa
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#define PCIE_CONFIG_WR_TYPE1 0xb
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/* PCI_BDF shifts 8bit, so we need extra 4bit shift */
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#define PCIE_BDF(dev) (dev << 4)
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#define PCIE_CONF_BUS(bus) (((bus) & 0xff) << 20)
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#define PCIE_CONF_DEV(dev) (((dev) & 0x1f) << 15)
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#define PCIE_CONF_FUNC(fun) (((fun) & 0x7) << 12)
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@@ -458,7 +456,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
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advk_writel(pcie, reg, PIO_CTRL);
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/* Program the address registers */
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reg = PCIE_BDF(devfn) | PCIE_CONF_REG(where);
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reg = PCIE_CONF_ADDR(bus->number, devfn, where);
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advk_writel(pcie, reg, PIO_ADDR_LS);
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advk_writel(pcie, 0, PIO_ADDR_MS);
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