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dts: sync difference between arch32 and arch64 [1/1]

Browse Source 
PD#SWPL-959

Problem:
sync arch32 and arch64 dts.

Solution:
sync arch32 and arch64 dts.

Verify:
r311

Change-Id: I493c83f38899628ac65c637e81f053a7c22bd24f
Signed-off-by: Jianxiong Pan <jianxiong.pan@amlogic.com>
This commit is contained in:
Jianxiong Pan
2018-10-29 14:44:26 +08:00
committed by Jianxin Pan
parent 135dd39691
commit e5b107a8dd
5 changed files with 20 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/boot/dts/amlogic/mesonaxg.dtsi
View File

@@ -50,7 +50,7 @@
};
CPU0:cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -60,7 +60,7 @@
CPU1:cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -69,7 +69,7 @@
};
CPU2:cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -79,7 +79,7 @@
CPU3:cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;

8
arch/arm/boot/dts/amlogic/mesong12a.dtsi
View File

@@ -52,7 +52,7 @@
CPU0:cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
@@ -70,7 +70,7 @@
CPU1:cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x1>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
@@ -88,7 +88,7 @@
CPU2:cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x2>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
@@ -106,7 +106,7 @@
CPU3:cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x3>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;

8
arch/arm/boot/dts/amlogic/mesongxl.dtsi
View File

@@ -49,7 +49,7 @@
};
CPU0:cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -60,7 +60,7 @@
CPU1:cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x1>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -70,7 +70,7 @@
};
CPU2:cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x2>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -81,7 +81,7 @@
CPU3:cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x3>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;

8
arch/arm/boot/dts/amlogic/mesontxl.dtsi
View File

@@ -55,7 +55,7 @@
CPU0:cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -65,7 +65,7 @@
CPU1:cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x1>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -75,7 +75,7 @@
CPU2:cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x2>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -85,7 +85,7 @@
CPU3:cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x3>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;

8
arch/arm/boot/dts/amlogic/mesontxlx.dtsi
View File

@@ -49,7 +49,7 @@
};
CPU0:cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -59,7 +59,7 @@
CPU1:cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x1>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -68,7 +68,7 @@
};
CPU2:cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x2>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
@@ -78,7 +78,7 @@
CPU3:cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;