mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-08 03:40:35 +09:00
clk: rockchip: remove spin_lock in the rockchip_ddrclk_sip_set_rate
Change-Id: Ia3d04aef8fbf8093c2a3a89a845f948f69c8611f Signed-off-by: YouMin Chen <cym@rock-chips.com>
This commit is contained in:
@@ -39,7 +39,6 @@ struct rockchip_ddrclk {
|
||||
int div_shift;
|
||||
int div_width;
|
||||
int ddr_flag;
|
||||
spinlock_t *lock;
|
||||
};
|
||||
|
||||
#define to_rockchip_ddrclk_hw(hw) container_of(hw, struct rockchip_ddrclk, hw)
|
||||
@@ -94,15 +93,11 @@ static int rk_drm_get_lcdc_type(void)
|
||||
static int rockchip_ddrclk_sip_set_rate(struct clk_hw *hw, unsigned long drate,
|
||||
unsigned long prate)
|
||||
{
|
||||
struct rockchip_ddrclk *ddrclk = to_rockchip_ddrclk_hw(hw);
|
||||
unsigned long flags;
|
||||
struct arm_smccc_res res;
|
||||
|
||||
spin_lock_irqsave(ddrclk->lock, flags);
|
||||
arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, drate, 0,
|
||||
ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE,
|
||||
0, 0, 0, 0, &res);
|
||||
spin_unlock_irqrestore(ddrclk->lock, flags);
|
||||
|
||||
return res.a0;
|
||||
}
|
||||
@@ -311,8 +306,7 @@ struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,
|
||||
u8 num_parents, int mux_offset,
|
||||
int mux_shift, int mux_width,
|
||||
int div_shift, int div_width,
|
||||
int ddr_flag, void __iomem *reg_base,
|
||||
spinlock_t *lock)
|
||||
int ddr_flag, void __iomem *reg_base)
|
||||
{
|
||||
struct rockchip_ddrclk *ddrclk;
|
||||
struct clk_init_data init;
|
||||
@@ -347,7 +341,6 @@ struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,
|
||||
}
|
||||
|
||||
ddrclk->reg_base = reg_base;
|
||||
ddrclk->lock = lock;
|
||||
ddrclk->hw.init = &init;
|
||||
ddrclk->mux_offset = mux_offset;
|
||||
ddrclk->mux_shift = mux_shift;
|
||||
|
||||
@@ -542,7 +542,7 @@ void __init rockchip_clk_register_branches(
|
||||
list->muxdiv_offset, list->mux_shift,
|
||||
list->mux_width, list->div_shift,
|
||||
list->div_width, list->div_flags,
|
||||
ctx->reg_base, &ctx->lock);
|
||||
ctx->reg_base);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
@@ -320,8 +320,7 @@ struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,
|
||||
u8 num_parents, int mux_offset,
|
||||
int mux_shift, int mux_width,
|
||||
int div_shift, int div_width,
|
||||
int ddr_flags, void __iomem *reg_base,
|
||||
spinlock_t *lock);
|
||||
int ddr_flags, void __iomem *reg_base);
|
||||
|
||||
#define ROCKCHIP_INVERTER_HIWORD_MASK BIT(0)
|
||||
|
||||
|
||||
Reference in New Issue
Block a user