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clk: rockchip: add HCLK_USB_PERI for rk3368 usb

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Change-Id: Ib1fad4af45ac5ba42ddd97918385aee3bd58e18e
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Xu Jianqun
2016-02-02 16:29:56 +08:00
committed by Elaine Zhang
parent ba22cd12d4
commit e6e05d2b33
2 changed files with 2 additions and 1 deletions
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2
drivers/clk/rockchip/clk-rk3368.c
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@@ -783,7 +783,7 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
GATE(0, "hclk_mmc_peri", "hclk_peri", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(20), 10, GFLAGS),
GATE(0, "hclk_emem_peri", "hclk_peri", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(20), 9, GFLAGS),
GATE(0, "hclk_peri_ahb_arbi", "hclk_peri", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(20), 7, GFLAGS),
GATE(0, "hclk_usb_peri", "hclk_peri", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(20), 6, GFLAGS),
GATE(HCLK_USB_PERI, "hclk_usb_peri", "hclk_peri", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(20), 6, GFLAGS),
GATE(HCLK_HSIC, "hclk_hsic", "hclk_peri", 0, RK3368_CLKGATE_CON(20), 5, GFLAGS),
GATE(HCLK_HOST1, "hclk_host1", "hclk_peri", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(20), 4, GFLAGS),
GATE(HCLK_HOST0, "hclk_host0", "hclk_peri", 0, RK3368_CLKGATE_CON(20), 3, GFLAGS),

1
include/dt-bindings/clock/rk3368-cru.h
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@@ -163,6 +163,7 @@
#define PCLK_EFUSE256 371
/* hclk gates */
#define HCLK_USB_PERI 447
#define HCLK_SFC 448
#define HCLK_OTG0 449
#define HCLK_HOST0 450